Abstract: A firewall configured to be interfaced between an internal and an external networks. The firewall includes a VoIP processor for detecting an outgoing VoIP packet sent from the internal network, for changing data in a header of the VoIP packet and also changing data contents in the VoIP packet corresponding to data changed in the header to enable bi-directional VoIP communication. In one embodiment, the VoIP processor changes a source IP address and a port number in the header of the VoIP packet and also changes the data contents in the VoIP packet corresponding to the source IP address and the port number changed in the header to enable bi-directional VoIP communication. In another embodiment, the firewall further includes an external VoIP interface comprising multiple VoIP ports for receiving multiple incoming VoIP packets each designated with one of the VoIP ports.

Abstract: Various embodiments of the present invention provide systems and circuits for clock signal generation. For example, various embodiments of the present invention provide semiconductor devices that include a power source and a phase lock loop circuit. The power source provides a supply voltage to the phase lock loop circuit. The phase lock loop circuit includes and on-chip control voltage source and a voltage controlled oscillator. The on-chip control voltage source is capable of producing a control voltage that varies between a minimum voltage and a maximum voltage. The voltage controlled oscillator receives the control voltage and provides a clock signal with a frequency corresponding to the control voltage. The maximum voltage is greater than the supply voltage. For example, in some embodiments of the present invention, the maximum voltage is more than double the supply voltage. As another example, in some embodiments of the present invention, the maximum voltage is more than six times the supply voltage.

Abstract: Various systems and methods for implementing multi-mode semiconductor devices are discussed herein. For example, a multi-mode semiconductor device is disclosed that includes a device package with a number of package pins. In addition, the device includes a semiconductor die or substrate with at least two IO buffers. One of the IO buffers is located a distance from a package pin and another of the IO buffers is located another distance from the package pin. One of the IO buffers includes first bond pad electrically coupled to a circuit implementing a first interface type and a floating bond pad, and the other IO buffer includes a second bond pad electrically coupled to a circuit implementing a second interface type. In some cases, the floating bond pad is electrically coupled to the circuit implementing the second interface type via a conductive interconnect, and the floating bond pad is electrically coupled to the package pin.

Abstract: Methods and systems are provided for promoting and managing communications among a social support network. According to one embodiment, a communication system includes a closed communication service platform and a hardcopy-based communication appliance. The communication service platform provides a caregroup virtual private network (VPN) through which only registered members of the caregroup, authorized personnel of the communication service platform, processes associated with the communication service platform, and a target of the caregroup are permitted to exchange communications.

Abstract: Various systems and methods for error reduction in a digital information system are disclosed herein. As one example, a digital storage system is provided that includes a soft output Viterbi algorithm channel detector operable to receive an encoded data set, and to provide a hard and a soft output representing the encoded data set. The hard and the soft output from the soft output Viterbi algorithm channel detector are provided to a single parity row decoder that provides another hard output that is an error reduced representation of the encoded data set. The encoded data set is additionally provided from the buffer to another channel detector via a delay element. The hard output from the single parity row decoder and the time shifted encoded data set are provided to coincident with each other to another channel detector.

Abstract: Various systems and methods for low power multi-rate data paths are disclosed. As one example, a semiconductor device that includes a multi-rate data path is discussed. The multi-rate data path includes at least two register circuits with an output of one of the register circuits electrically coupled to an input of the other register circuit via a combinational logic block. In addition, the semiconductor device includes a control circuit that is operable to modify the rate at which the multi-rate data path operates by selectably bypassing at least one of the register circuits.

Abstract: The instant invention provides a method of treating an animal suffering a disease characterized by excessive apoptosis by administering a therapeutically effective amount of at least one serine protease inhibitor and thereafter monitoring a decrease in apoptosis. The inhibitor of the invention includes ?1-antitrypsin or an ?1-antitrypsin-like agent, including, but not limited to oxidation-resistant variants of ?1-antitrypsin, and peptoids with antitrypsin activity. The diseases treatable by the invention include cancer, autoimmune disease, sepsis neurodegenerative disease, myocardial infarction, stroke, ischemia-reperfusion injury, toxin induced liver injury and AIDS. The method of the invention is also suitable for the prevention or amelioration of diseases characterized by excessive apoptosis.

Abstract: A network interface is disclosed for enabling remote programmed I/O to be carried out in a “lossy” network (one in which packets may be dropped). The network interface: (1) receives a plurality of memory transaction messages (MTM's); (2) determines that they are destined for a particular remote node; (3) determines a transaction type for each MTM; (4) composes, for each MTM, a network packet to encapsulate at least a portion of that MTM; (5) assigns a priority to each network packet based upon the transaction type of the MTM that it is encapsulating; (6) sends the network packets into a lossy network destined for the remote node; and (7) ensures that at least a subset of the network packets are received by the remote node in a proper sequence. By doing this, the network interface makes it possible to carry out remote programmed I/O, even across a lossy network.

Abstract: Various systems and methods for generating error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for generating an erasure pointer is disclosed that includes accumulating a number of error values into an overall error value, and comparing the overall error value to an error threshold. When the overall error value exceeds the error threshold, an erasure pointer is generated. In one particular case, the error values are derived from a look up table using thermometer codes generated by an analog to digital converter. In other cases, the error values are derived from comparing a soft output with a reliability threshold.

Abstract: Systems and methods are described for allowing the execution of authorized computer program code and for protecting computer systems and networks from unauthorized code execution. In one embodiment, a multi-level proactive whitelist approach is employed to secure a computer system by allowing only the execution of authorized computer program code thereby protecting the computer system against the execution of malicious code such as viruses, Trojan horses, spy-ware, and/or the like. Various embodiments use a kernel-level driver, which intercepts or “hooks” certain system Application Programming Interface (API) calls in order to monitor the creation of processes prior to code execution. The kernel-level driver may also intercept and monitor the loading of code modules by running processes, and the passing of non-executable code modules, such as script files, to approved or running code modules via command line options, for example.

Abstract: Various embodiments of the present invention provide systems and circuits for processing information through comparison of input signals. For example, various embodiments of the present invention provide differential latch circuits. Such differential latch circuits include an input stage and a latch stage. The input stage provides an interim output that is available during a defined period, and the latch stage is operable to latch the temporary interim output during the defined period using a common clock.

Abstract: Various apparatus and methods for related to clock recovery are disclosed. For example, in one illustrative embodiment, a clock recovery circuit includes a coding circuit adapted to translate a stream of first digital numbers derived from a source signal into a stream of first binary numbers and a stream of second binary numbers, a digital-to-analog converter (DAC) circuit coupled to the coding circuit and configured to provide an analog output based on the streams of first and second binary numbers and a voltage-controlled oscillator (VCO) controlled by the analog output of the DAC circuit and adapted to produce a base clock having a base clock frequency.

Abstract: The disclosure describes various systems and methods for access control. One such method includes providing an access control module that is capable of operating at least a first carrier frequency and a second carrier frequency. In addition, the method includes providing a first access credential that operates at the first carrier frequency, and providing a second access credential that operates at the second carrier frequency. Various other systems, methods and features are also described herein.

Abstract: Methods and systems are provided for applying metering and rate-limiting in a virtual router environment and supporting a hierarchy of metering/rate-limiting contexts per packet flow. According to one embodiment, multiple first level metering options and multiple second level metering options associated with a hierarchy of metering levels are provided. A virtual routing engine receives packets associated with a first packet flow and packets associated with a second packet flow. The virtual routing engine performs a first type of metering of the first level metering options on the packets associated with the first packet flow using a first metering control block (MCB) and performs a second type of metering of the second level metering options on the packets associated with the first packet flow and the packets associated with the second flow using a second MCB.

Abstract: Systems and methods for tracking electronic messages and data are provided. According to one embodiment, steps for tracking an email message, or other electronic message, may include identifying an email message for tracking, associating a linking object with the tracked message, and responsive to activation of the linking object by a receiver of the electronic message, automatically submitting information regarding the electronic message to be tracked to a designated resource. According to various embodiments, a linking object may include a Universal Resource Identifier (URI), a java script, an executable file, a visual basic script (VBS), and/or the like. In accordance with one embodiment, the linking object facilitates submission of information regarding the tracked email message to an anti-spam system by a receiver of the tracked email message.

Abstract: Various embodiments of the present invention provide systems and methods for analog to digital conversion. For example, an analog to digital converter is disclosed that includes an analog input that is provided to a comparator bank. The comparator bank receives a reference indicator, and is operable to provide a current output based at least in part on a comparison of the analog input with a reference threshold corresponding to the reference indicator. The analog to digital converter further includes a range selection filter that is operable to receive the current output and to generate the reference indicator based at least in part on a prior output of the comparator bank.

Abstract: Various embodiments of the present invention provide systems and methods for analog to digital conversion. For example, a pipelined analog to digital converter is disclosed that includes two or more comparators. A first of the comparators is operable to compare an analog input to a first voltage reference upon assertion of the first clock, and a second of the comparators is operable to compare the analog input to a second voltage reference upon assertion of the second clock. The pipelined analog to digital converters further include a multiplexer tree with at least a first tier multiplexer and a second tier multiplexer. The first tier multiplexer receives an output of the first comparator and an output of the second comparator, and the second tier multiplexer receives an output derived from the first tier multiplexer. The second tier multiplexer provides an output bit.

Abstract: Systems and methods for facilitating photo completion are provided. According to one embodiment, a system is provided including a hand held device, an application running on the hand held device, and a printing system. The hand held device includes the capability to both capture and transmit digital photos. The application provides the hand held device with hyper-simplified photo capture and delivery. In one embodiment, the application defaults a number of parameters that can be configured on the hand held device, such as the target, the photo review mechanism, the presentation method. These defaults can be set (reset) directly in the application or overridden in the system post transmission processing. In one embodiment, the printing system may control the schedule of publication. For example, the printing system may print received digital photos immediately, the next morning, on a periodic basis, or after receiving eMail confirmation.

Abstract: Various systems and methods for power reduction are disclosed herein. As one example, a method for power reduction in a semiconductor device is disclosed. The method includes providing a semiconductor device that includes a bus. The bus includes a group of signals and a control signal associated with the group of signals. In one particular case, the group of signals is a data bus and the control signal is a low frequency signal implementing some particular control specific to the bus. In the method, the control signal doubles as a polarity control that indicates a polarity state of the group of signals while actively indicating the status of the particular control.

Abstract: Site reachability information is determined for a service processing switch that is communicably coupled to one or more sites. In addition, global routing profiles, customer site profiles and OSPF profiles are defined. The profile data, in addition to or instead of the reachability information is used to generate routing configuration data for one or more Virtual Routers and Virtual Private Networks implemented within the service processing switch.