Patents Represented by Attorney Hamilton & DeSanctis
  • Patent number: 7813989
    Abstract: A financial advisory system is described that facilitates planning regarding financial goals, such as retirement. According to one embodiment, a method of forecasting a future value of a financial product holding is provided. Exposure analysis is performed on a financial product in which an investor holds an interest to determine how the financial product behaves relative to a set of asset classes. A forecast is generated for the financial product holding at a configurable time horizon based on forward-looking scenarios of one or more asset classes of the set of asset classes. Based on the forecast, information is directly or indirectly caused to be presented regarding a projected value of the financial product holding at the configurable time horizon.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: October 12, 2010
    Assignee: Financial Engines, Inc.
    Inventors: Christopher L. Jones, William F. Sharpe, Jason S. Scott, John G. Watson, Jeff N. Maggioncalda, Geert Bekaert, Steven R. Grenadler, Ronald T. Park
  • Patent number: 7808904
    Abstract: Methods and apparatus for managing subscriber profiles are described herein. In one embodiment, the method includes receiving, from a requester, a request to determine an operation to be performed on a data packet. The method also includes determining profile identifiers associated with the requester, wherein the profile identifiers include, a first-level profile identifier associated with a lower-level profile identifier that defines the operation. The method also includes determining, based on the profile identifiers, that the operation should be performed on the data packet and transmitting an indication of the operation to the requestor, wherein the requestor performs the operation on the data packet.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: October 5, 2010
    Assignee: Fortinet, Inc.
    Inventors: Rajesh I Balay, Chandramouli Sargor, Sachin S. Desai, Francois Lemarchand, Amit K. Khetawat
  • Patent number: 7802163
    Abstract: Various systems and methods for code based error reduction. For example, in one digital information system including a channel detector and a decoder, the channel detector receives an encoded data set and is operable to perform a column parity check. The channel detector provides an output representing the encoded data set. The decoder receives the output from the channel detector and is operable to perform two checks. The two checks may be one of: two pseudo-random parity checks, a pseudo-random parity check and a slope parity check, and two slope parity checks. In addition, the decoder provides another output representing the encoded data set.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 21, 2010
    Assignee: Agere Systems Inc.
    Inventor: Weijun Tan
  • Patent number: 7801200
    Abstract: Various systems and methods for code dependency reduction are disclosed herein. For example, one method includes receiving an un-encoded data set that is represented as an array of columns and rows. In addition, two groups of data bits traversing the un-encoded data set at respective angles are formed. Based at least in part on the aforementioned groups of data sets, an angle at which a third group of data bits will traverse the un-encoded data set is identified, and a third group of data bits traversing the un-encoded data set at the third angle is formed.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 21, 2010
    Assignee: Agere Systems Inc.
    Inventor: Weijun Tan
  • Patent number: 7797746
    Abstract: Systems and methods for an anti-virus detection module that can detect known undesired computer files in encrypted, compressed, password-protected and/or damaged archives are provided. According to one embodiment, an archive file is scanned without decrypting and without decompressing contents of the archive file. A type and associated structure of the archive file are identified. Then, based on the identified type and the associated structure, descriptive information from the archive file is obtained describing one or more contained files. The descriptive information for each of the contained files is evaluated to determine if any of the contained files are malicious or undesired computer files by comparing the descriptive information to signatures of known malicious or undesired computer files. Finally, an attempt is made to prevent any of the contained files determined to be a malicious or undesired computer file from being opened.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: September 14, 2010
    Assignee: Fortinet, Inc.
    Inventors: Steven Michael Fossen, Alexander Douglas MacDonald
  • Patent number: 7787252
    Abstract: Various apparatuses and methods for a preferentially cooled electronic device are disclosed herein. For example, some embodiments provide an electronic apparatus including a package substrate and with a semiconductor die electrically and thermally connected to the package substrate by a plurality of connection nodes. At least one thermal trace interconnects at least one subset of the plurality of connection nodes. At least one heat dissipation trace on the package substrate is connected to the at least one subset of the plurality of connection nodes.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: August 31, 2010
    Assignee: LSI Corporation
    Inventor: Atila Mertol
  • Patent number: 7788155
    Abstract: A financial advisory system is provided. According to one aspect of the present invention, return scenarios for optimized portfolio allocations are simulated interactively to facilitate financial product selection. Return scenarios for each asset class of a plurality of asset classes are generated based upon estimated future scenarios of one or more economic factors. A mapping from each financial product of an available set of financial products onto one or more asset classes of the plurality of asset classes is created by determining exposures of the available set of financial products to each asset class of the plurality of asset classes. In this way, the expected returns and correlations of a plurality of financial products are generated and used to produce optimized portfolios of financial products. Return scenarios are simulated for one or more portfolios including combinations of financial products from the available set of financial products based upon the mapping.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: August 31, 2010
    Assignee: Financial Engines, Inc.
    Inventors: Christopher L. Jones, William F. Sharpe, Jason S. Scott, John G. Watson, Jeff N. Maggioncalda, Geert Bekaert, Steven R. Grenadier, Ronald T. Park
  • Patent number: 7782644
    Abstract: A power supply includes a power source having at least one power source output, and a plurality of drivers connected to the at least one power source output. At least one of the plurality of drivers includes a bridge network having a first switch, a second switch and a bridge network output. The first switch is connected between the at least one power source output and the bridge network output. The second switch is connected between the bridge network output and a ground. The bridge network further includes at least one control input connected to the second switch to direct electrical current from the at least one power source output either substantially through the bridge network output or through the second switch to ground.
    Type: Grant
    Filed: March 3, 2007
    Date of Patent: August 24, 2010
    Inventors: Laurence P. Sadwick, Mohammad M. Mojarradi, Ruey-Jen Hwu
  • Patent number: 7779331
    Abstract: Various systems and methods for tri-column code based error reduction are disclosed herein. For example, a digital information system is disclosed that includes channel detector. Such a channel detector receives an encoded data set and provides an output representing the encoded data set. The exemplary system further includes a decoder that receives the first output and is operable to perform three slope parity checks on the received first output. In turn, the decoder provides another output representing the encoded data set.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: August 17, 2010
    Assignee: Agere Systems Inc.
    Inventor: Weijun Tan
  • Patent number: 7774257
    Abstract: A financial advisory system and a user interface for such a system are provided. According to one embodiment, information regarding a retirement income goal of an individual is received. Multiple input values for corresponding decision variables are also received. The decision variables include an indication regarding a target retirement age for the individual, an indication regarding anticipated monetary contributions directed toward the retirement income goal and an indication regarding the individual's risk tolerance. A probability distribution dependent upon the decision variables is generated based on simulated market return scenarios and representing a set of possible future portfolio values based on the plurality of inputs.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: August 10, 2010
    Assignee: Financial Engines, Inc.
    Inventors: Jeff N. Maggioncalda, Christopher L. Jones, William F. Sharpe, Ken Fine, Ellen Tauber
  • Patent number: 7774461
    Abstract: A mechanism is disclosed for determining a congestion metric for a path in a network. In one implementation, a congestion metric for a path includes one or more latency values and one or more latency variation values. A latency value for a path may be determined by exchanging latency packets with another component. For example, to determine the latency for a particular path, a first component may send a latency request packet to a second component via the particular path. In response, the second component may send a latency response packet back to the first component. Based upon timestamp information in the latency response packet, the latency on the particular path may be determined. From a plurality of such latencies, a latency variation may be determined. Taken individually or together, the latency value(s) and the latency variation value(s) provide an indication of how congested the particular path currently is.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: August 10, 2010
    Assignee: Fortinet, Inc.
    Inventors: Bert H. Tanaka, Daniel J. Maltbie, Joseph R. Mihelich
  • Patent number: 7768437
    Abstract: Various embodiments of the present invention provide systems and methods for utilizing a plurality of potentially mismatched analog to digital converters. For example, a method for adaptively processing a variety of input signals is disclosed. The method includes providing an adaptive loop circuit, and a first and second circuit pairs. The first circuit pair includes a first analog to digital converter and first register, and the second circuit pair includes a second analog to digital converter and a second register. An input signal is received and an event status is received. The event status initially indicates that the input signal includes data associated with a first event and subsequently indicates that the input signal includes data associated with a second event. The first circuit pair to drive the adaptive loop circuit when the first event is indicated, and the second circuit pair to drive the adaptive circuit when the second event is indicated.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: August 3, 2010
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Venkatram Muddhasani
  • Patent number: 7764023
    Abstract: A method and apparatus for aiding ignition in a discharge lamp is provided. In one embodiment, a method comprises: applying a voltage across a pair of electrodes of a discharge lamp and capacitively coupling the discharge lamp. The capacitive coupling of the discharge lamp induces a current in the lamp to lower an ignition voltage of the discharge lamp. In another embodiment, a circuit for aiding ignition in a discharge lamp comprising a first electrode and a second electrode is also provided. The circuit comprises a lamp drive circuit comprises a voltage source coupled to a first terminal and a current controller coupled to a second terminal. The first and second terminals are configured to couple to a corresponding one of the first electrode and the second electrode of the discharge lamp. The voltage source is configured to provide a voltage signal at the first terminal and the current controller is configured to control a current received via the second terminal.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: July 27, 2010
    Assignee: The Regents of the University of Colorado
    Inventor: Regan A. Zane
  • Patent number: 7761743
    Abstract: Methods and systems for facilitating fault tolerance in a non-hot-standby configuration of a network routing system are provided. According to one embodiment, a method is provided for replacing an active processing engine with a non-hot-standby processing engine. Multiple processing engines within a network routing system are configured. The processing engines include an active processing engine having one or more software contexts, representative of a set of objects implementing a virtual router, for example, and a non-hot-standby processing engine having no pre-created software contexts corresponding to the one or more software contexts. Responsive to determining a fault associated with the active processing engine, the active processing engine is dynamically replaced with the non-hot-standby processing engine by creating replacement software contexts within the non-hot-standby processing engine corresponding to the one or more software contexts.
    Type: Grant
    Filed: September 7, 2009
    Date of Patent: July 20, 2010
    Assignee: Fortinet, Inc.
    Inventors: Wilson Talaugon, Sridhar Subramaniam, Bill Chin, Itai Aaronson
  • Patent number: 7741823
    Abstract: Various voltage regulators and/or voltage regulation systems are disclosed. For example, a voltage regulation system that includes a source follower output is disclosed. The source follower output includes a transistor where the source of the transistor provides a baseline voltage to a regulated voltage output node. The voltage regulation system further includes a body damping circuit and a low speed feedback circuit. The body damping circuit is electrically coupled to the body of the transistor, and is operable to provide a rapid opposition to any voltage disturbance at the regulated voltage output node. The low speed feedback circuit is electrically coupled to the gate of the transistor, and is operable to return the regulated voltage output node to the baseline voltage.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: June 22, 2010
    Assignee: Agere Systems Inc.
    Inventors: Stephen C. Terry, Stephen J. Franck
  • Patent number: 7737798
    Abstract: Various systems and methods for clock generation are disclosed herein. As just one example, a system for clock generation is disclosed that includes a phase/frequency control circuit that provides a feedback control; a multi-range selector circuit that receives the feedback control; and a controlled oscillator that provides an output with a phase and frequency at least in part governed by the multi-range selector circuit and the feedback control. In various instances of the aforementioned embodiments, the controlled oscillator is a ring oscillator relying on inherent capacitance.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: June 15, 2010
    Assignee: Agere Systems Inc.
    Inventor: John A. Schuler
  • Patent number: 7739533
    Abstract: Various systems and methods for power management are disclosed herein. For example, a synchronous semiconductor circuit is disclosed that includes two or more clock sources and a power management controller. The power management controller is operable to apply power to one of the clock sources and to select another of the clock sources for synchronization of the circuit. Then, upon stabilization of the first clock source, it is selected by the power management controller to synchronize the circuit.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: June 15, 2010
    Assignee: Agere Systems Inc.
    Inventors: Richard Rauschmayer, Steven E. Strauss, Tatsuya Sakai
  • Patent number: 7738200
    Abstract: Various systems and methods for peak signal detection. As one example, a method for peak signal detection that includes receiving a signal is disclosed. The received signal includes a signal region where the signal is increasing in amplitude, another signal region where the signal is decreasing in amplitude, and a transitional signal region coupling the first two signal regions. In some cases, the transitional region is of zero duration and the signal transitions directly from the increasing region to the decreasing region. The method further include calculating a distance between the signal region of increasing amplitude and the signal region of decreasing amplitude, and determining a peak of the received signal that is one half the distance from the signal region of increasing amplitude.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: June 15, 2010
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Keith R. Bloss, Tianyang Ding, Jeffrey P. Grundvig, Roy S. Neville
  • Patent number: 7720095
    Abstract: Methods and systems are provided for bridging heterogeneous media packets using a single processor resource having a virtual bridge. Network interfaces associated with heterogeneous media channels relay network packets to the virtual bridge. The virtual bridge accesses metadata associated with the relayed network packets and translates the network packets between media formats. The translated network packets are then relayed to an appropriate network interface. In one embodiment, the virtual bridge is dynamically configurable within the processing resource.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: May 18, 2010
    Assignee: Fortinet, Inc.
    Inventors: Sachin Desai, Rajesh Balay, Chandramouli Sargor
  • Patent number: 7720053
    Abstract: A system and method for providing IP services. A packet is received at a line interface/network module and forwarded to a virtual routing engine The virtual routing engine determines if the packet requires processing by a virtual services engine. If the packet requires processing by the virtual services engine, the packet is routed to the virtual services engine for processing.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: May 18, 2010
    Assignee: Fortinet, Inc.
    Inventors: Zahid Hussain, Tim Millet