Abstract: The circuitry for programming a flash EEPROM memory cell has a data import circuit for receiving a data signal and a programming signal. Switching circuit is coupled with the data input circuit and responsive to the programming signal for transmitting the data signal to achieve the memory cell from the output of the data input circuit. Discharge control circuit, is coupled with the switch circuit for discharging the bit line voltage of the memory cell. The discharge control circuit comprises two NMOS transistor and a PMOS transistor. First one of the NMOS is coupled with a PMOS in a series so as to construct a shunt circuit for discharging the bit line voltage and the PMOS is then coupled with the second NMOS in a parallel way. The gate terminal of PMOS is then responsive to ground voltage, the gate terminals of two NMOS are then responsive to a voltage V.sub.PBIAS.

Abstract: An integrated, modular computer program system provides for the encryption and decryption of files utilizing conventional encryption algorithms and a relational key generated by the system. The computer program system also generates a series of labels that are encrypted and appended as a trailer to the encrypted message. The encrypted labels provide a history behind the particular encryption and they can be individually selected, separated, and decrypted from the total file. A rule based expert system is utilized as an intelligent label selection system to minimize message sensitivity. An access control module permits a user with a preassigned passphrase to have access to the encryption or decryption portion of the program by comparing a generated vector or key with a partially decrypted version of a second vector or key stored on a portable storage medium such as a floppy disk.

Abstract: In this invention, a whole-chip ESD protection scheme with the SCR string or the SCR/diode-mixed string are proposed to protect the mixed-voltage CMOS IC's against the ESD damage. The SCR string or the SCR/diode-mixed string is placed between the separated power lines. The ESD current is arranged to be discharged through the SCR string or the SCR/diode-mixed string and the ESD clamps between the power lines. Therefore, the internal circuits and the interface circuits between the circuits with different power supplies can be prevented from ESD damages. The number of the SCR's or the diodes in the SCR string or the SCR/diode-mixed string connected between the different power lines is dependent on the voltage difference between the different power supplies in the mixed-voltage CMOS IC's. When the IC is in the normal operating conditions, such SCR string or the SCR/diode-mixed string between the different power lines is kept off to maintain the independence of the power supplies in the mixed-voltage COMS IC.

Abstract: A three-transistor type dynamic random access memory (DRAM) with a refresh circuit is disclosed. The memory includes a memory array including memory cells (40), each of the memory cells having a storing transistor (M2) used for storing a data therein; a writing transistor (M1) responsive to a signal on a write word line for transferring a signal on a write bit line to the storing transistor; and a reading transistor (M3) responsive to a signal on a read word line for transferring the data in the storing transistor to a read bit line. The memory according to the present invention also includes a refresh circuit (50) configured to latch a signal on the read bit line, the latched signal then being coupled to the write bit line when the refresh circuit is activated.

Abstract: The invention concerns a toothbrush comprising a handle and a brush head, which is equipped on one side with clusters of bristles, a resilient connection being provided between the handle and the brush head. When pressure is exerted on the surface formed by the free ends of the clusters of bristles, the connection allows the brush head to be deflected relative to the handle. This is achieved in that the connection is formed by a hinged rectangle whose axes of rotation extend transversely to the longitudinal extension of the handle and the bristles, and in that the distance between the two hinges closest to the brush head is less than or equal to the distance between the two hinges closest to the handle.

Abstract: A structure of supporter for a tie knot of a knotting-free necktie comprises an outer shell and a back wing connected to the outer shell. The outer shell, as seen from its front view, being of a reverse triangular shape having two waist portions concave inward of the outer shell, and as seen from its top view, being of a bow shape. A protective beam, resistant shoulders and protective tabs are provided at the rear side of the outer shell. A back wing is fitted onto the rear side of the outer shell, and two side wing portions being somewhat resilient are lightly pressed against the two resistant shoulders.

Abstract: A super high-speed sequential column decoder generates a high-speed successive output signals by using a pipe lining method and is operated irrespective of an applied speed of an external input clock signal, in a burst operation of a clock synchronous memory. The super high-speed sequential column decoder includes: a column address decoding portion which receives column address signals, decodes the column address signals, and transmits decoding signals to input terminals of a driving portion; and a pipeline-type column counter portion which has as many unit counters as burst-lengths, wherein, the unit counters receives the decoding signal as an input and sequentially generating column decoder signals. As a result, the super high-speed sequential column decoder freely adjusts a time delay, reduces a pulse width of the predecoding signals of an external column address, and thus drives the sequential column decoder signals at a high-speed frequency.

Abstract: A water-lubricated bearing comprises a cylindrical shell and a resilient liner, said shell being formed from a hard plastics material by a casting process and including an integral outwardly radially-directed flange at one end region thereof. The bearing may be made by initially forming the liner from a curable plastics material and curing the said material and thereafter forming the shell by casting a settable material in situ about the liner.

Abstract: A rotary actuator includes a bar made of shape memory alloy having ends provided with thermally insulating interface elements for interfacing with elements that are to be rotated relative to each other. An electric heater surrounds the bar and is apt to heat it above its transition temperature to the austenitic domain. The actuator is suitable for deploying or rotating solar panels.

Abstract: An article of furniture includes a table top (4) slidably and pivotally mounted on a column (2) the lower end of which is provided with a flange (3) fixing it to the floor of the conference hall. The table top (4) may be moved from a position (FIG. 2) in which it extends above and to one side of the column (2) to a position in which it lies parallel to the column (2) and adjacent the opposite side thereof. Levelling wedges (15) may be interposed between the flange (3) at the foot of the column (2) and a floor on which the column (2) is to be mounted to level the table top (4) when in its operative position.

Abstract: A self-bootstrapping device for sufficiently bootstrapping a bias applied to the gate of a MOS transistor included in the decoder of a semiconductor memory device requiring a high integration degree so that the MOS transistor can transmit the potential from its drain to its source. The self-bootstrapping device includes a first NMOS transistor for a signal transmission, and a second NMOS transistor connected between the gate of the first NMOS transistor and an address decoder circuit, the second NMOS transistor being applied at its gate with a source voltage, wherein the second NMOS transistor comprises a first diffusion region formed at a required portion of a semiconductor substrate, a second diffusion region formed around the first diffusion region while being spaced apart from the first diffusion region by a desired distance, and a gate electrode formed on the semiconductor substrate between the first and second diffusion regions.

Abstract: A hollow needle applicator for cartridged drugs etc has provision for automatic needle retraction after cartridge contents expression. Its drugs etc cartridge (125, 225, 325) can itself be at least partially accommodated bodily within a hollow piston actuator (145, 345), and will be released for retraction under bias (123, 3230 thereinto along with and by way of a piston rod (132, 332) first serving to operate contents (131, 331) discharge piston provision (130, 330) of the cartridge (125, 225, 335). The piston rod (132, 332) has deflectable arms (137, 337) that extend sideways further than side walling of the cartridge (125, 225, 335) and into temporary driving engagement with receiving formation(s) (147, 347) of the piston actuator (145, 345) until released by deflection of the arms (137, 337). The piston (132, 332) rod further has guiding formation(s) ((138, 338) extending into the hollow piston actuator (145, 345).

Abstract: The cascode LVTSCR includes two or more SCRs (silicon controlled rectifiers). Each SCR has an anode, a control gate, and a cathode. The SCRs are cascoded in series by coupling the control gates of same type SCRs in common and coupling the cathode of one SCR to the anode of next SCR in series. The holding voltage of the cascode LVTSCR can be designed to be greater than VDD voltage level of the IC. Therefore, the cascode LVTSCR has no latchup problem in the CMOS IC's. The electrostatic discharge (ESD) protection circuit in the present invention includes a cascode LVTSCR (low-voltage triggering silicon controlled rectifier) with an anode and a cathode coupled between power supplies, and a detecting circuit coupled between the power supplies for detecting an electrostatic charge to trigger the control gates of the cascode LVTSCR for dissipating the electrostatic discharge. The ESD protection circuit including the cascode LVTSCR can sustain high ESD stress but without causing the latchup problem in the CMOS IC's.

Abstract: To prevent a positional displacement of a screen mask in accordance with movement of a squeegee, a single squeegee device and a printing agent feeding device moves in synchronism with each other along a guide member. A squeegee elevated/lowered at a predetermined timing is mounted at a lower end of the squeegee device. A printing agent scraping device is mounted at a lower end of said printing agent feeding device. The printing agent scraping device is structured by a scraping frame which is elevated and lowered at a predetermined timing and moves in a direction in contact with or away from the squeegee and a printing agent extruding plate which is retracted/projected at a predetermined timing within the scraping frame.

Abstract: A method for forming fine patterns of a semiconductor device is disclosed and comprises the steps of: providing a semiconductor substrate; forming on the semiconductor substrate an objective layer to be etched; forming an intermediate layer over the objective layer; forming a first photoresist film over the intermediate layer; selectively exposing the first photoresist film through to a first exposure mask to light and create first photoresist patterns and thermally treating the first photoresist patterns; selectively etching the intermediate film to form intermediate patterns with the first photoresist patterns serving as a mask; forming a second photoresist film over the resulting structure; and selectively exposing the second photoresist film through a second exposure mask to light in such a manner that unexposed parts of the second photoresist film are partially overlapped with the first photoresist patterns, so as to form second photoresist patterns, whereby a significant improvement is brought into dept

Abstract: The present invention is related to a water-proof pad of a lamp base comprises a lamp base and a water-proof pad, wherein the through hole is installed aside the lower seat of the lamp base and said water-proof pad has a cylindrical portion and a plane plate which are formed integrally. Said water-proof pad may pass through said through hole so that the cylindrical portion and the plane plate may be assembled on the upper and lower ends of a positive polarity conducting piece, respectively, then as the lamp is assembled on a predetermined position of the lamp base, the water-proof effect of the contact piece of the positive polarity conducting piece is achieved.

Abstract: A semiconductor memory device having a data bus sense amplifier driving part for driving a data bus sense amplifier in a read mode in response to a global data bus line selection signal and a data bus line selection signal, a write driver driving part for driving a write driver in a write mode in response to the data bus line selection signal and a write bus line driver signal generation signal, and a logic gate for logically combining output signals from the data bus sense amplifier driving part and write driver driving part to generate a signal to drive the data bus sense amplifier in the write and read modes. The data bus sense amplifier is driven even in the write mode to change the previous data latched by a latch circuit.

Abstract: The present invention discloses a precharge circuit for preventing undesired output pulses caused by the current sensing circuit of the flash memory devices. The access time of the read-cycle also can be decreased after the undesired output pulses are completely removed. Basically, the circuit disclosed by the invention encompasses the current mirror and the cell array as conventionally; a control circuit, a voltage detector and a precharge circuit to remove the undesired output pulses. The control circuit couples with the current mirror, the voltage detector, and the precharge circuit. The current mirror is used to generate output waveform. The precharge circuit couples with the cell array with a bit line, and pre-charges the voltage level of the bit line to a predetermined expected value. The control circuit controls the precharge circuit to precharge the bit line when the read-cycle starts. Whole the current sensing circuit keeps disable until the voltage level of the bit line rises to an expected value.