Patents Represented by Attorney, Agent or Law Firm Helfgott & Karas
  • Patent number: 6262973
    Abstract: When a wireless channel fails, a working signal and a protection signal are synchronized and switching is performed without instantaneous disconnection. Each working unit of a plurality of working units is provided with a wireless-channel failure detector for detecting a failure that has occurred in a working wireless channel; a synchronization detecting circuit for detecting synchronization between a working wireless channel and a protection wireless channel; a changeover switch for selecting a signal from either the protection wireless channel or a working wireless channel without instantaneous disconnection; and a unit failure detector for detecting a failure that requires switching of a unit. When a failure develops in a wireless channel and a working wireless channel and the protection wireless channel are synchronized, a radio protection switching device controls the changeover switch to switch between working and protection wireless channels without instantaneous disconnection.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Yuji Shiraishi, Ichiro Ayukawa, Kimihiko Yoshimura, Hisamichi Hazama, Kimio Watanabe, Shingo Mizuno, Tadayuki Sakama
  • Patent number: 6256998
    Abstract: A two-stage pulse tube refrigerator comprises a pressure wave generator-compressor, first stage and second stage regenerators, first stage and second stage pulse tubes, heat exchangers and a hybrid phase shift mechanism for the first and second stage pulse tubes. The second stage phase shift mechanism includes double fixed orifices while the first stage shifter is an arrangement including one of a) 4 valves, b) 5 valves c) 2 active buffers or d) 3 active buffers. The double fixed orifice phase shifter is located either at room temperature or is thermally connected with the first stage cold end. Two-stage pulse tube refrigerators with a hybrid phase shifter have increased second stage regenerator performance at lower temperature. Pressure drop through the valves and compressor power consumption are decreased, and losses from phase interaction between each stage are eliminated.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: July 10, 2001
    Assignee: IGCAPD Cryogenics, Inc.
    Inventor: Jin Lin Gao
  • Patent number: 6259706
    Abstract: A communication controlling apparatus includes a receiving side communication protocol identifying means for determining a candidate communication protocol for a second apparatus. If an acknowledgment response is received from the second apparatus, a communication protocol is determined to be a candidate communication protocol for the second apparatus and, if no acknowledgment response is received, operations to convert a first signal into another signal conforming to another communication protocol supposed to be adopted by the second apparatus and to transmit the other signal to the second apparatus are repeated till an acknowledgment response to the other signal is received from the second apparatus.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: July 10, 2001
    Assignee: Fujitsu Limited
    Inventor: Junichi Shimada
  • Patent number: 6256997
    Abstract: A GM type displacer has an elastomer “O” ring at the warm end to absorb impact energy when the displacer reaches the bottom of the stroke before it would hit the cylinder end cap. When the displacer reaches the top of its stroke, before the displacer would hit the internal mechanism of the expander, another elastomer “O” ring absorbs the kinetic energy of the displacer. Both absorbers are at or near ambient temperature.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: July 10, 2001
    Assignee: Intermagnetics General Corporation
    Inventor: Ralph C. Longsworth
  • Patent number: 6259768
    Abstract: A method employs simple procedures to speedily carry out loopback tests on devices that form a channel system of an exchange. The method is capable of quickly locating a fault in the exchange and allowing speedy maintenance work of the exchange. Also provided is an apparatus for achieving the method. The apparatus has a path setter (1-4), a loopback controller (1-3), and a tester (1-1), to test the devices of the channel system (1-2) of the exchange. The devices to be tested are arranged in replaceable units (1-21, 1-22). The path setter (1-4) simultaneously sets paths to sequentially connect the devices to be tested. The loopback controller (1-3) activates and releases loopback parts arranged in the devices to be tested. The tester (1-1) sends a test signal to the devices through the paths, receives the test signal looped back by the loopback parts, analyzes the received signal, and determines whether or not the devices are sound.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: July 10, 2001
    Assignee: Fujitsu Limited
    Inventors: Tomomi Kato, Masatoshi Takita, Kazuei Ohnishi, Takamitsu Saito, Kosei Mano
  • Patent number: 6256316
    Abstract: In a centralized supervisory system having a plurality of individual supervisory devices which assembles control signal cells and main signal cells into frames and send the frames, and a centralized supervisory device which collects the supervisory information included in the control signal cells from the individual supervisory devices and sends the main signal cells to a network, maximum bands for control signals are determined, for the respective individual supervisory devices, on the basis of lengths of respective data to be transmitted. In each of the individual supervisory devices, a given number of control signal cells are arranged in each frame so that the control signals are transmitted within the maximum band. Then, the frames are sent to the centralized supervisory device.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: July 3, 2001
    Assignee: Fujitsu Limited
    Inventor: Kojun Mitani
  • Patent number: 6255858
    Abstract: By applying a modification considering a frequency difference to a phase error signal, phase lock is established in a short period of time even when there is a frequency difference. A jump detector detects a discontinuous jump of the phase error signal which occurs when there is a frequency difference, and a state transition is caused in a state storage device in accordance with the resulting detection signal. A holding device corrects the phase error signal in accordance with the state stored in the state storage device and outputs the thus corrected phase error signal as a frequency-phase error signal.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: July 3, 2001
    Assignee: Fujitsu Limited
    Inventors: Chiyoshi Akiyama, Toshio Kawasaki
  • Patent number: 6256326
    Abstract: In a terminal apparatus to which an SDH transmission mode is applied, there is a method including a pseudo-synchronization detecting step of detecting, by one transmitter-receiver, that a pseudo-synchronization state is established by finding in data the same pattern as a synchronization pattern in byte information, a pseudo-synchronization posting step of inserting, by the one transmitter-receiver, information to the effect that the pseudo-synchronization state is established in an overhead of an STM frame, and posting the information to the other transmitter-receiver, and a changed synchronization pattern transmitting step of changing a synchronization pattern into an additional synchronization pattern different from the synchronization pattern in the byte information, and transmitting the synchronization pattern obtained by the change from the other transmitter-receiver to the one transmitter-receiver.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: July 3, 2001
    Assignee: Fujitsu Limited
    Inventor: Shoji Kudo
  • Patent number: 6254477
    Abstract: A portable electronic device and an entertainment system that can give a user a sense of familiarity by generating a proper character using an identification number and by displaying it, for example, on a display means include an identification-number holding section which holds a proper identification number through a bus, which is connected to an interface to connect to a game-machine main body having a program-execution function. Input operation is performed by a player at an input-operation section. At an operation-information generation section, an operation information is generated in response to the input operation at the input-operation section. The RAM provides for use for operation information stores the operation information received from the operation-information generation section. A character-information generation section generates proper character information in accordance with the operation information and gene information when the latter is received through the game-machine main body.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: July 3, 2001
    Assignee: Sony Computer Entertainment, Inc.
    Inventors: Nobuo Sasaki, Akio Ohba
  • Patent number: 6252458
    Abstract: A differential amplifier having an integrated resistance load type differential pair in which a constant current which varies to suppress a small signal gain variation of a resistance load type differential pair caused by variations of circumferential conditions and manufacturing process conditions and a constant current which varies to suppress a limiter amplitude variation of the resistance load type differential pair caused by the variations of the same conditions are mixed at a fixed ratio under a condition which is most frequently used among the circumferential conditions and a condition which is best achieved among the manufacturing process conditions, which is used as a bias current of the differential pair.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: June 26, 2001
    Assignee: Fujitsu Limited
    Inventor: Kohei Shibata
  • Patent number: 6252502
    Abstract: An alarm detection apparatus includes a plurality of alarm detectors detecting and/or cancelling alarms for identical and different error rates. The plurality of alarm detectors are grouped into a major detector unit made up of alarm detectors which detect major error rates, and a minor detector unit made up of alarm detectors which detect minor error rates. The major detector unit and the minor detector unit output detection outputs corresponding to specified detection rates thereof. A predetermined alarm detector corresponding to a part of the minor detector unit has a specified detection rate overlapping a specified detection rate of the major detector unit being controlled, so that a detection function or a detection output of the predetermined alarm detector is disabled.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: June 26, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaki Kubo, Masaru Kameda, Shigeyuki Kobayashi, Junichi Ishiwatari, Shuniti Nakayama, Hideo Sunaga, Nobuyuki Nemoto
  • Patent number: 6252858
    Abstract: A method and apparatus for building network configuration database, which eliminates manual data collection and verification tasks and thereby reduces the time and labor costs related to such tasks. A device data collection unit requests a plurality of transmission units on the network to report how they are configured. This request may be initiated at regular intervals or triggered by an external source on demand. Template data is previously prepared by modeling possible configurations of various types of transmission units, and stored in a template data storage unit. A data area management unit reserves a plurality of data storage areas in the physical connection database, according to the template data in the template data storage unit. A process decision unit stores the device configuration data collected by the device data collection unit into corresponding data storage areas reserved in the physical connection database.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: June 26, 2001
    Assignee: Fujitsu Limited
    Inventor: Yoshitsugi Inoue
  • Patent number: 6252752
    Abstract: A semiconductor switch is installed in a power supply line of a motor, and photocouplers, which constitute a switching control circuit for turning on and off the semiconductor switch, are series-connected between a constant-voltage source and the output ends of a comparator of a starting circuit and a comparator of a trip circuit. An overload at the time of starting the motor is detected by a current transformer, and the semiconductor switch is activated so as to readily cut off the motor driving current.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: June 26, 2001
    Assignee: Tsubakimoto Chain Co.
    Inventor: Tsuneo Nagahama
  • Patent number: 6249522
    Abstract: A path merging type communication apparatus comprises a leaf interface unit, a root interface unit, a controlling unit, and a converting unit. The leaf interface unit and the root interface unit interface with air ATM communication unit or an ATM terminal unit. The controlling unit controls each structural unit of the apparatus. The converting unit merges input ATM cells and switches them. The converting unit adds input path identification information (such as a VPI and a VCI contained in an input ATM cell) and an intra-apparatus header (that contains a leaf IF unit number of the leaf interface unit to which the cell has been input) to the ATM cell and generates an output ATM cell.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: June 19, 2001
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Komine
  • Patent number: 6249682
    Abstract: A speed estimation apparatus detects the change of a transmission power control command transmitted from a receiving station and estimates the moving speed of the receiving station in mobile communications of a spread spectrum system. The speed estimation apparatus also generates a desired signal power by extracting a desired signal from received signals and estimates the moving speed of a corresponding transmitting station using the desired signal power.
    Type: Grant
    Filed: July 27, 1998
    Date of Patent: June 19, 2001
    Assignee: Fujitsu Limited
    Inventors: Tokuro Kubo, Morihiko Minowa
  • Patent number: 6246257
    Abstract: A FIFO circuit with a reduced number of buffers connected to output ports and thereby lowering parasitic capacitance. The FIFO circuit includes an input register for storing data therein supplied from a plurality of input ports. A shifter rearranges the data supplied from the input register and a shift register stores therein and shifts the data supplied from the shifter. A selector circuit selects either the data from the input register or the data from the shift register such that valid data fill places from a least significant side of the output ports. A control circuit controls the input register, the shift register, the shifter, and the selector circuit.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: June 12, 2001
    Assignee: Fujitsu Limited
    Inventor: Hiroyuki Kawahara
  • Patent number: 6244413
    Abstract: The invention concerns a morphology matrix for forming the cross-sectional shape of a short gearing tooth, in particular on toothed wheels of motor vehicle gearboxes. The short gearing teeth are formed on a cylindrical section of a gear wheel or gear shift sleeve, the axis of this section coinciding with the displacement axis of the gear shift sleeve. Each tooth comprises a tip which is chamfered in roof-like manner and has lateral flanks (3) which are shaped towards the tooth base (1) so that they have a relief at least over part of their height. The lateral flanks (3) terminate in a radiused tooth base (4), all of the teeth, or some thereof defined according to a regularly changing pattern, having at least a morphology defining the shape of the lateral flanks.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: June 12, 2001
    Assignee: BLW Praezisionsschmiede GmbH
    Inventors: Peter Gutmann, Georg Tauschek, Gerd Weissmann
  • Patent number: 6246301
    Abstract: A high-frequency circuit apparatus includes two high-frequency circuits (2, 3) mounted on a printed circuit board (1), two rows of first plated through holes (6) which connect upper and lower ground plates (4, 5) on the upper and lower surfaces of the printed circuit board (1) and which are arrayed in a first direction so that the two high-frequency circuits (2, 3) are disposed between the first plated through holes, and at least two columns of second plated through holes (7) which are arrayed in a second direction different from the first direction, between the two high-frequency circuits to connect the ground plates on the upper and lower surfaces of the printed circuit board, to thereby form a waveguide resonator. A variable capacitance diode can be provided to be connected to a conductor pattern which is electrically isolated from the ground plates and the ground plates so as to adjust the resonance frequency of the waveguide resonator.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: June 12, 2001
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Sogo, Jun Oyama
  • Patent number: D444032
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: June 26, 2001
    Assignee: Innovative Premiums
    Inventor: Judah Isaacs
  • Patent number: D444220
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: June 26, 2001
    Assignee: DBK Espana, S.A.
    Inventor: Jordi BasagaƱas