Abstract: A semiconductor photodiode includes a substrate of semi-insulating indium phosphide having a first layer of highly doped P type indium phosphide on a surface thereof. An active second layer of N type indium gallium arsenide is on the first layer and a third layer of N type indium gallium arsenide or indium phosphide is on the second layer. The third layer may be entirely more highly doped than the second layer or may have a highly doped region on its surface. A first contact is on the third layer and a second contact is on the first layer. A buffer layer of lightly doped N or P type indium phosphide may be provided between the first layer and the second layer.
Type:
Grant
Filed:
March 19, 1987
Date of Patent:
December 27, 1988
Assignee:
General Electric Company
Inventors:
Paul P. Webb, John R. Appert, Ronald E. Enstrom
Abstract: A circuit for protecting a protected circuit against radiation has a PIN diode series coupled to a laser, which is optically coupled to a photodiode. The photodiode is coupled to the protected circuit. When radiation occurs, the resistance of the PIN diode increases, which causes the laser to cease emitting light. In turn, the resistance of the photodiode increases, thereby decreasing the current from a power supply through the protected circuit.
Abstract: An Ohmic contact to a semiconductor body includes a thin semiconductor layer disposed between the body and a conductive layer. The thin layer is not alloyed to the conductive layer and not lattice matched to the body. The layer can have a thickness of less than about 100 nm and a lattice mismatch of at least 0.5 percent. Since the thin layer is not alloyed, a Schottky contact can be formed at the same time as the ohmic contact.
Abstract: A semiconductor device comprising an island of semiconductor material disposed on an insulating substrate is disclosed. A MOS transistor is formed in the semiconductor island such that the gate electrode extends over the sidewalls of the island. Diodes are formed between the source and drain regions and the portions of the channel region along the sidewalls to electrically isolate the top transistor from the parasitic edge transistors.
Abstract: Disclosed herein is a method of using an apparatus for ion implanation providing a flood of electrons to neutralize the charge on an ion-implanted wafer after implantation to prevent electrostatic sticking attraction between the wafer and the support mechanism.
Abstract: A transistor amplifier has an integral resistance-capacitance negative feedback network in order to stabilize it and allow a broadband impedance match. To minimize transmission line effects and phase shifts, the capacitor is formed using a control electrode pad as one capacitor plate and the control electrode has integral fingers. The resistor can be of the floating gate type for ease of construction. The transistor can be an FET.
Abstract: A semiconductor device having a layer of semiconductor material disposed on an insulating substrate is disclosed. Source and drain depth extenders are provided within the semiconductor material for extending the respective source and drain regions to the insulating substrate. This device is fabricated in a manner which minimizes damage to the gate oxide layer that often occurs when high energy implants are used to form self-aligned source and drain regions.
Abstract: An integrated circuit includes a substrate of one conductivity type silicon and an epitaxial layer of the opposite conductivity type silicon on a surface of the substrate. An emitter region of the one conductivity type is in the epitaxial layer and a collector region of the one conductivity type is in the epitaxial layer and extends around but is spaced from the emitter region. A third region of the one conductivity type is in the epitaxial layer and extends partly around and is spaced from the collector region. A highly conductive connector region of the opposite conductivity type extends into the epitaxial layer to a buried region of the opposite conductivity type which is along the junction of the epixtaxial layer and the substrate. The connector region contacts the third region. A thin layer of silicon oxide extends over the epitaxial layer. Separate contacts extend through the epixtaxial layer to the emitter region, collector region and to adjacent portions of the third region and the collector region.
Abstract: An antenna includes a truncated waveguide capable of supporting propagation of electromagnetic energy having an electric field component. A dielectric plate is located partially within and partially without the waveguide of the truncation, and is oriented parallel to the E field and the longitudinal axis of the waveguide. An upper half of one side of the dielectric plate bears a conductor pattern defining half of a finline. The lower half of the other side of the dielectric plate bears a second conductor pattern defining the other half of a finline. In the region without the waveguide, the finline diverges to form a radiating portion with high gain. In another embodiment, a finline is formed on both sides of the dielectric plate.
Abstract: A digital television transmitter has a buffer that receives a low resolution low pass filtered signal. A high resolution high pass filtered signal is applied to the buffer only when the buffer can accept it without overflowing in accordance with a threshold signal. A controller provides a control signal that varies in accordance with an interframe difference motion indicator signal and the inverse of the occupancy of the buffer. A digital television receiver receives a digital television picture signal and preferably a transmitter buffer occupancy state signal. A low resolution low pass filtered signal is applied to an adder. A high resolution high pass filtered signal is applied to the adder in accordance with the buffer state and motion indication. The transmitter and receiver are useful in video teleconferencing.
Abstract: Antennas chiefly intended for microwave and millimeter-wave use include geometric-shaped conductive patches on one broad surface of a planar semiconductor substrate. The other broad side of the substrate bears a conductive ground plane. Monolithic PIN diodes are formed by doping the substrate at various points between the conductive patch and the ground plane. Biasing arrangements affect the conduction of the PIN diodes thereby affecting or tuning the optimum operating frequency, the radiation pattern, and/or the impedance of the antenna. In a particularly advantageous configuration, the PIN diodes have lateral dimensions greater than or equal to one-tenth wavelength (.lambda./10) at the operating frequency. Distributed diodes have lower resistance and reactance than discrete or discrete monolithic diodes, thereby providing improved radiating characteristics, and have a relatively large power-handling capability which makes them useful for power transmission.
Abstract: A radiation hardened silicon-on-insulator semiconductor device and method of making the same is disclosed. A region is formed in the silicon layer adjacent the insulating substrate which has a high density of naturally occurring crystallographic defects. This region substantially reduces the back-channel leakage that occurs when the device is operated after being irradiated.
Abstract: An imager includes a substrate of single crystalline silicon of one conductivity type having opposed major surfaces. A Schottky-barrier detector junction is along one of the major surfaces for converting detected radiation to charge carriers. An array of collecting electrodes is in the other major surface of the substrate and are of the same conductivity as the substrate but of higher conductivity. The collecting electrodes are adapted to collect the charge carriers created at the Schottky-barrier junction when the substrate is depleted. Surrounding the collecting electrodes is a well of the opposite conductivity type which isolates the collecting electrodes from each other. Within the well and along the other major surface of the substrate is transfer means, such as a charge-coupled device or MOS transistor circuit, for transferring the charge carriers from the collecting electrodes to an output.
Abstract: An improved method of fabricating thick film dielectrics and copper conductors comprises depositing and drying an appropriate thick-film ink, treating the resulting patterned layer with a carbon dioxide plasma until substantially all of the organic vehicle is removed therefrom and then firing the layer in an inert atmosphere. In an alternate embodiment, a dried dielectric ink is initially treated with an oxygen plasma until about 75 to 99 percent of the vehicle is removed. Multilayer copper-based circuit structure fabricated utilizing the subject method are characterized by excellent integrity of the dielectric layers.
Abstract: The present invention is a method of making an integrated circuit device including a pair of MOSFETs each of which has a source or drain region which shares a common active region with the other. The method includes forming an epitaxial layer from nucleation sites, one of which is the source or drain region of the first MOSFET. The second MOSFET is then formed in the epitaxial layer so that one of the source or drain regions extends from one of the nucleation sites.
Abstract: A semiconductor device having a layer of semiconductor material disposed on an insulating substrate is disclosed. A means is provided within the insulating substrate for minimizing the collection of radiation-induced charge carriers at the interface between the layer of semiconductor material and the insulating substrate. This means significantly reduces the accumulation of positive charges in the insulating substrate which would otherwise cause back-channel leakage when the device is operated after being irradiated. Also, the means minimizes the collection of charge carriers injected from the insulating substrate into the semiconductor device disposed on the insulating substrate. A method of fabricating this semiconductor device is also disclosed.
Type:
Grant
Filed:
December 9, 1986
Date of Patent:
August 23, 1988
Assignee:
General Electric Company
Inventors:
Ronald K. Smeltzer, Alvin M. Goodman, George L. Schnable
Abstract: The present invention provides an optical method of quickly, easily, and accurately determining the degree of amorphism, surface roughness, and presence of a contaminating film on the surface of a SIMOX article. The reflectances of the SIMOX material and a reference single crystalline silicon material are compared. Reflectances are obtained at three selected wavelengths and used to evaluate three simultaneous equations which yield values for the parameters A, B, and C when A, B, and C represent the degree of amorphism, surface roughness, and surface contamination respectively.
Type:
Grant
Filed:
April 23, 1987
Date of Patent:
August 23, 1988
Assignee:
General Electric Company
Inventors:
Guenther Harbeke, Lubomir L. Jastrzebski
Abstract: A method for fabricating an integrated circuit including at least one metal-oxide-semiconductor transistor (MOS) and at least one bipolar transistor is disclosed. The pocket regions used to reduce the short channel effect in the MOS transistor are formed simultaneously with the base region for the bipolar transistor.
Abstract: A radio frequency transmitter simultaneously transmits both a local oscillator frequency and that frequency modulated by an information content signal. A receiver receives a carrier wave that is at the opposite edge of a channel from that of the local oscillator. The transmitted and received information signals can be of opposite type sidebands.
Abstract: A waveguide bandpass filter includes a fenestrated conductive septum which may be printed on a dielectric circuit board. The center frequency is tuned by a dielectric plate parallel with the septum and contiguous with the fenestrations which is movable in a direction orthogonal to the septum.