Abstract: Video signal scrambling and descrambling methods and apparatus for a subscription TV system are provided which are compatible with other equipment operating in accordance with pre-existing modes of signal scrambling and descrambling. Coded indicator signals generated in accordance with the invention are inserted into selected lines of video signals before they are scrambled by a previously installed scrambler located at a central office. The scrambled video signals, with indicator signals inserted, are then sent to all subscriber locations within the TV system. At new subscriber locations, descrambling receivers, in accordance with the present invention, detect and decode the indicator signals and in accordance with a new mode of operation properly descramble the video signals. At old subscriber locations, previously installed descrambling receivers ignore the indicator signals and descramble the video signals in accordance with pre-existing modes of operation.

Abstract: Plasma etching apparatus includes a stack of quartz rings that are spaced apart to form slots therebetween and that are positioned to surround an interaction space between two electrodes of the apparatus where a plasma is formed during operation of the apparatus. The dimensions of the slots are chosen to insure that charged particles of spent gases in the plasma exiting the interaction space are neutralized by wall collisions as they exit the slots. Two voltage sources of different frequencies are used to apply voltages to the electrodes in a fashion that isolates each source from the other.

Abstract: A power-out reset circuit includes reference voltage and current generators to generate a reference voltage and a reference current which are essentially independent of temperature variations over a useful temperature range, a delay/disable circuit, over and under voltage detectors and output logic circuitry. This circuit detects when the voltage level of a supply voltage source (+VDD) exceeds preselected limits. The reference voltage, which is related to the silicon band gap voltage, is connected to a first input of a comparator of each of the voltage detectors. The reference current, which is derived from the silicon band gap voltage, is connected to a current source of each of the detectors. Each detector has a hysteresis circuit which changes the point at which the comparator switches in the event that +VDD crosses into or outside of a preselected operating range.

Abstract: The bandwidth of a packet data transmission node is switched asynchronously without interruption of data transmission and with a minimum of circuit complexity. In particular, a packet channel is permitted to "breathe", gaining bandwidth when additional bandwidth becomes available from other temporarily unused digital channels and losing such additional bandwidth when such unused digital channels revert to other use. To permit such uninterrupted asynchronous operation, a "pad" or "throw away" character is defined which is ignored or discarded when it is received by another packet network node. Such a "pad" or "throwaway" character is unique only in the sense that it is distinct from and may not be confused with characters or bytes which may occur in normal data transmission sequences.

Abstract: A Cable Television (CATV) Converter box or computer has a Smart Card connector mounted in a bottom wall thereof. The Converter box includes a case having a top wall, the bottom wall, and four side walls, a main printed circuit (PC) board mounted within the Converter box and parallel to the top and bottom walls thereof, and a Smart Card connector. The Smart Card connector is mounted directly onto the PC board and within a protrusion of the bottom wall of the Converter box. The Smart Card connector defines an opening which is aligned with a first end of a groove defined in the bottom wall of the case for receiving a Smart Card storing a predetermined signal security decrypting algorithm. A second end of the groove is either formed in one of the side walls of the device or in the bottom wall of the case. The Smart Card is installed by inserting the Smart Card in the groove and placing it into contact with the Smart Card connector.

Abstract: There is disclosed a high density electronic connector assembly (system) having a first insulating portion and a second insulating portion adapted to be mated together and held in precise dimensional relation to each other with a suitable steady force. There are a plurality of contact members projecting down beneath the first portion on very close centers. There is a like plurality of socket holes in the second portion, with a respective printed-circuit (conductor) land at the bottom of each hole. Each land is adapted to act as a spring element to establish a minimum normal contact force. Seated in each hole is a small metal ball. Each ball is adapted to press against a respective contact member of the first portion when the upper and lower portions are fully mated. There is also disclosed a method of seating and re-flow soldering the balls to the respective lands in the socket holes.

Abstract: A diverter interfaces first and second telecommunication lines from first and second telecommunication sources, respectively, with a third line coupled to a station set. The diverter includes separate line and set monitors and a control unit. The line and set monitors monitor and detect predetermined selective signals such as (a) ringing signals propagating on the first and second lines, and (b) line access codes, flash hook, and line change requests signals generated by the station set. In response to the detected predetermined selective signals, the line and set monitors generate first, second, and third output control signals representative of the predetermined selective signals on the first, second, and third lines, respectively, to the control unit.

Abstract: An oscillator system and method in which a time period (inverse of frequency) of a multi-stage ring oscillator (ROSC) is adjusted by a bias current which controls the charging and discharging times of respective capacitors (e.g., interelectrode capacities) within each stage. The time periods of the unadjusted oscillator are counted along with the time periods of a reference clock over a same period of time and a count difference between the two counts is determined. The count difference is applied by a logic circuit in accordance with an algorithm relating count differences to incremental bias current levels to adjust the frequency of the oscillator. The logic circuit generates digital gate signals corresponding to the count difference and these signals automatically select the bias current level needed to bring the oscillator frequency into close agreement with the reference clock frequency.

Abstract: A hub for a segmented virtual local area network with shared media access has at least one internal port for receiving and transmitting digital data messages within the hub and may have at least one external port for receiving and transmitting digital data messages external to the hub. The hub further includes a memory for storing virtual local area network (VLAN) designations for internal and external ports. The hub associates VLAN designations with at least one internal port, stores such VLAN designations in the memory, and associates the stored VLAN designations with messages transmitted from any of the ports to which the VLAN designation has been assigned. Additionally, the hub identifies VLAN designations associated with messages received by or within the hub and means and transmits to any of the internal ports only messages received within the hub and having associated with them a VLAN designation which matches the stored VLAN designation assigned to the port.

Abstract: A high power optical system includes an array of a plurality of semiconductor laser diodes each having a light emitting surface. A plurality of optical fibers each has one end adjacent the light emitting surface of a separate one of the semiconductor laser diodes. A cylindrical lens extends transversely across the one end of each of the optical fibers to direct the light beam from the semiconductor laser diode into the optical fiber. The other ends of the optical fibers are bundled together so as to effectively emit a single beam of a power equal to the combined beams from each of the optical fibers. A delivery optical fiber has an end adjacent the bundled ends of the optical fibers. A lens system, which is between the bundled ends of the optical fibers and the delivery optical fiber, directs the large beam of light emitted from the bundled ends of the optical fibers into the delivery optical fiber.

Abstract: Apparatus for generating two output signals with a selective predetermined constant phase difference therebetween from an input reference signal having a predetermined frequency and phase includes, in one embodiment, a first and a second Programmable Delay, and a first and a second Synthesizer. The input reference signal is provided as separate inputs to the first and second Programmable Delays which generate first and second output signals, respectively, with selective predetermined delay differences therebetween for transmission to the respective first and second Synthesizers. Each of first and second Synthesizers are phase locked loops with a Programmable Divider and an optional Prescaler added to the loop to divide a high frequency output signal generated by a Voltage Controlled Oscillator (VCO) to a frequency of the output signal from the associated Programmable Delay in order to correct for any phase difference between the output signal of the VCO and the input signal from the Programmable Delay.

Abstract: A double conversion frequency converter includes first and second mixing stages. The first mixing stage includes a first programable Local Oscillator (LO) synthesizer and a first mixer, and the second mixing stage includes a second programable LO synthesizer and a second mixer. The first and second LO synthesizers have a wide band tuning range for receiving a separate predetermined reference signal and generating therefrom first and second LO output signals, respectively, which each are changeable by predetermined large frequency steps. The first mixer mixes an input signal to the frequency converter with the first LO output signal for generating a first predetermined mixer output signal. The second mixer mixes a predetermined sideband generated in the first predetermined mixer output signal with the second LO output signal for generating a second predetermined mixer output signal which is use for the output signal for the frequency converter.

Abstract: A device for testing the performance of high speed integrated circuits (ICs) while in wafer form or separated from the wafer which includes first and second spaced-apart probes fixedly mounted on a support member for accurately positioning the first and second probes in three dimensions for contacting at least one first point and a second point, respectively, on an IC under test. The first and second probes are interconnected at a predetermined portion of their length by a capacitor means which provides sufficient flexibility so as to facilitate independent movement of the first and second probes and avoid introducing parameters (e.g., inductance) which interfere with high speed testing of the IC. In one embodiment, the first probe is a transmission line probe (e.g., a coaxial line) and the second probe is a wire probe for supplying power to the second point on the IC.

Abstract: There is disclosed a high density electronic connector assembly (system) having a first insulating portion and a second insulating portion adapted to be mated together and held in precise dimensional relation to each other with a suitable steady force. There are a plurality of contact members projecting down beneath the first portion on very close centers. There is a like plurality of socket holes in the second portion, with a respective printed-circuit (conductor) land at the bottom of each hole. Each land is adapted to act as a spring element to establish a minimum normal contact force. Seated in each hole is a small metal ball. Each ball is adapted to press against a respective contact member of the first portion when the upper and lower portions are fully mated. There is also disclosed a method of seating and re-flow soldering the balls to the respective lands in the socket holes.

Abstract: A distributed digital communications network has an originating node and a multiplicity of destination nodes. The various nodes are interconnected by links and at least some of the nodes are accessible to other nodes only by multiple links. To save time in establishing the least cost path from an originating node to a destination node, the attributes of the various links are stored in memory at the originating node, a least cost path from the originating node to a destination node is calculated in response to a connection request and stored in memory. Then, when a subsequent connection request to any destination node requires the same link attributes as the least cost path already stored in memory, that same least cost path is used if it is still operational. Significant time saving is achieved in that no new least cost calculation need be made.

Abstract: In a memory system, which includes a dynamic random access memory (DRAM) that has to be precharged before the contents thereof can be selectively read out into a static register, there is provided means for reading the memory contents of the memory cells of a part or the whole of a row of memory cells of the DRAM into the static register while concurrently precharging the DRAM for a subsequent read-out command. This reduces the overall cycle time of the memory array since read-out of the static register can occur during precharge.

Abstract: A process and hold system includes a bipolar logic section which is clocked on and off by a first field effect transistor and a bipolar latch section which is clocked on and off by a second field effect transistor. Emitter coupled logic is used in both the logic and latch sections in order to obtain high speed operation. Each of the field effect transistors is used as an on-off switches which has low impedance between the drain and source thereof when enabled and conducting. Outputs of the logic section are coupled to inputs of the latch section. Complementary clock signals are used to control the first and second field effect transistors so that one of the logic and latch section is enabled at a time. The logic section uses a two level emitter coupled tree configuration in order to increase logic capability. The use of the field effect transistors facilitates the use of a power supply having a voltage level of +3.6 volts.

Abstract: An electrostatic latent image on a photoconductor of an electrophotographic device is developed by a gray scale monocomponent nonmagnetic development system using a combination of AC and DC bias voltages applied to a developer roller and a monocomponent nonmagnetic developer applied to the developer roller by an adder roller. The developer comprises a mixture of toner particles charged to one polarity and transparent beads charged to the opposite polarity, by triboelectric charging in bulk in an alternating field between the two rollers, rather than by friction contact with apparatus surfaces. The adder roller applies the charged mixture to the developer roller for developing the latent image in an electric field to an image density determined by the magnitude of the DC bias. A DC bias may be applied to the adder roller, especially to provide a gradient relative to the DC component of the developer roller bias for driving the bulk charged mixture onto the developer roller.

Abstract: There is disclosed a high density test probe assembly, and method of fabricating it. The probe assembly has a multitude of wire-like probe elements whose exposed tips are spaced on centers X and Y to match the centers of closely spaced surface pads of a VLSI circuit. Interconnections to and from the probe elements (for connection to external test equipment) are provided by a multi-layer arrangement of insulating and conducting layers within the body of the probe assembly. The tips of the probe elements are canted relative to vertical so that when the probe assembly is pushed down into mating position onto a VLSI circuit, the probe elements uniformly deflect laterally in one direction only and give a "wiping" action in contacting surface pads of the VLSI circuit together with a desired normal contact force. The method of fabricating the probe assembly includes forcing all of the probe elements through staggered vias in the multilayer arrangement.

Abstract: There is disclosed a high density electronic connector system in which a plastic insulating body supports on one or more levels a plurality of conductive circuit traces. Output contacts to these traces are provided by small metal balls. The metal balls are driven into tight contact with respective ones of the conductive traces and captivated by the plastic body. The balls are covered with gold and provide miniature, wear resistant closely spaced output contacts in the connector system.