Patents Represented by Attorney J.C. Patent
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Patent number: 8226181Abstract: A slide rail structure is provided. The slide rail structure is disposed between a computer case and a rack, and includes a first slide rail and a second slide rail. The first slide rail is fixed to the rack. The second slide rail has a first end, a second end and a carrying part. The second slide rail is fixed to the rack via the first end, and is connected to the first slide rail via the second end. The carrying part contacts a bottom plate of the computer case for sliding the computer case on the carrying part.Type: GrantFiled: November 18, 2008Date of Patent: July 24, 2012Assignee: Inventec CorporationInventors: Lian-Chang Du, Shou-Jen Yang
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Patent number: 8229011Abstract: A fine symbol timing synchronization method and apparatus in an orthogonal frequency-division multiplexing (OFDM) system are provided. The fine symbol timing synchronization method finds a path with a minimum mean square error (MMSE) as a first path among a plurality of paths, and a formula of the mean square error (MSE) used by the method is a simplified formula of the original MSE formula with low calculation complexity. Therefore, the time required by the fine symbol timing synchronization method is short, and a correct first path can be found, so as to lock a starting position of a fast Fourier transform (FFT) window on a starting position of a symbol signal of the correct first path.Type: GrantFiled: November 26, 2008Date of Patent: July 24, 2012Assignee: ALi CorporationInventor: Yu-Ting Xu
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Patent number: 8230220Abstract: A method for realizing trusted network management is provided. A trusted management agent resides on a managed host, and a trusted management system resides on a management host. The trusted management agent and the trusted management system are software modules, which are both based on a trusted computing platform and signed after being authenticated by a trusted third party of the trusted management agent and the trusted management system. Trusted platform modules of the managed host and the management host can perform integrity measurement, storage, and report for the trusted management agent and the trusted management system. Therefore, the managed host and the management host can ensure that the trusted management agent and the trusted management system are trustworthy. Then, the trusted management agent and the trusted management system execute a network management function, thus realizing the trusted network management.Type: GrantFiled: December 4, 2009Date of Patent: July 24, 2012Assignee: China Iwncomm Co., Ltd.Inventors: Yuelei Xiao, Jun Cao, Xiaolong Lai, Zhenhai Huang
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Patent number: 8227791Abstract: A strain balanced active-region design is disclosed for optoelectronic devices such as light-emitting diodes (LEDs) and laser diodes (LDs) for better device performance. Lying below the active-region, a lattice-constant tailored strain-balancing layer provides lattice template for the active-region, enabling balanced strain within the active-region for the purposes of 1) growing thick, multiple-layer active-region with reduced defects, or 2) engineering polarization fields within the active-region for enhanced performance. The strain-balancing layer in general enlarges active-region design and growth windows. In some embodiments of the present invention, the strain-balancing layer is made of quaternary InxAlyGa1-x-yN (0?x?1, 0?y?1, x+y?1), whose lattice-constant is tailored to exert opposite strains in adjoining layers within the active-region. A relaxation-enhancement layer can be provided beneath the strain-balancing layer for enhancing the relaxation of the strain-balancing layer.Type: GrantFiled: January 25, 2010Date of Patent: July 24, 2012Assignee: Invenlux LimitedInventor: Chunhui Yan
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Patent number: 8227271Abstract: A packaging method of wafer level chips including following steps is provided. First, a plurality of chips attached on a first film is provided, and the chips on the first film are disposed respectively corresponding to a plurality of electrode patterns of a substrate. Then, a phosphor layer is respectively formed on at least one surface of each of the chips. Next, a second film is disposed on the phosphor layers, and the second film is opposite to the first film. Further, the first film is removed from the base surface of each of the chips. Then, the base surfaces of the chips are attached to the substrate. Afterward, each of the chips is electrically connected with the corresponding electrode pattern through a wire bonding. Finally, a packaging gel is provided to cover each of the chips, and the packaging gel is solidified.Type: GrantFiled: June 22, 2011Date of Patent: July 24, 2012Assignee: Himax Technologies LimitedInventor: Sin-Hua Ho
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Patent number: 8228669Abstract: A server chassis layout structure includes a chassis body, a partition plate, and a power backplane module. The chassis body includes a bottom plate, first and second top plates, and two side plates. The first and second top plates form a first opening therebetween. The side plates are mounted between the bottom and top plates. The partition plate includes at least one retaining portion and is perpendicularly fixed to the bottom plate below the first opening. The partition plate divides the chassis body into first and second sections. The power backplane module includes at least one lock portion and is vertically inserted into the chassis body via the first opening. The lock portion interferes with the retaining portion so as to assemble the power backplane module into the chassis body above the partition plate, and both the power backplane and the partition plate are exposed via the first opening.Type: GrantFiled: December 10, 2009Date of Patent: July 24, 2012Assignee: Inventec CorporationInventors: Yong-Liang Hu, Yang Zhang, Ji-Peng Xu, Tsai-Kuei Cheng
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Patent number: 8230302Abstract: A data protection method is provided. The data protection method is adapted for a plurality of pages of a plurality of blocks in a memory. The data protection method records bit error weight values and erasing times of the blocks during routine operations of the memory. Therefore, when the system is in an idle status, the data of those blocks having higher bit error weight values can be recovered. Further, the data protection method moves data of those blocks having less erasing times to other blocks, so as to release the blocks having less erasing times from the data area for use. Then, the data protection method utilizes all blocks of the non-volatile memory in an average manner, so as to effectively protect the data saved in the memory and average the erasing operations.Type: GrantFiled: February 5, 2009Date of Patent: July 24, 2012Assignee: ALi CorporationInventors: Wei-Tsz Hung, Yen-Lung Chiu, Yu-Hsiang Chiu
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Patent number: 8220930Abstract: An integrated opto-electronic device, a portable reflective projection system and a method for in situ monitoring and adjusting light illumination are provided. The device includes a reflective polarizing composite film (150) configured to receive a source light (210) at a desired non-normal incident angle (221), polarizes and reflects a first portion (211) of said source light (210) as polarized illumination light (16) at a reciprocal angle (222) to said desired non-normal incident angle (221); and a photovoltaic cell (180), adhered to an opposite side of said reflective polarizing composite film (150) to said source light (210), configured to receive a second portion (212) of said source light (210) that passes through said reflective polarizing composite film (150) and transform said second portion (212) to photogenerated charge. Unused illumination can be collected in order to re-store and reuse recovered energy.Type: GrantFiled: March 25, 2009Date of Patent: July 17, 2012Assignee: Shanghai Lexvu Opto Microelectronics Technology Co., Ltd.Inventor: Deming Tang
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Patent number: 8222941Abstract: A phase selector including a plurality of buffers, a multiplexer, a first inverter, and a selecting circuit is provided. Each of the buffers provides a clock signal, and the clock signals have different phases. The multiplexer selectively outputs one of the clock signals as a switch signal according to a first control signal, wherein the first control signal is first portion of bits of a selecting signal. The input terminal of the first inverter receives a second control signal, wherein the second control signal is second portion of bits of the selecting signal, and the output terminal of the first inverter outputs an inverted signal. The selecting circuit transmits the second control signal of the selecting signal or the inverted signal to the output terminal of the phase selector according to the logic state of the switch signal.Type: GrantFiled: April 14, 2010Date of Patent: July 17, 2012Assignee: Himax Technologies LimitedInventors: Wen-Teng Fan, Chan-Fei Lin, Shih-Chun Lin
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Patent number: 8222573Abstract: A dual-spectrum intelligent cooking and baking machine without oil fume includes a housing, a top cover, an inner cylinder with heat preservation, an inner cooking and baking machine and a control circuit. An upper heater is disposed on the inner top surface of the top cover, and a lower heater is disposed on the inner undersurface of the inner cylinder with heat preservation. The upper heater and the lower heater are optical heaters. An insulating layer with light and heat penetration is disposed on the lower heater. The inner cooking and baking machine is a pan, a stockpot or a barbecue net rack. The pan or the stockpot is disposed moveably on the upper surface of the insulating layer with light and heat penetration. The barbecue net rack is disposed moveably over the insulating layer with light and heat penetration and is connected with the motor by the coupling device.Type: GrantFiled: August 19, 2009Date of Patent: July 17, 2012Inventors: Haipeng Qian, Jianjun Liu, Bo Qian
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Patent number: 8222743Abstract: A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host.Type: GrantFiled: May 27, 2009Date of Patent: July 17, 2012Assignee: Phison Electronics Corp.Inventors: Yu-Fong Lin, Hung-Yi Chung, Yu-Tong Lin, Yun-Chieh Chen
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Patent number: 8220935Abstract: An illumination system including a first light emitting chip, a chip package, a first dichroic film, and a second dichroic film is provided. The first light emitting chip emits a first light beam. The chip package includes a second light emitting chip and a third light emitting chip. The second light emitting chip emits a second light beam. The third light emitting chip emits a third light beam. The colors of the first, second, and third light beams are different from each other. The first dichroic film is disposed in the transmission paths of the first and second light beams. The second dichroic film is disposed in the transmission paths of the first, second, and third light beams. The first and second dichroic films are not parallel to and do not intersect each other. Besides, a projection apparatus employing the illumination system and another projection apparatus are provided.Type: GrantFiled: October 22, 2009Date of Patent: July 17, 2012Assignee: Young Optics Inc.Inventors: Bo-Cheng Huang, S-Wei Chen, Chu-Ming Cheng
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Patent number: 8225067Abstract: A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page.Type: GrantFiled: March 27, 2009Date of Patent: July 17, 2012Assignee: Phison Electronics Corp.Inventors: Chien-Hua Chu, Chih-Kang Yeh, Kok-Yong Tan
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Patent number: 8215682Abstract: An unlocking structure including a board element, a locking element, and a guiding element is provided. The board element has a first surface, a second surface, and at least one first opening. The locking element with at least one hook and at least one first elastic arm is disposed on the first surface of the board element. The hook is connected to the first elastic arm and passes through the first opening to protrude from the second surface of the board element. The guiding element is slidingly disposed on the first surface of the board element and is located between the board element and the locking element. The guiding element has at least one guiding inclined plane. The guiding inclined plane is suitable to structurally interfere with the first elastic arm, so as to drive the hook to exit from the second surface towards the first surface.Type: GrantFiled: March 3, 2009Date of Patent: July 10, 2012Assignee: Inventec CorporationInventor: Yung-Chin Hsu
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Patent number: 8216489Abstract: The invention provides a liquid crystal compound represented by the following formula having stability to heat, light and so forth, a wide temperature range of a nematic phase, a small viscosity, a large optical anisotropy and a suitable elastic constant K33 (K33: bend elastic constant), and further having a suitable and negative dielectric anisotropy and an excellent compatibility with other liquid crystal compounds, and provides a liquid crystal composition including the compound, wherein R1 and R2 are hydrogen, alkyl or the like, ring A1 is trans-1,4-cyclohexylene, 1,4-phenylene or the like, L1 to L4 are hydrogen or fluorine, and at least three of them are fluorine; when the ring A1 is trans-1,4-cyclohexylene or the like, Z1 is a single bond, —(CH2)2— or the like, when ring A1 is 1,4-phenylene, Z1 is —(CH2)2— or the like.Type: GrantFiled: March 25, 2009Date of Patent: July 10, 2012Assignees: JNC Corporation, Chisso Petrochemical CorporationInventor: Masahide Kobayashi
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Patent number: 8219824Abstract: A storage apparatus having a non-volatile memory and a controller is provided, wherein the non-volatile memory includes a root directory area and a data area, and a password file is stored in the root directory area. The controller identifies a user by using a password in the password file, and the user can access the data area through an encryption/decryption unit of the controller only if the user passes the identification. By using the secured storage apparatus, the risk of the password and encrypted data being cracked is reduced. Accordingly, the protection over the data stored in the storage apparatus is enhanced.Type: GrantFiled: June 29, 2007Date of Patent: July 10, 2012Assignee: Phison Electronics Corp.Inventor: Ching-Wen Chang
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Patent number: D663443Type: GrantFiled: March 18, 2011Date of Patent: July 10, 2012Assignee: Toshiba Lighting & Technology CorporationInventors: Nobuhiko Betsuda, Kiyoshi Nishimura, Kozo Uemura, Shuhei Matsuda, Soichi Shibusawa
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Patent number: D663444Type: GrantFiled: March 18, 2011Date of Patent: July 10, 2012Assignee: Toshiba Lighting & Technology CorporationInventors: Nobuhiko Betsuda, Kiyoshi Nishimura, Kozo Uemura, Shuhei Matsuda, Soichi Shibusawa
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Patent number: D663865Type: GrantFiled: March 18, 2011Date of Patent: July 17, 2012Assignee: Toshiba Lighting & Technology CorporationInventors: Nobuhiko Betsuda, Kiyoshi Nishimura, Kozo Uemura, Shuhei Matsuda, Soichi Shibusawa
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Patent number: D663866Type: GrantFiled: March 21, 2011Date of Patent: July 17, 2012Assignee: Toshiba Lighting & Technology CorporationInventors: Nobuhiko Betsuda, Kiyoshi Nishimura, Kozo Uemura, Shuhei Matsuda, Soichi Shibusawa