Abstract: A transponder device having an LC oscillator circuit, an energy storage capacitor and an integrated transponder circuit powered by energy from the storage capacitor. The device operates either in a charge mode in which RF energy is received through the LC oscillator circuit and stored in the energy storage capacitor, or in a transmit mode in which data from the transponder circuit are transmitted from the transponder device through the LC oscillator circuit by sustaining oscillation of the LC oscillation circuit and selectively modulating the oscillator frequency. The device further includes a stimulating circuit to feed energy from the storage capacitor into the LC oscillator circuit during the transmit mode and to sustain oscillation thereof, a peak detector for detecting a peak voltage level of an RF oscillator signal in the LC oscillator circuit and a pulse generator for providing trigger pulses to the stimulating circuit in response to an output from the peak detector.

Abstract: A circuit and method for reducing the variation of a reference voltage as a function of resistivity ? in a current-mode bandgap reference circuit generating a reference current that is applied to an output resistor to generate the reference voltage. According to the invention, a substantially constant current is generated and added to the reference current.

Abstract: A vehicular tire pressure monitoring system, including a transponder unit (10) for each tire to be monitored, the transponder unit having an incorporated RF transmitter (12) and being physically associated with the tire to be monitored. A pressure sensor for each tire to be monitored is connected to circuitry in a corresponding transponder unit. An interrogator unit (7) is associated with each transponder unit and physically mounted on a vehicle in proximity to a wheel (9) whereon a tire to be monitored is mounted. A central RF receiver (4) for all transponder units is provided. Each transponder unit is inductively coupled with an associated interrogator unit and includes an electric charge accumulation element adapted to be charged by energy inductively supplied from the associated interrogator unit in a first mode of operation, and the charge accumulation element providing a power supply to the RF transmitter of the transponder unit in a second mode of operation.

Abstract: A power management circuit for a system that has combined power supplies from an inductively coupled circuit and from a battery comprises voltage sensing circuitry for sensing the voltage of each of the power supplies. A switching arrangement selectively connects one of the power supplies with a user or with plural users. The switching arrangement is controlled by appropriate control circuitry in response to outputs from the voltage sensing circuitry. The power management makes the best use of energy received over the inductive interface to preserve battery lifetime.

Abstract: A clock synthesis circuit) including a phase-locked loop and one or more frequency synthesis circuits is disclosed. The phase-locked loop includes a voltage-controlled oscillator (VCO) having a sequence differential stages o produce equally spaced clock phases. The frequency synthesis circuit includes a sequence of adder-and-register units that select one of the VCO clock phases. An output multiplexer receives each of the selected clock phases, and selects among these clock phases in sequence; the output of the multiplexer is applied to a first toggle flip-flop that changes state in response to rising edge transitions at the output of the multiplexer. A second toggle flip-flop is clocked by the output of the first toggle flip-flop, itself toggling in response to rising edge transitions at the output of the first toggle flip-flop. One or more additional flip-flops can be similarly connected in sequence.

Abstract: One embodiment provides a system for protecting at least one component in an integrated circuit (IC). The system includes a disconnect element that is electrically connected in series between a terminal of the IC and the at least one component. The disconnect element is configured to have a first state to permit an electrical signal to propagate from the terminal to the at least one component and a second state corresponding to a high impedance condition that electrically disconnects the terminal relative to the at least one component. A control system is configured to cause the disconnect element to transition from the first state to the second based on at least one predetermined activation condition.

Abstract: The present invention is directed to a diagnostic compiler for use with a pipeline analog-to-digital converter (ADC) having code sequences corresponding to stages thereof. In one embodiment, the diagnostic compiler includes a transition locator configured to determine transition locations for the code sequences. The diagnostic compiler also includes a characteristics indicator coupled to the transition locator and configured to provide at least one characteristic of the ADC based on the transition locations.

Abstract: Estimation of gain and phase imbalance of an upconverting transmitter. A transmitter transmits symbols containing vector components of pre-specific relationship in an analog signal. A receiver (also contained in a transceiver along with the transmitter) examines the symbols to determine the phase and gain imbalances in the transmitter based on the analog signal. An aspect of the present invention enables the balance estimation circuit to be integrated along with the transmitter and the receiver into a single monolithic integrated circuit.

Abstract: A method and apparatus for use in a multi-phase power system. The power system is of the type having a plurality of Pulse Width Modulation (PWM) controllers including a first PWM controller and at least one second PWM controller. The first PWM controller generates at least one first PWM output signal based on a cyclic signal having a cyclically recurring parameter, and provides the cyclic signal including the cyclically recurring parameter to the second PWM controller. The second PWM controller generates at least one second PWM output signal based on the cyclic signal, and synchronizes the generation of the first and second output signals using the cyclically recurring parameter within the cyclic signal, thereby maintaining a predetermined phase relationship between the first and second output signals.

Abstract: A method and apparatus for providing extended upstream data transmission in a band having a lowest frequency f0 by an end user terminal unit in an asymmetric digital subscriber line communication between a central office terminal unit and the end user terminal unit, using a loop having a length. In the method, a target rate of upstream data transmission is provided. A plurality of sets of values are determined, of (1) an extension frequency f2 that is higher than a frequency f1 for upstream data transmission, f1 being a frequency established for non-extended upstream data transmission, the region bounded by f1 and f2 being an extension band for upstream data transmission, and (2) a maximum power level S2 for the extension band determined by the extension frequency in the set.

Abstract: A thermal shutdown circuit for protecting a main FET that conducts a load current ILOAD. A reference circuit provides a temperature current proportional to temperature. A thermal sensor circuit has a resistor and generates an output signal signaling thermal shutdown when the voltage generated across the resistor by the temperature current exceeds a predetermined value. A sense FET having a size smaller than the main FET conducts a sense current ISENSE proportionately smaller than ILOAD. A current mirror mirrors a scaled current proportional to ISENSE to be conducted through the resistor, the scaled current being scaled so as to cause the voltage generated across the resistor to exceed the predetermined value when ILOAD exceeds a predetermined value.

Abstract: An amplifier (10) includes a first stage (4) including differentially coupled first (Q1) and second (Q2) input transistors and a controlled active load circuit (6). A second stage (8) includes differentially coupled third (Q5) and fourth (Q6) input transistors and a load circuit (Q7,8). A first output (2A) of the first stage (4) is coupled to a first input of the second stage (8), a second output (2B) of the first stage (4) being coupled to a second input of the second stage (8). A common mode feedback amplifier (12) has an input coupled to receive a common mode signal (3) from the second stage (8) for producing an amplified common mode signal (9) on a control input of the controlled active load circuit (6) to provide fast settling of an output (Vout) of the second stage without substantially increasing amplifier noise.

Abstract: Disclosed are methods and systems for automatic level control (ALC) in a video signal processing system. The new ALC of the invention takes into account the gain applied to the video signal, such as that provided by an associated automatic gain control (AGC). Methods and systems of the invention use present gain control values and previous gain control values in quickly converging to a new offset control value.

Abstract: A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

Abstract: A reverse battery protection circuits that provides an integrated reverse battery condition solution for protection of external NMOS switches during the reverse battery condition is disclosed herein. This reverse battery protection circuit minimizes power consumption during a reverse battery event wherein there is no need for mechanical adjustments such as heat sinking and clamping to extract the heat away from the silicon and not destroy the device. Specifically, the reverse battery protection circuit includes a push-pull gate drive circuit coupled between the first and second power supply rail. A protection subcircuit portion connects between a first output node and the second power supply rail to turn the external FET ‘on’ during the reverse battery condition. In particular, the protection subcircuit portion connects to the external FET device and includes a p-channel device connected between a second output node that biases the external FET device and a first diode.

Abstract: The present invention facilitates data recovery without requiring selection of a sample phase. The data is recovered by sampling a received signal to obtain a number of samples at a number of phases over a given time period referred to as a bit time. The samples are analyzed to determine if a transition has occurred in one or more consecutive phases. Such a transition is also referred to as a data toggle. Generally, one or more toggles in a single bit time indicate one data value (e.g., a zero) whereas no transitions indicate another data value (e.g., a one).

Abstract: A DC-to-DC power regulator circuit, such as a synchronous buck DC-to-DC converter circuit, having improved efficiency. A power stage is provided, having an input port for receiving a DC input voltage and having an output port for providing a regulated DC output voltage. The power stage includes a control FET transistor having a first terminal, a second terminal, and a gate, the first terminal being connected to the input port. An energy storage element has a first terminal connected to the control FET output terminal and a second terminal connected to the output port. A driven FET transistor has a first terminal connected to ground, a second terminal connected to the first terminal of the energy storage element, and a gate. A driver circuit has an input adapted to receive a control signal, and provides first driver signal to the control FET gate and a second driver output signal to the driven FET gate.

Abstract: The present invention facilitates clock and data recovery for serial data streams by selecting a clock phase for each input data transition and generating a recovered clock. In order to identify data transitions, the received serial data stream is sampled N times per ideal bit time, where the minimum value for N must be greater than 2/(1?(2*jitter_ratio)) and jitter_ratio is the fractional representation of the portion of the ideal bit time during which transitions can be expected or estimated to occur. On identifying a transition, a toggle phase is set. In order to avoid stale clock phase selection resulting from jitter and the like, one phase after the toggle phase is blocked or prevented from being selected for the clock. Finally, a clock phase is selected N/2 phases from the toggle phase and a recovered clock is generated by combining the individually selected clock phases.

Abstract: A write driver (38) produces balanced voltages across head (32) by using the input write data (WDX and WDY) drive transistors of a slower transistor type (typically PNP) on one half of an H-bridge configuration, while transistors of a faster transistor type (typically NPN) in the other half of the H-bridge configuration are driven indirectly by transistors of the slower type, with a trans-resistance in series with transistors of the faster type. Accordingly, the voltage nodes on either side of the write head are pulled to Vcc and Vee symmetrically. A trans-resistance block (40) uses current sources to pull current from capacitive nodes for faster switching.

Abstract: In one embodiment, an automated emergency alert system includes a handheld portable communication device operable to initiate communication over a wireless telecommunications network, a dynamic sensor operable to generate an acceleration profile for the device, and a memory operable to store one or more predefined acceleration profiles each associated with an emergency event.