Patents Represented by Attorney James Brady
  • Patent number: 7184232
    Abstract: An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: February 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Motomu Hashizume, Jinguji Naoko, Indumini Ranmuthu, Neel Seshan
  • Patent number: 7183823
    Abstract: In the proposed method of generating a pulsed output signal from a periodic ramp signal and a reference voltage, the linear range of duty cycles of the pulsed output signal is significantly extended to minimum values. The ramp signal and the reference voltage are applied to inputs of a comparator and the output signal is taken from an output of the comparator. The ramp signal has a ramp that extends between a minimum voltage level and a maximum voltage level. The duty cycle of the pulse signal is controlled by varying the reference voltage between the minimum and maximum voltage levels. The ramp has an initial start section extending from the minimum voltage level and a main section extending between the initial section and the maximum voltage level. The ramp slope has a constant value over the main ramp section and a value greater than the constant value over the initial section.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Neil Gibson, Kevin Scoones
  • Patent number: 7180159
    Abstract: A bipolar transistor in a monocrystalline semiconductor substrate (101), which has a first conductivity type and includes a surface layer (102) of the opposite conductivity type. The transistor comprises an emitter contact (110) on the surface layer; a base contact (130 and 131) extending through a substantial portion (141) of the surface layer, spaced apart (140a) from the emitter; an insulator region (150/151) buried under the base contact; a collector contact (120); and a first polycrystalline semiconductor region (152/153) selectively located under the insulator region, and a second polycrystalline semiconductor region (154) selectively located under the collector contact. These polycrystalline regions exhibit heavy dopant concentrations of the first conductivity type; consequently, they lower the collector resistance.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: February 20, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Gregory E. Howard
  • Patent number: 7176985
    Abstract: An apparatus, system and method for clamping a video signal input to a coupling capacitor (215) for providing a clamping voltage. A charging current is applied to the capacitor (215) via an amplifier (225) having a first input (227) coupled with the capacitor output and a second input (226) coupled to a reference potential, the amplifier (225) is responsive to the capacitor output signal and the reference potential for providing the charging current to the capacitor (215). The current has a linearly varying magnitude which is proportional to a difference between the capacitor output and the reference potential.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: February 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Feng Ying, Erkan Bilhan, Haydar Bilhan, James E. Nave
  • Patent number: 7176760
    Abstract: An operational amplifier (1A or 1B) includes a translinear transconductance stage (2B or 2C) receiving an input signal (Vin) of the operational amplifier and operative to produce a first current (ID18) having a square-law relationship to the input signal (Vin) and a folded cascode operational amplifier (3B) including a differential input stage coupled to receive the input signal (Vin), a folded cascode stage coupled to the differential input stage, and a class AB output stage (45) coupled to the folded cascode stage. The differential input stage includes a tail current source (34) coupled to the translinear transconductance stage and operative to produce a square-law tail current (ID34) scaled to the first current (IDI8) to provide a substantially constant input transconductance for a relatively large range of magnitudes of the input signal (Vin).
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Mark A. Jones
  • Patent number: 7177772
    Abstract: A method for measuring noise parameters includes generating a noise signal at a noise source. The noise signal includes a first input signal at a first frequency and a second input signal at a second frequency. The first input signal and the second input signal are modulated onto a carrier to generate a modulated signal. The modulated signal is attenuated to a desired power level and applied to a device under test to obtain a noise measurement.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: February 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Henry P. Largey, Dale A. Heaton, Lianrui Zang
  • Patent number: 7173340
    Abstract: A bottom die and a top die stacked on the bottom die are configured to provide a daisy chain function. Both die include an input/output function control bonding pad (20G), a first bonding pad (20C) controllable to function as either an input or an output, and a second bonding pad (20E) controllable to function as either an output or an electrically floating pad in response to a corresponding input/output function control signal. The top die (30) is stacked on the bottom die (20) and the first bonding pad (20C) of the bottom die (20) is wire bonded to the first bonding pad (30C) of the top die (30). A first reference voltage (VDD) on the function control bonding pad of the bottom die configures its first bonding pad as an output and its second bonding pad as electrically floating, and a second reference voltage (VSS) on the function control bonding pad of the top die configures its first bonding pad as an input and its second bonding pad as an output, to thereby provide the daisy chain function.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: February 6, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Binling Zhou, James L. Todsen, Brian D. Johnson
  • Patent number: 7171435
    Abstract: A digital signal system (30) for determining an approximate logarithm of a value of x having a base b is described. The system comprises circuitry for storing x as a digital representation, identifying a most significant digit (MSD) of the digital representation, a table for storing a set of predetermined logarithms having the base b, circuitry for addressing the table in response to a first bit group (t) of the set of bits in respective lesser significant bit locations and for outputting a one of the predetermined logarithms corresponding to a first number (la) in the set of numbers, and circuitry for outputting the approximate logarithm of the value of x in response to the one of the predetermined logarithms and in response to a function estimation between logarithms at a first and second endpoint.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: January 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Rustin W. Allred
  • Patent number: 7171035
    Abstract: An alignment mark to be used in conjunction with e-beam imaging to identify specific feature locations on a chip including a unique “L” shaped pattern of geometric features, which is easily detected by the recognition system of e-beam imaging equipment, and is located in close proximity to the specific circuit features under investigation at each level to be inspected. The requirements for an alignment mark design which is recognizable by state-of-the-art e-beam imaging systems are enumerated, as well as the methodology for application. The alignment marks which are included at each critical step add no cost to wafer processing, and any design cost is easily overcome by reduction in process development time by using defect learning.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: January 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Richard L. Guldi, Karanpreet Chahal
  • Patent number: 7170667
    Abstract: A microelectromechanical device with a plastically deformable element of is exposed to illumination light so as to elongate the lifetime of the device on the customer side.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: January 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Jonathan Doan
  • Patent number: 7171577
    Abstract: A power-saving clock divider scheme is cost-effective, flexible, jitterless, and allows the user to keep track of time. In general, the clock divider selectively operates in a normal mode and one or more divide modes, wherein the divide modes provide a clock frequency that is a fraction of the normal clock frequency by a divisor value that is specified in a user-accessible divider register. Lower divisor values (e.g., 2, 4, 8, etc.) are preferably used for performance tuning, while large divisor values (e.g., 1024, 2048, and 4096) are preferably used for power saving.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: January 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Hugo Cheung, Herbert Braisz
  • Patent number: 7167334
    Abstract: Disclosed are methods and apparatus for digital control of a head-disk assembly actuator with dynamic velocity compensation. In preferred methods of the invention steps are disclosed in which, the actuator voltage in an HDA is sampled and a velocity error is determined. The voltage applied to the actuator is compensated for the velocity error. Disclosed methods of the invention also include steps for measuring the actual voltage at the actuator motor and alternatively, for calculating the actuator motor voltage using digital processing techniques. A digital voltage command is then provided for applying compensated voltage to the actuator motor. Apparatus for implementing the methods of the invention in a hard drive assembly having an actuator motor is also described.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: January 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: John Kevin Rote, Liyong Chen
  • Patent number: 7167148
    Abstract: Data processing methods and apparatus used in digital display system transpose pixel-by-pixel data into bitplane-by-bitplane data. The methods and apparatus are especially useful for dynamically transposing high-speed flowing-through pixel data in a “real-time” fashion. In a transpose process, a stream of pixel data is received by a plurality of input lines of the transpose apparatus. The received pixel data are delayed by a set of delay units and then permutated by one or more switches according to a predefined delay scheme and permutation rule. After permutation, the stream of data is delayed so as to finalize the transpose process.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: January 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Peter W. Richards
  • Patent number: 7165711
    Abstract: A substrate that is not lying flat on its substrate tray can present significant process problems when a vacuum pickup attempts to pick up the substrate and fails due to the lack of a proper bond forming between the pickup and the substrate. The substrate left behind on the substrate tray could require human intervention. Intervention slows down the manufacturing process and increases costs. A method and apparatus to ensure that substrates are lying flat when presented to the vacuum pickup pad is disclosed. A plate with protrusions is raised into a substrate tray with holes. The protrusions lift the substrates up off the bottom of the substrate tray and ensure that they are laying flat when presented to the vacuum pickup pad.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: January 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anthony A. Barretto, Bernardo Abuan, Emory T. Mercado
  • Patent number: 7164199
    Abstract: A microelectromechanical device package and a low-stress inducing method for packaging a microelectromechanical device are disclosed in this invention. The microelectromechanical device is accommodated within a cavity comprised by a first package substrate and a second substrate, wherein a third substrate is disposed between and bonded to both the microelectromechanical device lower semiconductor substrate and the package bottom substrate. The first and second package substrates are then bonded so as to package the microelectromechanical device inside.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: January 16, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Terry Tarn
  • Patent number: 7165028
    Abstract: A speech recognizer operating in both ambient noise (additive distortion) and microphone changes (convolutive distortion) is provided. For each utterance to be recognized the recognizer system adapts HMM mean vectors with noise estimates calculated from pre-utterance pause and a channel estimate calculated using an Estimation Maximization algorithm from previous utterances.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: January 16, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Yifan Gong
  • Patent number: 7161521
    Abstract: According to an aspect of the present invention, different reference voltage levels are used for different stages of a multi-stage analog to digital converter (ADC). In one embodiment, the amplification and unity gain bandwidth (UGB) requirements in the first stage is reduced as a result.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: January 9, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gautam Salil Nandi, Visvesvaraya A. Pentakota, Nitin Agarwal, Sandeep Kesrimal Oswal
  • Patent number: 7161690
    Abstract: For a given lookup table, maximum and minimum values of index values are determined. The lookup table is expanded in both directions by replicating the lowest and highest values to take care of these maximum and minimum values. This reduces the rendering clock count for each pixel.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: January 9, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Danke Mahesh Bhaskar
  • Patent number: 7161608
    Abstract: Disclosed herein are visual display systems and methods capable of having shifted bit-weights in neutral density filtering (NDF) applications. In one embodiment, a method (200) of displaying an image comprises transmitting light through an optical filter (17) comprising at least one high transmissivity portion configured to output light at an initial intensity, and at least one low transmissivity portion configured to output light at a lower intensity than the initial intensity, where the initial intensity and lower intensity output light illuminates a spatial light modulator (14). The method also includes providing a plurality of data bits (non-ND) from a predetermined number of data bits (B0–B7), where each of the plurality comprises a pulse-width longer than a load-time for operating the spatial light modulator (14).
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: January 9, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gregory S. Pettitt, Harold E. Bellis, II, Jason R. Thompson, James F. Headley, Dana F. Segler, Jr.
  • Patent number: 7158279
    Abstract: A micromirror array comprises micromirrors of different properties for use particularly in display systems. Micromirrors of different properties can be arranged within the micromirror array according to a predetermined pattern, or randomly. However, it is advantageous to arrange the micromirrors with different properties within the micromirror array neither in complete order nor complete in random.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: January 2, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Satyadev Patel, Regis Grasser, Andrew Huibers, Peter Heureux