Abstract: A reinforced wrap around ground and method includes a substrate, including opposite first and second substrate surfaces separated by a substrate edge. A first metalization layer is coupled to the first substrate surface and a second metalization layer comprising an electrical ground, is coupled to the second substrate surface. An electrical ground reinforcement is coupled between the first metalization layer and the second metalization layer around the substrate edge. Conductive paste coats the electrical ground reinforcement, and the conductive paste is fired to bind the wrap around ground to the substrate and to electrically ground the first metalization layer to the second metalization layer through the electrical ground reinforcement and the conductive coating.

Abstract: An electronic fuze package and method includes a left casing comprising a substantially flat left surface having left casing recesses and a right casing comprising a substantially flat right surface having right casing recesses. The combination of the left casing and the right casing defines a fuze casing for the mounting of fuze components. The fuze package also includes plated-on electrical tracks on the left casing, including component connections immediately adjacent to the casing recesses for electrically coupling the fuze components in a fuze circuit. The fuze package can be made of thermoplastic left and right casings which can be epoxy-glued together. Copper can be used for the plated-on electrical tracks.

Abstract: A RF crossover network includes a RF line, a DC/control line capacitively coupled to the RF line at a crossover of the RF line, and RF terminations coupled to the DC/control line. A RF signal carried on the RF line is unperturbed by the presence of a DC/control signal on the DC/control line. The RF line is mounted on a first dielectric layer including a ground plane. A second dielectric layer includes first and second surfaces with the DC/control line mounted on the first surface of the second dielectric layer and the second surface of the second dielectric layer positioned adjacent to the RF line. RF terminations are used on opposite ends of a half wave resonator. The RF terminations can comprise shunt capacitors, metal-insulator-metal (MIM) capacitors in a monolithic microwave integrated circuit (MMIC) embodiment, or open-circuited quarter wavelength transmission lines.

Abstract: A lumped impedance transforming directional coupler including a first reactive element, a second reactive element coupled to the first reactive element at a first port, a third reactive element coupled to the second reactive element at a second port, a fourth reactive element coupled to the first reactive element at a third port and to the first reactive element at a fourth port, and the first, the second, the third, and the fourth ports each coupled through a first, a second, a third, and a fourth capacitor, respectively, to electrical ground, the reactive elements and the capacitors providing impedance transformation. Alternate embodiments include a lumped element directional coupler arising from a distributed impedance transforming directional couplers with a pair of transmission lines one-fourth of a wavelength of a center operating frequency in length, and a second pair of transmission lines three-fourths of that wavelength in length.

Abstract: A method for multiplexing a series of frequency division multiple access (FDMA) signals includes providing complex channels offset relative to the FDMA signals. Each FDMA signal is filtered to be centered and occupy one-half of the bandwidth of each complex channel, leaving an "off" channel between each pair of successive FDMA signals. The real part of the multiplexed output signal is processed and higher frequency signals of FDMA signals image into the "off" channels. Demultiplexing includes aligning a demultiplexing channelization pattern with the multiplexed input signal contained in input channels. The input channels are one-half a bandwidth of each of the complex channels. The input channels contain a sequence of FDMA signals separated by a reverse sequence of images of the FDMA signals. Consecutive even-numbered input channels correspond to consecutive complex channels of the complex channels and the sequence of FDMA signals can be extracted from the complex channels.

Abstract: A method and apparatus for memory tagging for object reuse protection which includes a central processing unit (CPU), a memory for storing a data word object and a corresponding tag identifying a first process with a first identification (ID). The memory means is coupled to the CPU. A subject ID register for storing a current process ID for a current process is coupled to the CPU and the memory. Tag checking apparatus for comparing the current process ID to the first ID is coupled to the CPU, to the subject ID register, and to the memory. Control logic is coupled to the CPU, to the memory, and to the tag checking apparatus. The control logic is for denying access to the data word object by the current process if the current process ID does not match the first ID.

Abstract: A method and apparatus for providing error detection, correction and prevention of unauthorized access to data using memory tags. The method and apparatus includes computing an original error detection/correction code associated with a data word. The original error detection/correction code, using a CPU and a subject identification register, is copied to a tag associated with the data word when an original subject writes the data word into a memory. A single-error-correction/double-error detection (SEC/DED) device applies a first bias to the tag to create a first-biased error detection/correction code when the memory is assigned to a first subject. The SEC/DED device applies a second bias to create a twice-biased error detection/correction code when a second subject attempts to access the data word. Access to the data word is denied if the twice-biased error detection/correction code comprises an uncorrectable error.

Abstract: A fast pattern correlator and method comprising received bitstream data blocks split into estimation blocks and correlation blocks. Correlation blocks are extracted and compared to an expected pattern using a correlation part starting location estimator and correlator. The number of bit errors resulting is compared to a predetermined maximum in a threshold comparator. Extracting the correlation blocks includes indexing consecutive estimation blocks using an estimation part correlation table and predicting consistent correlation block starting locations. The correlation blocks are correlated with the expected pattern to produce an exclusive-OR result, which, used with a bit-error table, can be used to find a number of bit errors in the correlation.

Abstract: A random bit stream generator and method including a regulated current source for generating a noise signal, an amplifier coupled to the regulated source for producing an amplified noise signal, a filter coupled to the amplifier for averaging the random bit stream and producing a feedback input, a comparator coupled to the amplifier and the filter for receiving the amplified noise signal and the feedback input and producing a digital signal, a flip-flop coupled to the comparator for receiving the digital signal and for producing the random bit stream, and quick start circuitry coupled to the amplifier, the comparator, and the flip flip for ensuring randomness in the random bit stream from generator start up.

Abstract: A mounting apparatus and method is suitable for printed wiring assembly (PWA) shielding in an electrical device such as a facsimile machine. The mounting comprises a frame including a substantially flat frame floor, at least one PWA edge card connector, and at least one frame fastener. Continuous shielding walls are positioned immediately adjacent to the frame floor, and the PWA comprises a substantially flat component-mounting surface and a shielding surface, at least one PWA edge card, and at least one frame fastener receiver. The PWA edge card is inserted into the PWA edge card connector and the frame fastener is coupled to the frame fastener receiver such that the PWA component-mounting surface is held within an electromagnetically-shielded volume bounded by the PWA shielding surface, the shielding walls, and the frame floor.

Abstract: A method and apparatus for the holding of paper rolls in printing devices, e.g., facsimile machines, which includes a housing for accommodating the paper roll, the housing comprising parallel and substantially flat first and second housing endplates along a longitudinal axis; first and second paper roll supports adapted to fit first and second ends of the paper roll, respectively, the first and second paper roll supports flexibly coupled to the first and second housing endplates; and first and second springs for pressing the first and second paper roll supports against the first and second ends of the paper roll, respectively, to compressively hold the paper roll when the paper roll is inserted in the holder, the first spring coupled between the first housing endplate and the first paper roll support, and the second spring coupled between the second housing endplate and the second paper roll support.

Abstract: A microwave circuit high isolation packaging technology involving the fabrication of a single-piece baseplate containing microwave circuits, the fabrication of a single-piece framework, and the assembly of the baseplate structure to the framework structure eliminating any gaps. The baseplate contains the desired microwave circuitry without isolation channels or other impediments to mounting circuit components or making circuit interconnections. The framework comprises all isolation walls, transoms, or other structures capable of isolating individual portions of the microwave circuit when assembled to the baseplate.

Abstract: A plasma based soldering method which uses a hydrogen-nitrogen gas mixture (5-15% hydrogen) to form a plasma, excited to simultaneously clean and heat solder. Only a relatively low vacuum of about 125 pascal (1 torr) is required. No heat sources beside the plasma are used to reflow the solder and no flux is necessary. Sensitive components can be shielded from plasma ion bombardment and need not be able to withstand the melt temperature of the solder used. The method is suitable for lead-tin solder and can be used to solder polyetherimide baseplates to teflon-glass printed wiring boards at junctions of gold-plated posts and matching gold-plated hole linings.

Abstract: A low-power dual voltage drive circuit and method which includes controlling a stepper motor overdriven with a high voltage. The stepper motor drive circuit includes a high voltage supply for overdriving the stepper motor, a low voltage supply, and an overdrive switch mechanism connected between the high voltage supply means and the stepper motor input. The method includes repetitively triggering the overdrive switch in response to a control signal, overdriving the stepper motor with the high voltage, producing an overdrive current, sensing the overdrive current, producing an additional control signal when the overdrive current reaches a preset value, switching off the overdrive current in response to the second control signal, resetting the overdrive switch to enable the overdrive switch to again receive the first control signal, and driving the stepper motor with a nominal low voltage.

Abstract: A harmonic reaction amplifier (HRA) apparatus and method using a directional filter, including an HRA input for receiving an input signal, a divider coupled to the HRA input, the divider for splitting the input signal into a first divider signal and a second divider signal, an amplifier coupled to the divider, the amplifier for amplifying the first divider signal and the second divider signal, a directional filter coupled to the amplifier, the directional filter to filter the first and second divider signals to produce a filtered first divider signal and a filtered second divider signal, a combiner for combining the filtered first divider signal and the filtered second divider signal to produce an output signal, the combiner coupled to the directional filter, and an HRA output coupled to the combiner, the HRA output to receive the output signal from the combiner. The HRA can be used in a microwave radio.

Abstract: A split key encryption system to crypto-seal a data file comprising a method for unique variable entry (e.g., terminal serial number), random number generation, key storage device, encryption function for combining the unique variable and the random number to generate an encryption variable in an exclusive-OR function using a variable tap linear feedback shift register, and storage function for receiving the encryption variable and the unencrypted data file. A split key decryption system to unseal the crypto-sealed data file comprises a key storage device, terminal, terminal input, and storage function, with decryption again using an exclusive-OR function using a variable tap linear feedback shift register. A comparator allows use of the unencrypted data file only if the decrypted unique variable matches the terminal serial number.

Abstract: A method and apparatus for high power pulse modulation which includes a high voltage supply to provide a high voltage input signal, and a drive channel, rise channel, fall channel, and dump channel. A timing system controls the switching of the drive channel, rise channel, fall channel, and dump channel to modulate the high voltage input signal to produce an output signal. Each channel comprises a channel logic input, buffer amplifier, alternating current (AC) coupler, isolation pulse transformer, current limiter, and switch to provide the pulse modulation. Power MOSFETs can be used as switches in the four channels.

Abstract: A LOW RISC (reduced instruction set computer) III microprocessor reduces the number of branches taken during execution of logic, functional, and symbolic programs to increase the efficiency and effectiveness of pipelined execution memory interleave, and reduces the complexity of RISC architectures. The LOW RISC III is a 40-bit, 4-stage pipelined processor which is pipelined with each stage operating synchronously in parallel. Pipeline breaks are reduced by moving partial unification and trail checking into hardware, and eliminating many short branches by conditional execution of the various instructions.

Abstract: A broad-band lumped element ring hybrid is comprised of a .pi. equivalent of a transmission line which is coupled to an electric ground through either a plurality of capacitors or plurality of inductors. The plurality of capacitors which are coupled to ground are coupled together with an inductor, while the plurality of inductors which are coupled to ground are coupled together with a capacitor. A plurality of tank circuits are coupled to the .pi. equivalent to broaden the bandwidth of the ring hybrid. Each tank circuit comprises an inductor and a capacitor.

Abstract: A high-speed current mode 2-bit full adder using ripple carry with two full adders using three-levels of series gating, a bandgap reference voltage generator, two sum out buffers, and a carry out buffer. The method for the addition of an input carry bit and two 2-bit input bytes uses a logic circuit satisfying Boolean expressions SUM=ABC+AB'C'+A'B'C+A'BC' and C.sub.OUT =BC+AC+AB, where first 2-bit input byte A.sub.1 B.sub.1 and carry in byte C.sub.IN produce SUM equal to first bit sum S.sub.1 and an intermediate carry out bit at two voltage levels, C.sub.2, and C.sub.3 to facilitate processing. Second 2-bit byte A.sub.2 B.sub.2 and an intermediate carry out bit at C.sub.2 and C.sub.3, input to the bit 2 full adder, produce SUM equal to secondd bit sum S.sub.2 and final carry out bit C.sub.OUT. Each sum function uses only one current source to reduce components, lower power consumption, and improve efficiency.