Patents Represented by Attorney, Agent or Law Firm Jeffrey H. Ingerman
  • Patent number: 6369613
    Abstract: A technique is provided for improving the output drive capacity of output drivers on an integrated circuit that is configured to support I/O standards having operating voltages greater than the intrinsic core supply voltage. When MOS field-effect transistors are used in the I/O circuitry of such integrated circuits, the gate oxide layers of the transistors in the interface circuitry may need to be thicker than those comprising the core circuitry in order to tolerate I/O voltages that exceed the core supply voltage. In counteracting the degradation in output drive that may result from thickening the gate oxide layer, the pull-down signal applied to the gate of the pull-down transistor is preferably level-shifted from the core supply voltage to the higher external operating voltage associated with the I/O standard being supported. This external voltage is made available to the level-shifting circuit preferably through a spare pin or a gated I/O pin.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: April 9, 2002
    Assignee: Altera Corporation
    Inventors: John Costello, Behzad Nouban
  • Patent number: 6359468
    Abstract: A programmable logic device is adapted to predict carry values in long-chain-carry logic configurations. In the most preferred embodiment, which functions in any long-carry-chain logic configuration, each logic region calculates a result for both values of the carry-in signal to that region, and when a carry signal for the group to which the region belongs reaches the region, the correct result in each region, and thence the correct carry-out for that group, are calculated and propagated. The carry-out terminal of one group is arranged to be adjacent to the carry-in terminal of the next group, to enhance carry propagation speed. In another embodiment, each region looks back two regions to predict the carry-in. In two additional embodiments, logic is provided to mathematically calculate the carry values.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: March 19, 2002
    Assignee: Altera Corporation
    Inventors: James Park, Wei-Jen Huang, Tony Ngai, Bruce B. Pedersen
  • Patent number: 6347931
    Abstract: A block ramming machine is provided that includes: (a) a ramming chamber structure having a longitudinal axis, an input end, an output end, and a ramming chamber located between the input and output ends, (b) a headgate assembly located near the output end of the ramming chamber, wherein the assembly comprises a headgate that can have at least an open position and a closed position, (c) a fill chamber structure positioned along the longitudinal axis and having a first end, a second end, and a fill chamber located between the first and second ends, the input end and the second end being coupled so that the material can be transferred from the fill chamber to the ramming chamber, (d) a ramming plate for pushing the material from the fill chamber to the ramming chamber, and (e) an actuator for moving the ramming plate along the longitudinal axis from a position in the fill chamber to a position in the ramming chamber, thereby transferring the material from the fill chamber to the ramming chamber to form a block.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: February 19, 2002
    Assignee: The Mountain Institute
    Inventor: James C. Underwood
  • Patent number: 6346827
    Abstract: A programmable input/output circuit for a programmable logic device input/output pin can be configured in a standard I/O mode, or in a reference voltage mode. The circuit includes a tristatable, but otherwise standard I/O buffer as well as a reference voltage clamp circuit. In reference voltage mode, the I/O circuit is tristated, and the reference voltage clamp circuit passes a reference voltage from the I/O pin to a reference voltage bus. In standard I/O mode, the I/O buffer is operational. The reference voltage clamp circuit isolates the I/O pin from the reference voltage bus and may include undervoltage and overvoltage protection to prevent disturbance of the reference voltage bus by an out-of-range I/O signal.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: February 12, 2002
    Assignee: Altera Corporation
    Inventors: Wayne Yeung, Chiakang Sung, Myron W. Wong, Khai Nguyen, Bonnie I. Wang, Xiaobao Wang, Joseph Huang, In Whan Kim
  • Patent number: 6335636
    Abstract: A programmable input/output circuit for a programmable logic device input/output pin can be configured in a standard I/O mode, or in a reference voltage mode. The circuit includes a tristatable, but otherwise standard I/O buffer as well as a reference voltage clamp circuit. In reference voltage mode, the I/O circuit is tristated, and the reference voltage clamp circuit passes a reference voltage from the I/O pin to a reference voltage bus. In standard I/O mode, the I/O buffer is operational. The reference voltage clamp circuit isolates the I/O pin from the reference voltage bus and may include undervoltage and overvoltage protection to prevent disturbance of the reference voltage bus by an out-of-range I/O signal.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: January 1, 2002
    Assignee: Altera Corporation
    Inventors: Wayne Yeung, Chiakang Sung, Myron W. Wong, Khai Nguyen, Bonnie I. Wang, Xiaobao Wang, Joseph Huang, Im Whan Kim
  • Patent number: 6334585
    Abstract: An armature winder having an adjustable winding arm, includes a wire delivery point with two degrees of freedom—one along the longitudinal axis of the armature winder and one transverse to the longitudinal axis of the armature winder. In one preferred embodiment, the adjustable winding arm pivots around an axis transverse to the longitudinal axis of the winder. This pivoting motion allows adjustment of the wire delivery point along an arcuate path, thereby utilizing each of the degrees of freedom simultaneously.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: January 1, 2002
    Assignee: Axis USA, Inc.
    Inventors: Raffaele Becherucci, Gianfranco Stratico
  • Patent number: 6334055
    Abstract: An adapter/converter circuit converts transmissions by a mobile telephone built for one standard (e.g., PCS) from the telephone transmit/base station receive frequency of that one standard to the telephone transmit/base station receive frequency of another standard (e.g., cellular), and converts transmissions by a base station or similar device (e.g., a base station simulator) from the telephone receive/base station transmit frequency of the one standard to the telephone receive/base station transmit frequency of the other standard. The two frequency conversions occur simultaneously on two parallel legs under the control of a PLL dual frequency synthesizer, which is in turn controlled by user input (in the case where the adapter is used to allow, e.g., PCS telephones to be tested on cellular test equipment) or by the base station (in the case where the adapter is used to allow, e.g., PCS telephones to be used with a cellular base station).
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: December 25, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: William J. Garner, Zhihong Huang, Winston H. Lieu
  • Patent number: 6323680
    Abstract: A programmable logic device is configured to accommodate multiplication by the provision in each logic region of specialized components to form and sum partial products. The specialized components are separate from the ordinary logic of the logic region, and their presence imposes little penalty on the performance of ordinary logic functions, while enhancing the speed at which multiplication is performed by minimizing the number of logic regions used for a particular multiplication operation, and also minimizing the use of the interconnection resources of the device to convey signals among those regions.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: November 27, 2001
    Assignee: Altera Corporation
    Inventors: Bruce B. Pedersen, Sergey Shumarayev, Wei-Jen Huang, Vinson Chan, Stephen Brown, Tony Ngai, James Park
  • Patent number: 6310888
    Abstract: The present invention provides a system and method for communicating data between a source application process and one or more destination application processes. This system and method perform conversion and routing functions which require only a single conversion of all outbound transmissions regardless of the variety of destinations, and only a single conversion of all inbound transmissions regardless of the variety of sources. The functions also enable changes, additions, and deletions of sources and destinations of transmissions to be made without modification of a source or destination application process and without taking a source or destination application process off-line. The functions further enable this system and method to be implemented in virtually any enterprise architecture without requiring that each processing system of the architecture be custom built.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: October 30, 2001
    Assignee: iWork Software, LLC
    Inventor: James K. Hamlin
  • Patent number: 6298904
    Abstract: A vent-forming apparatus for use in metal casting comprises a gas-permeable membrane with a lead-in tube attached to one surface and a breather tube attached to the opposite surface. The vent-forming apparatus may be used to create independent vents in the walls of shell-type molds used in the ceramic shell casting process for lost wax casting of ferrous and non-ferrous alloys. These vents exhaust gasses in the mold cavity to the atmosphere. The vent-forming apparatus also may be used in solid mold investment casting methods or in any other casting method in which venting is desirable or necessary.
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: October 9, 2001
    Inventor: Richard F. Polich
  • Patent number: 6300790
    Abstract: In a programmable logic device, input/output circuits are grouped into blocks. Each block includes input/output circuits capable of handling a plurality of logic signalling schemes, which may require different supply voltages and reference voltages. Each block also has its own power supply bus. In this way, the different blocks can be provided with different supply and reference voltages, so that different blocks can be used for different logic signalling schemes, thereby allowing more than one such scheme to be used simultaneously on a single device. A single block could also be implemented with more than one scheme active, as long as all of the schemes in use in the block have the same power supply requirements and—to the extent that each such scheme requires a reference voltage—the same reference voltage requirements.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: October 9, 2001
    Assignee: Altera Corporation
    Inventors: Kerry Veenstra, Krishna Rangasayee, John E. Turner
  • Patent number: 6287119
    Abstract: The invention provides a method for manufacturing a prosthesis to be fixed to a plurality of implants in the jawbone of a patient. The method has as a characteristic feature that by means of at least one camera arranged at the opened mouth of the patient; images of the implants already fixed to the jaw of the patient are recorded from at least two different positions; these images are converted into electrical signals by at least one camera; by means of a photogrammetric method the electrical signals are processed using at least one calculating unit for obtaining positions and orientation information of the implants; and the positions and orientation information is used for the highly accurate manufacture of at least a part of the prosthesis.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: September 11, 2001
    Assignee: Nobel Biocare AB
    Inventors: Willem Frederick van Nifterick, Johannis Adriaan Quaak
  • Patent number: 6278291
    Abstract: A programmable logic array device has a plurality of logic regions and conductors for conveying signals between the logic regions. Conductors of several different lengths are provided so that most connections between logic regions can be made using conductors which are close to the length required and not wastefully much longer than that length.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: August 21, 2001
    Assignee: Altera Corporation
    Inventors: Cameron McClintock, William Leong, Richard G. Cliff, Bahram Ahanin
  • Patent number: 6272471
    Abstract: A plan of countersuit insurance provided to professionals, possibly as part of or along with their professional liability insurance, deters frivolous professional malpractice claims. The plan of insurance pays legal costs of countersuits for improper prosecution when a frivolous claim has been made and, preferably, tried to a judgment for the accused professional, and an objective review concludes that the claim was frivolous. As part of the insurance plan, the names of covered professionals are posted on a publicly accessible database. If a potential plaintiff or his or her attorney finds a potential defendant's name on the database, it may be a deterrent to filing weaker claims that might be viewed as frivolous.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: August 7, 2001
    Inventor: Jeffrey J. Segal
  • Patent number: 6258187
    Abstract: Copper trolley wire consisting essentially of at least 99.90% copper and at most 0.10% of a metal selected from the group consisting of silver, cadmium, tellurium, titanium, magnesium, manganese, chromium, zirconium, tin and combinations thereof, has a minimum tensile strength well exceeding that listed in ASTM Standard B47-95a for copper trolley wire. The copper trolley wire has a uniform fine grain size. The copper trolley wire is manufactured using a process of casting a copper rod of the appropriate composition, hot working or “conforming” the cast rod to reduce its diameter, and then cold working it to form the desired wire by drawing it through one or more dies. Preferably, no annealing step is used.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: July 10, 2001
    Assignee: Phelps Dodge Industries, Inc.
    Inventors: Thomas J. Chandler, John Corrado
  • Patent number: 6252419
    Abstract: An LVDS interface for a programmable logic device uses phase-locked loop (“PLL”) circuits to provide data clocks for data input and output. The PLL clocks are highly accurate and each includes a multiply-by-W counter so that a multiplied and an unmultiplied clock are available. The multiplied clock is used to clock data into or out of a shift register chain serially. The unmultiplied clock is used to load or read the registers in the shift register chain in parallel. Providing both the multiplied and unmultiplied clocks from a single PLL assures that the clocks are in proper phase relationship so that the serial inputting or outputting, and the parallel loading or unloading, are properly synchronized.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: June 26, 2001
    Assignee: Altera Corporation
    Inventors: Chiakang Sung, Bonnie I. Wang, Richard G. Cliff
  • Patent number: 6228185
    Abstract: The invention provides a process for producing an aluminium-based matrix melt, having boride particles dispersed therein, which is castable, and yet when cast produces a product having a surprisingly good combination of mechanical properties such as stiffness, strength, and elongation at failure. In the process, precursors for boride particles are reacted within an aluminium-based melt to produce boride ceramic particles such as titanium diboride, the process being carried out under conditions such that the melt remains fluid.
    Type: Grant
    Filed: November 28, 1997
    Date of Patent: May 8, 2001
    Assignee: London & Scandinavian Metallurgical Co., Ltd.
    Inventors: Peter Davies, James Leslie Frederick Kellie, Douglas Philip Parton, John Vivian Wood
  • Patent number: 6209616
    Abstract: This invention relates to metal casting apparatus, methods and molds and more particularly to the casting of metal in refractory, gas-permeable, shell-type molds which are lighter and have thinner wall thicknesses than the refractory, gas-permeable, shell-type molds commonly used in the ceramic shell casting process for lost wax casting of ferrous and nonferrous alloys such as steel, aluminum, and bronze. As a result of the use of vacuum in the inventive apparatus and method, more complete mold fill out is achieved, resulting in better capture of exact detail and close tolerances in the finished cast object. Further advantage is derived from the fact that the casting of large objects is simplified and can be done more quickly. Also, there is an associated substantial savings in labor costs, materials costs and time. The inventive apparatus and method also can be used in the foam vaporization casting process of metal casting.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: April 3, 2001
    Inventor: Richard F. Polich
  • Patent number: RE37310
    Abstract: An arrangement for two side-by-side elongated lamps in a lighting fixture in which lampholders are alternately mounted on opposite sideplates or brackets of the lighting fixture. The lighting fixture has an inside dimension that is longer than the length of each lamp/lampholder combination by a length sufficient to prevent the distal end of each lamp from overlapping the exposed plug portion and the lampholder of any of the adjacent lamps. The lamps are tightly gathered, and are close enough together to simulate a hairline light source having an optical centerline coincident with the optical centerline of the fixture.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: August 7, 2001
    Assignee: Sylvan R. Shemitz Designs, Inc.
    Inventor: Sylvan R. Shemitz
  • Patent number: D454254
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: March 12, 2002
    Assignee: Gary Plastic Packaging Corp.
    Inventors: Gary L. Hellinger, Edward A. Wagschal