Abstract: Transmitting and receiving apparatus for transmitting data which includes a purged extended Golay (22,7) code encoder at the transmitter for encoding digital data into constant weight unbalanced codewords representative of the digital data. The constant weight unbalanced codewords contain error correction bits and are preferably transmitted as balanced codewords. When the receiver decodes the original digital data, improved tracking and acquisition of the transmitted data is achieved.

Abstract: High speed computing apparatus for performing real time data compression of analog voice data or digital data to be transmitted over a data link. The incoming data stream is divided into blocks of digital data and the blocks are subdivided into digital samples or elements to be compressed. Each sample is analyzed individually to determine its estimated variance and the marginal return to be gained by alloting the sample one or more of the bits to be employed to define the block of digital data. The bits are assigned samples having the highest estimated variance factor so that an optimum allocation of bits to individual samples is achieved with variable ratio data compression. The allocated bits are employed to encode the samples during real time data compression and transmission.

Abstract: Apparatus is provided for locking onto a severe doppler shifted data modulated carrier signal. A phase lock loop of the type having a data detection branch, a carrier tracking branch and a voltage controlled oscillator branch is modified to provide a summing circuit at the input of the voltage control oscillator in the voltage controlled oscillator branch. A sweep control circuit is connected to the input of the summing circuit for sweeping the voltage controlled oscillator through a range of frequencies which encompass the doppler shifted carrier frequency. An automatic frequency control circuit is connected to the input of the summing circuit for automatically disconnecting the sweep control circuit from the summing circuit when the frequency of the voltage controlled oscillator reaches a predetermined value defining a window which encompasses only the center frequency of the doppler shifted carrier frequency.

Abstract: The present invention describes a phase shift key receiver or demodulator having an A.C. couple base band automatic gain control. A pair of detectors for the automatic gain control are A.C. coupled to the output of a pair of linear analog multipliers for the purpose of eliminating DC offset signals and for minimizing thermal noise at the input of the automatic gain control circuit. The outputs of the pair of detectors connected in the data detecting branch and the carrier tracking branch of the PLL are connected to a input of the summing circuit whose output is connected to the automatic gain control loop filter. The output of the filter supplies the scaling signal employed as the scaling input to the linear analog multipliers.

Abstract: A novel maximum likeihood decoder for the Golay (24,12) code is provided. Instead of decoding the received dimensional vector (X) is a systolic array, the vector is mapped into a (24,5) subcode with an index 128 which is easily decoded. The decoder employs a plurality of precomputational circuits cooperating with a similar plurality of inner product circuits which compute the 128 inner product values and select the maximum inner product value from each inner product circuit. The maximum inner product value from each circuit is loaded into a select logic circuit for selecting the maximum inner product value and its corresponding code word closest to the received vector (X).

Abstract: The present invention provides a novel burst erasing automatic gain control circuit which includes the basic elements of an automatic gain control circuit and further includes in the loop control circuit, slow response wideband filter means, and a hard limiter which limits the AGC'ed output from the amplifier so that the signal reaching the slow response wideband filter means never exceeds a predetermined value which would cause distortion in the feedback loop. The output of the novel automatic gain control circuit is coupled to a despreading circuit which removes substantially all of the remaining burst jamming signals.

Abstract: Apparatus for stripping a single envelope from a stack of envelopes without misfeeding or double feeding is provided. The apparatus includes a picker blade which is articulated by a drive to impart of plurality of motions to the leading edge of an envelope after the picker blade has been engaged under the flap of an envelope to be separated from a stack of envelopes in a magazine. The novel stripping action of the picker blade ensures that the leading edge only of the envelope to be fed from the magazine is first stripped and separated from the stack of envelopes and directed past a restrainer which prevents the stack of envelopes adjacent the envelope to be fed from being moved in a feed direction.

Abstract: A decorative gas burner system is provided with decorative gas logs which have openings or passageways to permit gas flames to be emitted therefrom which simulate the size and color of flames from wood burning logs. Gas burner means are mounted below the openings in said decorative gas log means and are provided with large hole arrays for producing long yellow or orange flames. Inverted U-shaped shield means are mounted over said gas burner means and provided with horizontal openings in the U-shape shield means and are further provided with deflector means opposite said openings in said shield means for producing long yellow gas flames with carbon monoxide emissions.

Abstract: A variable data rate receiver is provided which employs a novel phase locked loop (PLL) of the type employing a data detection loop and a tracking loop. The data detection loop is initially not coupled to the input of the voltage controlled oscillator in the tracking loop of the PLL, but is separated by an electronic switch. A phase lock detection circuit is provided which is coupled to the data detection loop and to the tracking loop for detecting the difference in the voltage error signals in the data detection loop and the tracking loop. When this error signal indicates that the tracking loop is locked on to the carrier signal the electronic switch is closed completing the phase locked loop circuit after lock on of the carrier is achieved.

Abstract: The present invention provides a high frequency lock detecting circuit for generating a signal indicative of a locked or a not locked phase tracking condition in a phase locked loop circuit. The lock detector comprises a plurality of high speed function generators two of which are coupled to the modulated data streams for indicating the phase data streams and a third high speed function generator is coupled to the voltage error signal of the phase locked loop for indicating the absence or presence of a voltage error signal. The analog outputs of the function generators are summed together in a summing circuit and applied to a differential amplifier which removes the complex modulated data products from the output of the function generators and provides a signal which is equal to the absolute value of the data signals applied to the first function generators minus the absolute value of the error signal applied by the third function generator.

Abstract: A universal fireplace is provided as standard prefabricated substantially hollow rectangular prism shaped frame adapted to support all six walls of the universal fireplaces supported on the hollow rectangular prism shaped frame. The top wall is adapted to support the exhaust stack and the bottom wall is adapted to support the fire brick for the fire chamber. At least one of the sidewalls comprises a pair of glass doors supported by edge frame means pivoted on upper and lower side support panels which are mounted on said hollow rectangular prism shaped frame.

Abstract: A coherent pseudonoise code (PN) tracking loop is provided with apparatus for sensing the absence of PN transition in the incoming data stream to the tracking loop and for switching OFF the data stream to prevent phase error distortion and inherent noise from entering the tracking loop which could be sensed as false or incorrect phase error signals. The apparatus includes a transition switch in the incoming data stream that is responsive to transition gate control logic coupled to the output of the PN replica generator in the tracking loop for switching OFF the incoming data stream when no PN transitions are occurring.

Abstract: A die ejector chuck is provided with a central housing and an outer housing and the central housing is provided with a die eject collar which extends through an aperture in the outer housing. A preselected die on a flexible adhesive tape is positioned over the die eject collar and a source of vacuum is applied to apertures in the outer housing. The outer housing is moved upward and away from the central die eject collar so as to stretch the flexible adhesive tape supporting the preselected die. The adhesive tape is pre-peeled and pulled away from the preselected die which subsequently is further separated from the adhesive tape by a die eject pin to permit the preselected die to be picked up with a die collet acting with a light pulling force on the active surface of the preselected die.

Abstract: A high speed envelope feeder is provided with a pair of pinch rolls for extracting an envelope from a stack of closed envelopes in a magazine. The flap of a closed envelope is opened by raising a cam surface under the flap to position the flap between a fixed pinch roll and a movable pinch roll. The movable pinch roll is articulated to grasp the flap between the pinch rolls. The flap is pulled to extract the envelope from the magazine and is subsequently pushed by the pinch rolls into the transport device.

Abstract: A high-speed sample and hold phase detector for clock and data recovery systems is provided with a differentiating circuit coupled to a source of coded input data signals to provide bi-level differentiated output sampling pulses which are applied to a high-speed transformer. The output of the high-speed transformer is coupled to a high-speed fullwave diode bridge rectifying circuit whose output provides the error signal for the clock and data recovery circuit. The transformer is provided with a secondary winding having a center tap connected to a bi-level clock having clock signals whose rate is at twice the data rate. The D.C. error signal voltage amplitude is proportional to the phase difference between the clock signal connected to the center tap of the secondary winding of the transformer and the differentiated sampling pulses. The sampling pulses are employed to sample the clock signal which provides higher stability and enhances noise reduction.

Abstract: A novel digital phase shifter is provided for accomplishing digital phase shifting without the requirement of complex multiplication. The phase shifter includes buffer registers for receiving and storing the inphase and quadrature components of a complex number and for storing in a phase command register the information indicative of the phase shift to be accomplished. The phase shifting apparatus comprises a command map for generating a plurality of plus or minus phase shift command bits. A plurality of plus or minus phase shift registers are coupled to the phase shift command bits for performing plus or minus phase shifts of predetermined angles that diminish by a factor of approximately one-half from the previous phase shift angle.

Abstract: A multiple-loop microwave frequency synthesizer is provided with an upper and a lower phased-lock loop. The phased-lock loops are mutually connected to a novel sampling mixer and their outputs are connected to an up-converter for providing microwave frequency generated signals. The phased-lock loops are provided with a plurality of programmable frequency dividers connected to a processor controller to provide a wide range of adjustable frequencies up to 20 gigahertz at the output of the frequency synthesizer.

Abstract: A high-speed analog multiplier circuit for multiplying two analog inputs comprises a signum generator having an X input multiplier and having an output connected to a high-speed electronic switch. A Y analog input multiplicand is also connected to the high-speed electronic switch and the output of the electronic switch is connected to a differential amplifier of the type having a positive input, a negative input and a resultant output for producing the signum function (X) times Y. The electronic switch is operated by the signum generator so that the presence of a high Q output from the signum generator is effective to connect the Y multiplicand input to the positive input of the differential amplifier and that the presence of a high Q input from the signum generator is effective to connect the Y multiplicand input to the negative input of the differential amplifier.

Abstract: In a two way ranging system of the type employing pseudonoise spread spectrum codes there is provided a method for correcting the navigational system of one of two moving stations in space to compensate for relative drift. The point positions of the two stations are calculated by the on-board navigation systems of the individual stations at a first and subsequently at a second position after relative movement. The range from station 1 to station 2 is calculated employing the highly accurate pseudonoise communications ranging systems. The range uncertainty of the range calculation and the trigonmetric relation of the two calculated ranges and the include angle between the line of sight of the range directions is employed to calculate a range of uncertainty parallelogram more accurate that the navigation systems. When a station's point position is indicated by its navigation system to be outside the parallelogram, the navigation system is corrected to compensate for relative drift.

Abstract: A magneto-optic Kerr effect hysteresis loop measuring apparatus is provided which employs a small relatively low weight ring magnet having a small gap and a high magnetic field strength in the deep gap and in the adjacent external gap. The spot on the product which is to be non-destructively tested is placed in the external gap field next to the small gap in a region of saturating magentic field. A laser beam having a high polarization ratio is directed along an incident path to the spot on the surface of the product to be non-destructively tested and the reflected beam is processed in a Kerr effect detector to provide hysteresis loop data which is capable of providing information sufficient to determine the squareness of the hysteresis loop and the coercivity of the material being non-destructively tested.