Abstract: In a digital channel bank, the binary signaling states (on-hook, off-hook) are updated periodically for each channel. Some number (n .gtoreq. 2) of the most recent of these samples are stored at the receive end of the digital system for each message channel. Under normal working conditions the output (to the switching machine) is directly influenced by the incoming real-time samples. However, when a carrier disturbance (i.e., out-of-frame condition) is detected, the updating process is stopped and the output is controlled by the older stored bits. That is, instead of sending the real-time signaling information of each channel to the switch, the signaling bits that were received and stored during a previous frame (e.g., 12 or more frames earlier) are now coupled to the switch. This assures a high probability that the proper signaling state is presented to the switch during short carrier disturbances.

Abstract: A reference source of uniformly spaced pulses is coupled to the input of a smooth sequence generator (SSG) which is capable of dividing the reference pulse sequence by any proper, predetermined, rational fraction (e.g., 193/512). The SSG comprises a plurality of routing circuits connected in tandem. Each routing circuit has a first and second output and a control terminal which serves to route a pulse presented at the routing circuit input to either said first or second output. The first output of each routing circuit is connected to the next tandem-connected routing circuit. A feedback connection from the first output of each routing circuit to the control terminal of the preceding routing circuit serves to control the routing of a pulse presented to the input of the latter. A synchronization circuit is coupled to the output of said reference source, via a divider circuit, and to the first output of the last tandem-connected routing circuit.

Abstract: A local alarm circuit and a remote alarm circuit carry out a plurality of failure monitoring and alarming functions for each of a plurality of digital groups (digroups), of time division multiplexed channels that are time multiplexed together on to a common bus. The local and remote alarm circuits utilize common control techniques and are of a similar circuit configuration. Each alarm circuit comprises an alarm timing store having a shared recirculating memory, and an alarm status store with a shared recirculating memory. The timing store serves to integrate and time failure indications for each of the digroups, and the status store maintains a continuing real time record of the alarm status for each digroup. When the timing store counts out a predetermined failure duration for a given digroup, the alarm status record for the digroup is changed and an alarm signal is generated.

Abstract: A push-pull transistor amplifier wherein the transistors are biased in the Class A region but near collector saturation. An inductance is series coupled with the collector source to permit the amplifier to handle large peak-factor signals. A diode is connected in parallel with the collector-base junction of each transistor to prevent charge storage effects.

Abstract: The disclosed reframe circuit utilizes common control circuitry to carry out a reframing operation for any, or all, of a plurality of time division multiplexed digital data groups which are out-of-frame. An old data store is used to store a given number (m) of selected data bits, of each digital group, for two frames for framing comparison purposes. A reframe comparator serves to compare, for each digital group, the m bit output of the old data store with m data bits that are two frames later in time. A suitability store is used to record, for each group, which of the compared m data bits have had framing pattern violations and which appears as a suitable candidate for the framing bit. Based on the present set of comparisons and past suitabilities, a shift decoder searches for the framing bit within the current m-bit window until it has either marked all m bits unsuitable or has found the true framing bit within the window.

Abstract: Active and standby clock signals are phase synchronized to each other within a predetermined phase tolerance by synchronizing each clock signal to the same reference pulse stream. A first synchronizing pulse signal is derived from the active clock signal and a second synchronizing pulse signal is derived from the standby clock signal. For each synchronizing pulse signal, the pulse widths exceed the reference signal pulse widths by an amount related to the predetermined phase tolerance. Synchronization between the active and standby clock signals is achieved when the phases of the active and standby clock signals are adjusted such that the pulse widths of the reference pulses lie entirely within the time domain of the pulse widths of the synchronizing pulse signals.

Abstract: In a digital transmission system that encodes each sample of a video signal into a variable bit length data word to form a consecutive stream of variable bit length data words, synchronization between the received data words and their properly associated spatial addresses is maintained by periodically interposing synchronization words into the transmitted data stream. After initialization at the beginning of a video field, each picture element along each active scan line is consecutively sampled and encoded into a variable bit length data word. Each scan line is divided into segments having a predetermined number of sample positions included therein. A word counter cyclically counts each sample as it is encoded to provide a representation of the horizontal position of each code word within a segment along a scan line. The relative horizontal position of each code word is thus represented by the count of the word counter.

Abstract: A signaling extraction circuit utilizes common control circuitry to carry out the signal extraction function for all of a plurality of time multiplexed, digital data groups (digroups), each of which comprises 24 time division multiplexed, PCM encoded channels. Each digroup uses eight bits for transmitting digital information for each channel, but the eighth bit (D8) is borrowed for signaling purposes in every sixth frame. To identify these signaling digits, signaling frame information is inserted in a digroup bit stream in the framing bit position of every other frame (i.e., the subframes). A signaling subframe pattern store comprising a shared recirculating memory serves to maintain a continuing real time record of the pattern of the signaling framing information for each digroup, as well as a test digroup. When a predetermined pattern has been recorded for a digroup (i.e.