Patents Represented by Attorney, Agent or Law Firm John M. Gunther
  • Patent number: 6275953
    Abstract: A network file server includes a first set of data processors for receiving requests from clients, and a second set of data processors for accessing read-write file systems. A respective data processor in the second set is assigned to each file system for exclusive management of locks on the file system. The file server can detect failure of a failed data processor and automatically recover from the failure. When a failure of a data processor in the first set is detected, a spare data processor is programmed with the logical and physical network addresses of the failed data processor so that the spare data processor assumes the network identity of the failed data processor. When a failure of a data processor in the second set is detected, responsibility for management of the locks on each file system managed by the failed data processor is transferred to an operational data processor.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: August 14, 2001
    Assignee: EMC Corporation
    Inventors: Uresh K. Vahalia, Uday Gupta, Dennis P. J. Ting
  • Patent number: 6275897
    Abstract: A digital computer system includes a master mass storage subsystem and a slave mass storage subsystem which provides mirrored storage for the master mass storage subsystem. One or more host computer systems can access information in the master mass storage subsystem to retrieve information from, and update information stored in, the master mass storage subsystem. When a host computer accesses information in the master mass storage subsystem, the information is cached in the master mass storage subsystem's cache memory, and when the information is updated, the update information will be updated in both mass storage subsystem's cache memories prior to being stored in their respective storage devices.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: August 14, 2001
    Assignee: EMC Corporation
    Inventor: Eitan Bachmat
  • Patent number: 6260109
    Abstract: A method and apparatus for providing very large logical volumes (Meta Device) in a storage system is provided. The storage system includes host controllers and disk controllers which communicate through a shared memory. I/O requests are received by the host controller and placed into request queues. The request queues are associated with logical devices. A number of request queues in the host controller are concatenated together to produce the larger logical volume. The large logical volume appears to the host as a single addressable logical unit. I/O requests to the large logical volume are analyzed by the host controller to determine which logical devices are actually needed to service the request. The host controller then makes the appropriate queue entries. Processing of the requests then occurs in the same fashion as if the request had been to a non-Meta Device. This allows the disk controllers and memory to operate without modification.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: July 10, 2001
    Assignee: EMC Corporation
    Inventors: Erez Ofer, John Fitzgerald, Kenneth Halligan
  • Patent number: 6243834
    Abstract: An apparatus for capturing data transmitted over of a plurality of bi-directional communication buses is provided. The apparatus comprises a plurality of trace engines, each trace engine having a trace analyzer and a central processing unit connected together with a bus. Each one of the trace engines is connected to another trace engine, so that all of the trace analyzers within the trace engines are synchronized to a common clock. The synchronization to a single common clock allows all of the data captured by the plurality of trace engines to be analyzed or used together.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: June 5, 2001
    Assignee: EMC Corporation
    Inventor: Brian Garrett
  • Patent number: 6233660
    Abstract: A digital computer system comprises a mass storage subsystem and an “open systems” computer system. The mass storage subsystem includes a storage device for storing data and an access control for performing an access operation in connection with the storage device in response to a channel program received thereby in at least one channel program information transfer packet. The channel program includes at least one channel command and the supplementary channel command processing information useful in processing the at least one channel command. The “open systems” computer system performs processing operations in response to programs.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: May 15, 2001
    Assignee: EMC Corporation
    Inventor: Natan Vishlitzky
  • Patent number: 6223269
    Abstract: A stacked map storage system has a base mapping of logical data to physical locations in the storage system. Level maps are created either as positive or negative maps of a lower level map. A positive map enables an alternate view while keeping the next lowest level map the same. A negative map allows changes to a lower level map but stores references to the data in itself so the negative map becomes a backup. Negative maps freeze storage in themselves and are read-only. A positive map allows changes to itself and can be used by applications under test to make changes, while not allowing changes to the next lower level map to be made through the positive map. In a preferred embodiment, maps can be stacked to any number of levels, can be shared by applications and hosts, and can either be deleted or merged. Deletion removes the map as though it never existed. A merge overlays an upper view onto a lower view and thus changes the lower view to match the other's state.
    Type: Grant
    Filed: September 27, 1997
    Date of Patent: April 24, 2001
    Assignee: EMC Corporation
    Inventor: Steven M Blumenau
  • Patent number: 6222277
    Abstract: A semiconductor interconnect structure which includes a semiconductor substrate having a bottom surface. The printed circuit board also has a plurality of solder wettable pads disposed on the top surface of the printed circuit board. The printed circuit board and the semiconductor substrate are both comprised of material taken from the same group of materials. The interconnect structure also includes a plurality of balls formed of a first solder alloy disposed on the bottom surface of the semiconductor substrate and projecting downwardly therefrom. Each one of the plurality of balls are sized to support the weight of the semiconductor substrate. The interconnect structure also includes a plurality of solder joints formed of a second solder alloy connecting the plurality of balls to the corresponding plurality of wettable pads on the printed circuit board.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: April 24, 2001
    Assignee: EMC Corporation
    Inventor: Stuart Downes
  • Patent number: 6209059
    Abstract: A method of dynamically reconfiguring the logical devices in a storage system is provided. The method allows a logical devices to be added, removed, or repositioned without requiring the storage system to be taken off-line. The method includes manipulating the request queues associated with host controllers within the storage system. The request queues associated with each logical device may be repositioned in the request queue memory in order to make room for new logical devices or to take advantage of free space associated with a removed logical device. The storage system communicates with the host computer in order to manage the reconfiguration of the request queues while still providing storage services to the host computer.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: March 27, 2001
    Assignee: EMC Corporation
    Inventors: Erez Ofer, John Fitzgerald, Kenneth Halligan
  • Patent number: 6205529
    Abstract: An apparatus for defragmenting disks by incorporating a copy function in the logic controlling a disk, so that a disk can be instructed to copy the contents of tracks from one area to another on the disk without requiring a series of data transfers between the disk and the host computer to which it is assigned. Conventional defragmentation techniques can be used to determine which files need to be defragmented and how much contiguous free space is available on the disk. Once this has been determined, the present invention enables the defragmentation program to send copy commands to the disk to cause the copy function in the logic controlling the disk to perform the data transfers, thus freeing up the host computer to perform other processing until the logic controlling the disk signals completion of the copy function's operation.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: March 20, 2001
    Assignee: EMC Corporation
    Inventor: Eli Shagam
  • Patent number: 6202135
    Abstract: A digital data processing system comprises a host information generating device, a mass storage subsystem, and a back-up information storage subsystem. The host information generating device generates information and provides it to the mass storage subsystem for storage. The mass storage subsystem receives the generated information from the host information generating device and transfers the generated information to the storage element for storage, and further transfers the generated information to the back-up information storage subsystem. The back-up information storage subsystem receives and stores the generated information from the mass storage subsystem's control element. The back-up information storage subsystem includes a filter/buffer module, a tape log module and a reconstruction module. The filter/buffer module filters and buffers the information received from the mass storage subsystem and provides the buffered information to the tape log module for storage.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: March 13, 2001
    Assignee: EMC Corporation
    Inventors: Nadav Kedem, Haim Bitner
  • Patent number: 6192408
    Abstract: A network file server includes a first set of data processors for receiving requests from clients, and a second set of data processors for accessing read-write file systems. A respective data processor in the second set is assigned to each file system for exclusive management of read and write locks on the file system. Each data processor in the first set can authorize access to file systems directly accessed by more than one data processor in the second set. Processing of a request for access that is authorized is continued by the data processor that is assigned to manage the locks on the file system to be accessed. The exclusivity of lock management eliminates cache coherency problems, and dynamic load balancing can be used to prevent the lock management from becoming a bottleneck to performance. A preferred embodiment includes a cached disk storage subsystem linked to data mover computers.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: February 20, 2001
    Assignee: EMC Corporation
    Inventors: Uresh K. Vahalia, Uday Gupta, Betti Porat, Percy Tzelnic
  • Patent number: 6185521
    Abstract: A digital computer system comprises a mass storage subsystem and an “open systems” computer system. The mass storage subsystem includes a storage device for storing data and an access control for performing an access operation in connection with the storage device in response to a channel program received thereby in at least one channel program information transfer packet. The channel program includes at least one channel command and the supplementary channel command processing information useful in processing the at least one channel command. The “open systems” computer system performs processing operations in response to programs.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: February 6, 2001
    Assignee: EMC Corporation
    Inventor: Natan Vishlitzky
  • Patent number: 6185634
    Abstract: An address triggered DMA controller includes a DMA engine for controlling transfer of data between an external device and locations in a memory designated by respective addresses. Such a DMA controller also includes a DMA monitor for monitoring the respective addresses, and if one of the respective addresses matches a predetermined value, generating a signal to indicate a match.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: February 6, 2001
    Assignee: EMC Corporation
    Inventor: Jeffrey Wilcox
  • Patent number: 6161111
    Abstract: A file management system is disclosed for managing files stored on a mass storage subsystem in response to file management commands. The mass storage subsystem stores data on at least one storage device, said storage device including a series of blocks. The file management system comprises an operating system-independent file map, a file management command receiver module, and a file management command execution module. The operating system-independent file map stores information identifying, for each file, block information identifying blocks on which the file is stored. The file management command receiver module receives a file management command. The file management command execution module executes the file management command in relation to the operating system-independent file map.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: December 12, 2000
    Assignee: EMC Corporation
    Inventors: Madhav Mutalik, Faith M. Senie
  • Patent number: 6154853
    Abstract: A method of dynamically changing a storage system from a RAID configuration to a mirror configuration is provided. The change occurs when a device begins to fail or fails completely. Data from the logical volumes of the failed device is written to corresponding parity volumes within the RAID group. In addition, data from all logical data volumes is copied to spare devices. Once all the data is copied, the system operates in a mirrored mode. A mirrored mode includes writing data to both and active and backup volume for each write transaction. When the failed device is replaced the data and parity volumes are restored. Once restored, the spare devices are returned to inactive status.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: November 28, 2000
    Assignee: EMC Corporation
    Inventor: Ishai Kedem
  • Patent number: 6148382
    Abstract: A digital data processing system comprises a host information generating device, a mass storage subsystem, and a back-up information storage subsystem. The host information generating device generates information and provides it to the mass storage subsystem for storage. The mass storage subsystem receives the generated information from the host information generating device and transfers the generated information to the storage element for storage, and further transfers the generated information to the back-up information storage subsystem. The back-up information storage subsystem receives and stores the generated information from the mass storage subsystem's control element. The back-up information storage subsystem includes a filter/buffer module, a tape log module and a reconstruction module. The filter/buffer module filters and buffers the information received from the mass storage subsystem and provides the buffered information to the tape log module for storage.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: November 14, 2000
    Assignee: EMC Corporation
    Inventors: Haim Bitner, Ariel J. Ish-Shalom
  • Patent number: 6148369
    Abstract: A method and apparatus for providing very large logical volumes (Meta Device) in a storage system is provided. The storage system includes host controllers and disk controllers which communicate through a shared memory. I/O requests are received by the host controller and placed into request queues. The request queues are associated with logical devices. A number of request queues in the host controller are concatenated together to produce the larger logical volume. The large logical volume appears to the host as a single addressable logical unit. I/O requests to the large logical volume are analyzed by the host controller to determine which logical devices are actually needed to service the request. The host controller then makes the appropriate queue entries. Processing of the requests then occurs in the same fashion as if the request had been to a non-Meta Device. This allows the disk controllers and memory to operate without modification.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 14, 2000
    Inventors: Erez Ofer, John Fitzgerald, Kenneth Halligan
  • Patent number: 6145006
    Abstract: A method of managing shared storage system resources amongst a plurality of heterogeneous host computers utilizing different operating systems is described. The method includes providing a lock mechanism which allows a host to gain exclusive control of storage system resources, including storage devices.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: November 7, 2000
    Assignee: EMC Corporation
    Inventors: Natan Vishlitsky, Erez Ofer, Brian Garrett
  • Patent number: 6111528
    Abstract: Arrangements are disclosed for use in a network of digital data processing systems for rapidly encoding information signals for transmission over communication links in the network, and for rapidly decoding information received thereover, thereby to facilitate higher-bandwidth communications over the network. In addition, network command and control information transmitted along in the data transmitted over the network is rapidly decoded and verified by a command decoder and command verifier.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 29, 2000
    Assignee: EMC Corporation
    Inventor: Norman J. Bagley
  • Patent number: 6107855
    Abstract: A clock distribution system in a reliable electronic system includes a predetermined number of clock signal load circuits, each having a clock signal input terminal. A first clock signal generator has the same predetermined number of clock signal output terminals coupled to the clock signal input terminals of the clock signal load circuits. A second clock signal generator also has the same predetermined number of clock signal output terminals which are also coupled to the clock signal input terminals of the clock signal load circuits.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: August 22, 2000
    Assignee: EMC Corporation
    Inventor: Jeffrey Wilcox