Abstract: A lumped-parameter, electrical delay line having shunt capacitance including variable-capacitance diodes. A tuning voltage applied to the diodes provides electrically variable delay at low jitter and stable insertion delay.

Abstract: An inverse assembly method for converting binary executable microprocessor code into corresponding assembly language mnemonics provides for the storage of all the possible binary codes and corresponding assembly language mnemonics in a plurality of tables set up in a decision tree form which corresponds to the format of a user document provided by the manufacturer of a target microprocessor. The instructions and data information contained within the executable code acquired from the taret microprocessor are distinguishably tagged prior to being stored in an acquisition memory. The code from the acquisition memory, in binary or hex form, indexes a primary table which contains a plurality of entries containing a binary value which may have a mask portion, each entry containing a plurality of actions having an optional string to be displayed, optional parameter masks and an optional table to call.

Abstract: A control panel supports and positions interchangeable subunit electronic devices and provides a neat and uniform outwardly facing surface. When subunit electronic devices are disconnected from the control panel, cover plates extend and conform to the uniform outwardly facing surface. Hinged support members "lock" in an over center position to rigidly support each cover plate. Electrical connectors protruding from each subunit electronic device "unlock" the hinged support members from the over center position when the subunit electronic device is urged toward the cover plate.

Abstract: A digital free-running clock oscillator comprises a circuit synchronizing the operation of the oscillator with an asynchronous timing signal from an external source, and is provided with a protection circuit for preventing a logic race condition in the synchronizing circuit during a period of coincident transition of the oscillator output and the external timing signal.

Abstract: An amplifier includes first and second transistors having emitters connected to a first current source, feedback from the second transistor collector to its base being supplied through a base-emitter path of a first Darlington pair in series with a first diode. A second current source is connected to the first Darlington pair emitter. Third and fourth transistors have emitters connected to a third current source with feedback supplied from the fourth transistor collector to its base through a second Darlington pair and a second diode. The second Darlington pair emitter is connected to a fourth current source and resistively coupled to the first Darlington pair emitter.

Abstract: A cursor generator for an oscilloscope presents a cursor line or lines in juxtaposition with waveforms on an oscilloscope display, wherein the cursor is formed of a plurality of discrete points or dots. The deflection signal for generating the cursor is preferably supplied from the oscilloscope's character generator, while the analog positioning voltages for the cursor are also used in sweep delay comparison portion of the oscilloscope for initiating the oscilloscope's delayed sweep.

Abstract: A voltage controlled triggered oscillator includes a NAND gate and a set of series connected triggerable delay circuits, the output of the NAND gate being fed back to one of its inputs through the delay circuits. A trigger signal is applied to another input of the NAND gate and to triggering inputs of the delay circuits. When the trigger signal is asserted, each delay circuit produces an output signal of state which tracks the state of its input signal but with a predetermined delay so that the NAND gate output oscillates with a frequency determined by the delay times of the delay circuits and the propagation time of the NAND gate. When the trigger signal is deasserted the NAND gate output is terminated and each delay circuit drives its output signal high regardless of the state of its input signal so that the oscillator may be rapidly retriggered.

Abstract: A switched attenuator circuit providing three selectable voltage-divider ratios including one which passes substantially 100 percent of the input signal. The circuit places constant load resistance on its source in all positions when driving a high-resistance load. The circuit is inexpensive to construct, comprising three attenuation resistors, two input resistance compensating resistors, and two single-pole double-throw switching elements for changing the series/parallel configuration of the attenuation resistors and switching the compensating resistors into the circuit. The circuit places all parasitic capacitance associated with the switches on the input side of the circuit, thereby providing uniformly low output capacitance for all voltage-divider ratios.

Abstract: A communications interface for controlling asynchronous data transmission between a host computer and an input/output device achieves very high data transfer rates and reduces I/O bottlenecks. The interface includes a microprocessor and a memory addressable thereby. The microprocessor controls data transfer from the host computer into an output buffer maintained within the memory and controls subsequent data transfer from the output buffer to an output device, independently of the operation of the host computer. Data received from the host computer is stored directly into an appropriate output buffer storage location without any time-consuming reading and writing of the data by the microprocessor. This is accomplished by providing a hardware register for storing data received from the host computer. At the appropriate time data transfer from the microprocessor to the memory is disabled, and data transfer from the register to the memory is enabled.

Abstract: A method for adjusting a time delay of a signal with respect to a reference event is achieved by displaying a graphical representation of the delay time on a display terminal, modifying the displayed graphical depiction to indicate a different time delay, and then adjusting the time delay of the signal to match the modified time delay indicated by the displayed graphical depiction. The display terminal is controlled by a display controller and the graphical depiction of the delay time is modified by an operator using cursor control keys of a keyboard to transmit a first indicating signal to the display controller and other keys of the keyboard to transmit a second indicating signal to the display controller. Each time the controller detects a first indicating signal, the graphically displayed delay time is incremented and each time the controller detects a second indicating signal, the graphically displayed delay time is decremented.

Abstract: The cathode-ray-tube beam deflection of an oscilloscope is automatically calibrated by photoelectrically detecting the intersection of the tube's electron beam with visible graticule lines on the tube's faceplate. An input signal is compared, at the time of intersection, with stored values representative of the graticule lines, and the deflection amplifier gain of the oscilloscope is adjusted until the graticule lines properly represent the measurement of the input signal.

Abstract: Acquired sampled waveform data is displayed on a screen as a busform, wherein a change of state in the waveform during a sampling interval is represented by a solid block character on the screen, and wherein the lack of a change of state in any of the channels during a sampling interval is represented by a space character of the same width as the block character. The blocks and spaces representing contiguous sampling intervals are of the same width and are displayed in horizontal sequence across the screen such that the time between state changes is graphically represented by the horizontal distance between the blocks. Numbers indicating the associated waveform state are displayed when possible in the space or spaces following each block character.

Abstract: Apparatus for correcting astigmatism produced by the electromagnetic deflection yoke of a cathode-ray-tube includes plural stigmator electrodes provided with elongated slots through which the cathode-ray-tube's electron beam passes. Appropriate correction voltages, stored in digital memory, are applied to the stigmator and focus electrodes for bringing about re-focusing of the electron beam in appropriate axes for restoring a single point focus on the cathode-ray-rube's screen.

Abstract: A broadband, monolithic integrated-circuit power divider/combiner circuit utilizing gallium arsenide field-effect transistors configured as distributed amplifiers. Two distributed amplifiers include a common merged transmission line element which divides/combines the input signal(s).

Abstract: A very high resolution cathode-ray tube is provided with a combination cylindrical high voltage electrode and particle trap disk that is supported by a multiplicity of spring fingers from the interior wall of the cathode-ray tube neck. One set of the spring fingers contacts the high voltage coating on the interior of the cathode-ray tube envelope. The particle trap portion is provided with an aperture smaller than the adjacent circumferential edge of the lower voltage electron lens electrode in the adjacent electron gun structure, while the higher voltage electron portion is larger in diameter than the lower voltage electrode of the electron gun structure and overlaps the lower voltage electrode. A ring getter device is supported from the higher voltage electrode.

Abstract: A high frequency sample and hold circuit has a sampling diode bridge for coupling an input test signal to be sampled to a holding capacitor when all of the diodes of the bridge are forward biased by an applied strobe signal, thereby charging the capacitor to the input voltage. The diode bridge substantially uncouples the input signal from the holding capacitor when the strobe current direction is reversed such that the holding capacitor retains the charge stored thereon and therefore remains charged to the current sample signal voltage at the instant the strobe current reverses direction. Any holding capacitor charging current generated by the sampling bridge as it returns to equilibrium after strobe current reversal is offset by a holding capacitor charging current of substantially equal magnitude and opposite phase generated by a compensating bridge.

Abstract: Graphics commands for a display are listed and divided into sublists corresponding to separate strips or bands of the display, and these sublists drive the display memory consecutively and substantially concurrently with the processing of additional sublists. Graphics commands relating to graphics extending between bands are transferred to successive sublists during processing to provide their display in successive bands. A pair of band size bit map memories are alternately loaded with band information and read out.

Abstract: A variable size and position dialog area or alphanumeric area is provided for the screen of a computer terminal in response to a single line of data from a data bus, containing the numerical indication of the initial line of a plurality of lines of alphanumeric information to be displayed and the numerical indication of the last line of a plurality of lines of alphanumeric information to be displayed. The numerical indications are successively loaded to a state machine operating as a counter which disables the alphanumeric display during a first counting operation and enables the alphanumeric display for the duration of a second counting operation.

Abstract: A microwave interconnect for integrated or hybrid circuits includes a flexible sheet bearing a flexible conductor which is divided into a plurality of insulated conductive lines, at least some of which make contact with the integrated or hybrid circuit, as well as with a second circuit to which the first is thereby connected. The flexible sheet is backed by a body of elastomeric material and a compression bar which assures good electrical contact of the flexible conductor with the circuits when the compression bar is tightened down on the circuits. The construction allows some degree of misregistration of parts while providing circuit coupling operative at high frequencies.

Abstract: A coupling discriminator for Ethernet standard local area network interface equipment monitors the electrical characteristics of an incoming differential signal pair, discriminates between a signal pair that is direct coupled and a pair that is transformer coupled, and configures the interface equipment for operation with the type of coupling detected.