Abstract: The invention provides a method for controlling a level of a voice signal to reduce the noise which is superimposed on a voice signal without marring the content of the voice signal. To achieve the invention, the tracking signal is formed corresponding to a received RF signal strength. The tracking signal is reduced to together with the decrease of the received RF signal strength if the received RF signal strength decreases. The tracking signal increases at a constant rate gradually if the received RF signal strength increases. A level of a voice signal is controlled by a function corresponding to the tracking signal.

Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.

Abstract: A speech synthesizer includes a data memory having a plurality of address areas, which stores a plurality of phases in the address areas and an address designating circuit designating one of the address areas based on the phase signal. Further, a speech synthesizer includes a speech synthesizing circuit generating a speech synthesizing signal corresponding to the phase, which is stored in the designated area, a digital/analog converter transforming the speech synthesizing signal to an analog signal having amplitude, and a counter setting a period of silence. Furthermore, a speech synthesizer includes a silence-input circuit being connected between the speech synthesizing circuit and the digital/analog converter, which supplies a predetermined voltage to the digital/analog converter for the period that is set by the counter.

Abstract: A method for correcting characteristics of an attenuated phase-shift mask having an attenuated layer including (a) storing a data in a memory, which shows a correlation between characteristics and process conditions, (b) measuring the characteristics of the attenuated phase-shift mask, (c) calculating a appropriate process condition from the result of the step (b) and the data stored in the memory; and (d) soaking the attenuated phase-shift mask into a liquid solution for a certain time-that is calculated in the step (c) to change thickness and composition of the attenuated layer.

Abstract: A semiconductor device includes a semiconductor substrate having a center area where an IC is formed and a peripheral area surrounding the center area, a first wiring pattern formed on the substrate in the center area, a second wiring pattern formed in the peripheral area wherein the second wiring pattern encompasses the center area, a first insulating layer formed over the center and peripheral areas, and a second insulating layer formed on the first insulating layer which is formed on the semiconductor substrate wherein the second insulating layer is not formed over the second wiring pattern.

Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.

Abstract: A gate management system for controlling an operation of a gate of a vault including a biometrics information management device having a first memory, storing biometrics information of at least a first and second persons, the first person being required to be accompanied with the second person to pass through the gate and the second person being able to pass the gate alone, a gate management device having a second memory, temporarily storing biometrics information of the first and second person in the second memory, and comparing the temporarily stored information with the information stored in the first memory, a controller controlling an operation of the gate based on a result of the comparison performed by the gate management device.

Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.

Abstract: A sealing apparatus for sealing by resin a semiconductor wafer having semiconductor elements on its surface. The apparatus includes an upper mold and a lower mold having an area where the semiconductor wafer is mounted, the lower mold having an uneven surface in the area and a shock absorber under the lower mold.

Abstract: A molding equipment for a resin shielding semiconductor device includes a lower platen having a lower cavity, and an upper platen having an upper cavity, and a recess which is adjacent to the upper cavity. A lead frame has an opening serving as a passage of resin. The opening has one end rounded.

Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing an SOI substrate, (2) forming a metal layer on the SOI substrate, (3) performing a first anneal treatment to the metal layer at a relatively low temperature in order to transform the metal layer to a first silicide layer, (4) forming an insulating layer on the first silicide layer, and (5) forming a contact hole, which reaches the first silicide layer, in the insulating layer; and (6) performing a second anneal treatment to the silicide layer at a relatively high temperature in order to transform the first silicide layer to a second silicide layer.

Abstract: An image-input device includes a camera for capturing an iris pattern, and a personal computer for displaying the captured iris image. The computer has software for registering iris data and for comparing iris data. A half mirror is connected to the camera. The camera is mounted to the display of the computer. The half mirror, which transmits a visible light element and reflects near infrared light, is disposed in front of the display when the camera is connected to the computer. The iris of a user is captured by the camera while the user watches the display of the computer through the half mirror.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A semiconductor device includes a substrate formed of a group III element and a group V element, a buffer layer having a thickness of at least 0.5 &mgr;m covering an the entire main surface of the substrate, and a selective-area growth layer grown selectively on the buffer layer. The buffer layer includes both the group III element and the group V element. The buffer layer is formed by metalorganic vapor-phase epitaxy.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A key switch includes an elastic member having a circular open end and a membrane sheet on which the elastic member is disposed. The membrane sheet includes two flexible sheets and an insulating resin sheet sandwiched between them. The insulating sheet includes an opening, which has a shape different from that of the open end.

Abstract: A semiconductor chip includes a main surface having a plurality of sides, a plurality of signal electrodes formed on the main surface along the sides, the signal electrodes along one of the sides being disposed in a first area having a first length. The chip further includes a power supply electrode formed on the main surface along the sides, the power supply electrode along the one of the sides being disposed in a second area having the second length, which is longer than the first length, between the one of sides and the signal electrodes.

Abstract: A molding equipment for a resin shielding semiconductor device includes a lower platen having a lower cavity, and an upper platen having an upper cavity, and a recess which is adjacent to the upper cavity. A lead frame has an opening serving as a passage of resin. The opening has one end rounded.

Abstract: A multi-chip package type semiconductor device includes a first insulating substrate having a hollow on its main surface, a second insulating substrate having on its main surface an opening, which is larger than the hollow, and being on the first substrate wherein the opening encompasses the hollow, a first semiconductor chip being formed in the hollow, a second first semiconductor chip whose size is approximately the same as that of the first semiconductor chip, being supported by the first insulating substrate in an area, which encompasses the hollow.