Abstract: A semiconductor wafer planarizing device for polishing a surface of a semiconductor wafer comprises a polishing pad having a hard polishing area and a soft polishing area. In a method of planarizing a surface of the semiconductor wafer by using the device, times during which said semiconductor wafer contacts said first area or said second area of the polishing pad is controlled.

Abstract: A wire bonder includes a cut clamper having a pair of supporting members and a pair of electrodes formed in rectangular shape. Each electrode is rotatably connected to the supporting member. Each electrode has an uneven surface. A heater is incorporated in one or both of supporting.

Abstract: A pair of capacitors are provided at a window sash or a window glass edge. Each capacitor is connected to two variable phase delay generators in parallel. Selectors are inserted between the capacitors and variable phase delay generators. Each selector alternates the connection between the capacitor and two variable phase delay generators. Upon insertion of human bodies, two variable phase delay generators reverse relative phase delays of the output signal from the two variable phase delay generators. If one of the relative phase delays is reversed, the human bodies are detected to be inserted into the window opening.

Abstract: A semiconductor memory device includes a reference current generating circuit that generates a reference current corresponding to a threshold voltage of a memory cell. A current comparing circuit compares a current across the memory cell when data is written to the memory cell, with the reference current. A control circuit controls the writing operation in response to a result of the comparison.

Abstract: A method for forming an alignment mark includes defining a circuit pattern area and an alignment mark area on a semiconductor substrate, forming a first pattern in the alignment mark area, forming a second pattern of a first material on the first pattern, forming a layer of a second material different from the first on the entire surface of the semiconductor substrate, and polishing the layer of the second material and the second layer such that the second pattern and the layer of second material are polished at different speed, until a step difference appears between the second pattern and the layer.