Abstract: A method for correcting characteristics of an attenuated phase-shift mask having an attenuated layer including (a) storing a data in a memory, which shows a correlation between characteristics and process conditions, (b) measuring the characteristics of the attenuated phase-shift mask, (c) calculating a appropriate process condition from the result of the step (b) and the data stored in the memory; and (d) soaking the attenuated phase-shift mask into a liquid solution for a certain time that is calculated in the step (c) to change thickness and composition of the attenuated layer.

Abstract: A test chip for a molding material including fillers, including, a semiconductor substrate and a test circuit formed on the substrate. The test circuit includes at least one transistor, and two dams formed on the substrate for providing a slit therebetween, the slit capturing the fillers of the molding material when the molding material is applied to the test circuit.

Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.

Abstract: A clock signal switching circuit that switches between two clock signals having a phase difference. The clock signal switching circuit includes a first selector that selects one of the clock signals according to the level of a selection signal, a second selector that selects one of first and second control signals according to the level of the selection signal. The level of the first and second control signals are changed in response to an original signal and the first or the second clock signal. A gate circuit generates the output signal from the first and second selectors wherein the level of the selection signal is changed in response to the original signal after the levels of both of the first and second control signals have changed.

Abstract: A push-back circuit board frame on which a semiconductor device is mounted, including a circuit board, the board being detached from the frame and being returned to an original position in the frame, a cavity formed at an edge of the circuit board in the frame, a semiconductor chip mounted on the circuit board, a resin sealing the semiconductor chip on the circuit board, and a support base made of the same material as the resin, formed in the cavity, where all of the resin is formed simultaneously, and connected each other.

Abstract: A semiconductor device having an electrostatic discharge protection circuit, manufactured by a SOI-CMOS process, the device includes an output terminal and a ground terminal. The electrostatic discharge protection circuit is formed on an insulator, and includes a lightly doped diffusion layer of a given conductivity type, two first highly doped diffusion layers of the given conductivity type, and a gate electrode formed on a gate insulating layer which is formed on the lightly doped layer, the lightly doped diffusion layer being sandwiched by the highly doped layers, one of the highly doped layers being connected to the output terminal and the gate electrode being connected to the ground terminal. An output transistor of the given conductivity type having a gate electrode, a source and a drain, the source being connected to the ground terminal. The protection circuit and the output transistor are connected to each other in series, between the output terminal and the ground terminal.

Abstract: A signal transmitting circuit for processing an input signal at an input terminal, and for outputting the processed signal from an output terminal, includes a control circuit controlling selectively between a first condition and a second condition as to a current pass in response to a control signal, wherein the first condition indicates that the signal is prohibited from transferring to the input node so that a voltage level at the input node is held at a predetermined voltage level, and the second condition indicates that the signal is allowed to transfer to the input node so that a voltage level at the input node is no longer held at the predetermined voltage level.

Abstract: In a halftone phase shift mask including a mask substrate and a rectangular pattern having a side (L) formed on the substrate, which is defined within a large pattern which is transferred on a resist material formed on a semiconductor substrate, the rectangular pattern includes a plurality of first opaque patterns, each having a width (ML) equal to 1 to 1½ times the resolution limit of the resist material at least one transparent opening pattern, having a width (MS) less than half the resolution limit, and wherein the number (X) of the opaque patterns and transparent opening patterns is determined by a formula of: X=2P+1, where P=ROUND UP ((L−ML)/(ML+MS)).

Abstract: A test chip for a molding material including fillers, including, a semiconductor substrate and a test circuit formed on the substrate. The test circuit includes at least one transistor, and two dams formed on the substrate for providing a slit therebetween, the slit capturing the fillers of the molding material when the molding material is applied to the test circuit. A method for testing a molding material including fillers for a semiconductor device, including steps of preparing a test chip, placing the test chip in molding equipment, injecting the molding material including fillers into the molding equipment, capturing the fillers in the slit, and detecting the influence of the fillers on electrical characteristics of the test chip using the test circuit.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A buffer circuit having an input and output terminals includes a first Schottky gate transistor connected between a voltage setting node and ground, a load device connected between a power supply and the voltage setting node, a second Schottky gate transistor connected between the output terminal and ground, the gate of the second Schottky gate transistor being connected to the voltage setting node, a third Schottky gate transistor connected between the output terminal and the power supply, the gate of the third Schottky gate transistor being connected to the input terminal, a resistor means connected the gate of the first Schottky gate transistor and input terminal for increasing a voltage level applied to the gate of the third Schottky gate transistor.

Abstract: Described here is a method of forming a thin-film portion for allowing electrons produced from a transmission electron microscope to pass therethrough at a portion to be observed of a semiconductor and effecting a predetermined etching process on the thin-film portion thereby to create a semiconductor sample for the transmission electron microscope. Prior to the execution of the etching process, grooves for reducing a stress introduced into the thin-film portion by the etching process are defined in the thin-film portion.

Abstract: A method of wire-bonding between a pad on a semiconductor chip and a pad on a circuit board on which the semiconductor device is mounted, includes clamping a wire between a pair of clamping electrodes, each having a rectangular main surface, applying a first electric potential to the wire with a torch rod, applying a second electric potential directly to the wire with the clamping electrodes, so as to form a melted ball at a tip of the wire, solidifying the melted ball, unclamping the wire, pressing the solidified ball with a capillary against the pad on the circuit board, vibrating the wire ultrasonically to bond the solidified ball to the pad of the circuit board, moving the wire whose tip is bonded to the pad of the circuit board, with the capillary on the pad of the semiconductor chip, vibrating the wire ultrasonically to bond the wire to the pad of the semiconductor chip, and clamping the wire between the clamping electrodes again, and moving the clamping electrodes away from the pad of the semiconductor

Abstract: A semiconductor memory capable of detecting defective data in the memory cells thereof is presented. In the memory, the defective data is detected by applying a word-line voltage, which is less than the minimum threshold voltage of memory cells. Further, when a memory cell at the address N has a defective data, a memory cell at the address N−1 is output as the data of the memory cell at the address N.

Abstract: A telecommunication device includes a support member, a board and container for containing an optical fiber. A support member formed of an elastic material, has an upper guide, a lower guide and a body. The bottom guide has a connecting pin. The support member is formed in a single integral structure, and is fabricated independently. The board having holes for the connecting pin is disposed in the container. The support member is fixed on the board by inserting the pin into one of the holes.

Abstract: A conveyance system in a semiconductor manufacturing process comprises a process unit processing a semiconductor wafer, a conveyer conveying the semiconductor wafer, a conveyer controller controlling the conveyer, and a computer controlling the conveyer and the conveyer controller. In the system, the process unit sends a warning signal to said computer, indicating time of the process completion in the process unit before the process is completed, and the conveyer is moved to the process unit in response to the warning signal.

Abstract: A manufacturing method of a semiconductor device removes a silicon carbide layer, which is undesirably formed on a surface or the like of a contact hole by dry etching, by plasma treatment using a gas that contains hydrogen. The silicon carbide layer can be effectively removed without causing damage to a substrate by setting the content of hydrogen to 80% or more, a gas flow rate to 50 SCCM or more, and a pressure to 50 mTorr or more.

Abstract: An optical coupling semiconductor switching circuit to be coupled to a light emitting device for controlling electric circuits. The switching circuit includes a light detector generating voltage in response to light from the light emitting device and an impedance circuit having a first and a second output terminal. The impedance circuit is connected to the light detector and passes through a voltage input from the light detector to the output terminals with little loss. A plurality of switching devices are connected in parallel between the output. Each switching device includes at least a pair of transistors each having a gate connected to the first output terminal, and an optical rectifier that is activated by light from the light emitting device. The rectifier has a cathode connected to a source of each transistor and a anode connected to the second input terminal.