Patents Represented by Attorney, Agent or Law Firm Kenneth E. Leeds
  • Patent number: 4612629
    Abstract: A dynamic RAM memory cell comprises an MOS read transistor whose conductivity state is determined by the state of charge on a first electrode overlying the read transistor channel region. The first electrode is connected through a buried contact opening to a diffused region in the substrate. This diffusion serves as a junction isolated storage node. This storage node can be charged or discharged through an MOS write transistor. The first electrode is capacitively coupled to a field plate held at a field potential. A control gate formed in a second electrode controls conduction through the write transistor and also allows selective reading in an array of read transistors. Nondestructive read can be achieved together with transistor amplification of the charge stored on the first electrode.
    Type: Grant
    Filed: September 30, 1983
    Date of Patent: September 16, 1986
    Inventor: Eliyahou Harari
  • Patent number: 4609828
    Abstract: Each of a plurality of parallel connected power supplies is controlled by a parallel control circuit which measures the output current from each power supply and compares this output current to the average output current produced by all the power supplies and generates a signal representative of the difference therebetween to drive the output current of the power supply toward the average output current from all power supplies. The structure includes in addition a switch for disconnecting the parallel control circuit of a failed power supply from the system and a booster resistor for assisting in bootstrapping the startup of a given power supply being inserted into parallel with the preexisting parallel connected power supplies.
    Type: Grant
    Filed: April 30, 1984
    Date of Patent: September 2, 1986
    Assignee: Boschert Inc.
    Inventor: Kenneth T. Small
  • Patent number: 4608874
    Abstract: A gyroscope constructed in accordance with the present invention includes a flywheel (220) which can oscillate with at least two degrees of freedom about a central position in which the flywheel axis is aligned with the axis of a drive shaft (200), the flywheel being held radially and rotated relative to the body (100) of the apparatus. The gyroscope also includes a set of electrodes (101 to 104) for electrostatically controlling the position or for detecting the position of the flywheel. The electrodes are fixed relative to the body and face corresponding conducting surfaces of the flywheel. In accordance with the invention, the gyroscope further includes a rigid spinning casing (250) which encloses the flywheel in such a manner as to interpose a dielectric surface between the corresponding conducting surfaces of the flywheel and each electrode, the casing being fixed to the flywheel drive shaft but not having any degrees of freedom in oscillation relative to the body other than being free to spin.
    Type: Grant
    Filed: May 1, 1984
    Date of Patent: September 2, 1986
    Assignee: Societe de Fabrication d'Instruments de Mesure (S.F.I.M.)
    Inventor: Jean-Thierry Audren
  • Patent number: 4609998
    Abstract: A unique programming circuit, suitable for use with programmable read-only memories (PROM), or other circuits utilizing programmable fuses, is provided which overcomes several distinct disadvantages of prior art programming circuits. The programming circuit of this invention includes a Darlington pair of programming transistors which allows only a single programming transistor to be made large in order to carry the large programming current, and only a single high current drive signal need be applied to the single programming transistor, thereby minimizing power consumption and integrated circuit die area.
    Type: Grant
    Filed: December 15, 1983
    Date of Patent: September 2, 1986
    Assignee: Monolithic Memories, Inc.
    Inventors: Robert J. Bosnyak, Hua T. Chau, Donald Goddard, Sing Wong
  • Patent number: 4608268
    Abstract: A method of manufacturing a mask for use in x-ray photolithography includes the steps of coating a set of wafers (20) with boron nitride (22). The tension in the boron nitride is measured by using a capacitive probe (26) to measure bowing in a set of test wafers. The remaining wafers are attached to a pyrex ring (28), and the boron nitride is removed from one side of the wafers. A circular hole is then eteched in the wafer, and a layer of tantalum (32) and gold (34) are formed on the remaining boron nitride membrane. The gold (34) is patterned via a sputter etching process. Power is reduced at the end of the sputter etching process slowly to reduce mechanical stress in the mask. The tantalum (32) is then etched via a reactive ion etching process. In this way, an x-ray transparent boron nitride membrane is used to support x-ray opaque gold.
    Type: Grant
    Filed: July 23, 1985
    Date of Patent: August 26, 1986
    Assignee: Micronix Corporation
    Inventor: Alexander R. Shimkunas
  • Patent number: 4603307
    Abstract: An inverter (100) receives a DC voltage and generates therefrom a square wave output signal. The inverter includes an output transformer (T3) and a saturable core transformer (T4). The saturable core transformer (T4) provides base current for a first transistor (Q3) and a second transistor (Q4). The first transistor (Q3) and the second transistor (Q4) alternatively turn on and off, causing a square wave to appear across the secondary winding of the output transformer (T3). The primary winding of the output transformer is coupled to the collectors of the first and second transistors via a pair of windings (L10, L11) magnetically coupled to the saturable transformer (T4). A pair of diodes (D4, D5) are provided to prevent the output leads of primary windings of the output transformer (T3) from dropping below ground potential.
    Type: Grant
    Filed: February 12, 1985
    Date of Patent: July 29, 1986
    Assignee: Boschert, Inc.
    Inventors: William C. Voight, Arthur B. Odell
  • Patent number: 4596954
    Abstract: A unique frequency doubler circuit is utilized which requires only a handful of standard components such as operational amplifier, logic gates, resistors, capacitors and switches. In contrast to certain prior art frequency doublers, frequency doublers constructed in accordance with the teachings of this invention do not require the use of a phase lock loop, thereby resulting in a substantial simplification of circuit construction. Furthermore, frequency doublers constructed in accordance with this invention utilize a feedback technique which assures that the duty cycle of the output signal will be 50%, or any other predefined value.
    Type: Grant
    Filed: February 29, 1984
    Date of Patent: June 24, 1986
    Assignee: American Microsystems, Inc.
    Inventor: Yusuf A. Haque
  • Patent number: 4590440
    Abstract: A phase locked loop circuit (16) includes means to eliminate harmonic frequency locking. The phase locked loop includes a voltage controlled oscillator (1) which provides an output signal (V.sub.out) which is compared with the input signal (V.sub.in) by a phase detector (4). The output signal from the phase detector is integrated and the output signal of the integrator (7) is placed on the control input lead of the voltage controlled oscillator. The output signal of the voltage controlled oscillator is provided to a frequency detector (14, 17) which determines if the output frequency is within a predefined range. If the output frequency is above the predetermined range, a limiter circuit (15) provides a low voltage output signal to the control input lead of the VCO in order to pull the input voltage of the VCO to a voltage which corresponds with the appropriate operating range of the phase locked loop.
    Type: Grant
    Filed: July 6, 1984
    Date of Patent: May 20, 1986
    Assignee: American Microsystems, Inc.
    Inventors: Yusuf A. Haque, Ashraf K. Takla
  • Patent number: 4580065
    Abstract: A single-shot circuit is fabricated as an integrated circuit except for a single capacitor requiring a single pin to connect to the on-chip circuitry. The single-shot is rendered independent of process variations and operating conditions by incorporating an analog feedback loop. The output of the single shot is detected by an analog circuit which includes a positive and negative voltage generator the ratio of whose voltages is a function of the desired duty cycle. The generators are actuated, respectively, when a pulse exists and when there is no pulse. The analog feedback circuit also includes an integrator for receiving and integrating the positive and negative voltages from the generators. The integrated and amplified voltages are fed back to the last stage of the single-shot circuit. When the duty cycle is high, the voltage that is fed back drives the single shot circuit to reduce the pulse width.
    Type: Grant
    Filed: July 29, 1983
    Date of Patent: April 1, 1986
    Assignee: American Microsystems, Inc.
    Inventor: Yusuf A. Haque
  • Patent number: 4555668
    Abstract: A novel switched capacitor gain stage uses a unique circuit design and clocking technique that reduces the component mismatch offset voltage and the clock-induced feedthrough offset voltage produced by the circuit. The total capacitance ratio between the input capacitors and the feedback capacitor necessary to achieve a desired total gain is also minimized.
    Type: Grant
    Filed: October 14, 1983
    Date of Patent: November 26, 1985
    Assignee: American Microsystems, Inc.
    Inventors: Roubik Gregorian, Bahram Fotouhi
  • Patent number: 4541103
    Abstract: A unique CVSD CODEC is provided utilizing switched capacitor technology. This CVSD CODEC includes a syllabic filter which provides one of a large number of possible step sizes, thereby allowing the CVSD CODEC to accurately track and convert a wide range of input voltages. The CVSD CODEC includes coincidence logic, which determines how accurately the input voltage is being tracked, and a syllabic filter which provides an appropriate step size based upon the output signals of the coincidence logic. Large step sizes are provided for converting input voltages having large magnitudes, and small step sizes are used to convert input voltages having small magnitudes, thereby providing the very accurate resolution of input voltages over the wide range of magnitudes, while minimizing the bit rate required.
    Type: Grant
    Filed: February 22, 1983
    Date of Patent: September 10, 1985
    Assignee: American Microsystems, Inc.
    Inventors: Roubik Gregorian, Glenn Wegner
  • Patent number: 4533876
    Abstract: A differential operational amplifier is provided with a feedback loop which continuously adjusts the common mode voltage level of the amplifier so that it lies in the center of the dynamic range of the amplifier. The feedback loop measures the instantaneous common mode voltage level and compares it with a reference voltage which is set to reflect the desired common mode voltage. An error signal is generated and fed back into the amplifier to adjust the instantaneous common mode voltage level towards the reference level. Frequency compensation is also provided to overcome the phase shift introduced by the use of RC networks.
    Type: Grant
    Filed: October 18, 1983
    Date of Patent: August 6, 1985
    Assignee: American Microsystems, Inc.
    Inventors: Yusuf Haque, Erwin Ofner
  • Patent number: 4459578
    Abstract: Hall effect elements are placed in proximity to magnets in such a way that the position of the magnets relative to the Hall elements is a function of the position of a joystick controller. In this way, the position of the joystick can be "read" by a machine by reference to the Hall effect voltage.
    Type: Grant
    Filed: January 13, 1983
    Date of Patent: July 10, 1984
    Assignee: Atari, Inc.
    Inventors: Robert J. Sava, Roy J. Machamer