Abstract: A process is described for fabricating spacers of a desired thickness of filters, the spacers to be used in separating the filter from an underlying image sensing device. The process includes the steps of forming a pattern of electrically conductive material on one surface of the filter, depositing dry resist to the desired thickness over all of the filter except on the electrically conductive pattern, depositing additional electrically conductive material on at least the electrically conductive pattern, and removing the dry resist.

Abstract: A method for forming a predetermined configuration of a film material comprises the steps of forming a layer of a first material on a surface, forming a layer of a second material on the first material wherein the first material has an etch rate greater than that of the second material when the first material and the second material are exposed to a common etchant, etching portions of the second material and underlying portions of the first material to expose portions of the surface, forming a layer of film material on the exposed portions of the surface, forming a layer of film material on the exposed portions of the surface and on the remaining portions of the second material, and removing the remaining portions of the first material such that the overlying second material and the film material thereon is also removed.

Abstract: A method and circuitry (5) for enhancing the reproducibility and reliability of circuitry for reading a memory array (10a, 10b, 10a', 10b') provides a dynamically generated reference voltage for the sensing circuitry. The invention senses the highest word line voltage and communicates a voltage derived therefrom to the sensing circuitry (26, 27, 28, 29; 26', 27', 28', 29'; 32, 33) to provide a reference voltage. A voltage clamp (62) is coupled to the circuitry for communicating the highest word line voltage (50) to prevent the reference voltge from following the word line too low during transitions. The invention is rendered compatible with the existing write circuitry associated with the memory array (10a, 10b, 10a', 10b') by the provision of disabling circuitry (65) coupled to the communicating circuitry (55, 57) and to the clamp (62).

Abstract: MOS Control circuitry for incorporation on a microcomputer IC chip for assuring adequate power to maintain the data in an associated static random access memory. A rechargeable battery provides standby power, and the voltage level of the battery is compared with the microcomputer V.sub.cc supply. Whenever V.sub.cc drops below a predetermined level, such as the standby battery voltage level, the circuitry disconnects the V.sub.cc from the memory input power and replaces it with standby battery power. When V.sub.cc is returned to the system, a gate applies a trickle charge to the battery.

Abstract: A semiconductor digital memory such as a charge coupled device is provided with error detection capability. Error logic responsive to a group of data on the input bus generates a first error code which is stored in memory along with the group of data. When the data is retrieved from memory similar error logic generates a second error code. The first and second error codes are compared, and if the codes are identical the data is assumed to be correct. If codes differ then the data is discarded or errors therein are identified and corrected.

Abstract: An apparatus is described for acoustically investigating a casing in a borehole with a source of acoustic energy that is directed at the reflecting surface of an acoustic reflector in front of which is an acoustically transparent window. The inclination of the window relative to the reflecting surface is selected to deflect secondary transmissions and thus reduce window produced interferences. Several embodiments are described.

Abstract: A technique is disclosed for protecting integrated circuits from alpha particles. A central portion of a radiation resistant insulating substrate upon which electrically conductive leads are disposed is positioned in proximity to the integrated circuit. When the leads are electrically connected to the integrated circuit, the central portion of the substrate is allowed to remain over the integrated circuit to protect the integrated circuit. The insulating substrate typically comprises a polyimide film resistant to alpha particles.

Abstract: An electrically erasable programmable read-only memory (E.sup.2 PROM) is provided which utilizes an inhibit voltage applied to unselected word lines during writing to prevent writing in unselected rows. In the preferred embodiment, each memory cell of the E.sup.2 PROM array consists of a single floating gate field effect transistor. The E.sup.2 PROM of the present invention provides for row erasure and single bit writing.

Abstract: The lateral spacing between buried regions separated by oxide-isolation regions in a semiconductor structure is reduced to as little as one micron by performing a deep implantation of ions of the conductivity type opposite to that of the buried regions generally into portions of the substrate below the sites where the oxide-isolation regions are formed.

Abstract: A method for fabricating insulating regions in an integrated circuit structure is disclosed in which the insulating regions do not encroach upon the surrounding integrated circuit and in which a substantially planar surface across the top of the insulating material and the substrate is created. The method includes the steps of removing portions of the substrate wherever the insulating regions are to be formed, beginning to deposit insulating material across the substrate and in the openings created, and, while continuing to deposit insulating material simultaneously removing insulating material from generally horizontal surfaces and redepositing it on generally vertical surfaces of the substrate and the openings until a planar surface results.

Abstract: A sense amplifier for determining the binary logic state of a dynamic memory cell (11.sub.x,y) preamplifies an initial voltage difference established between a first input line (17.sub.y) coupled to the memory cell (11.sub.x,y) and a first reference line (18.sub.y) coupled to a reference cell (32.sub.y). The resulting amplifies voltage difference is generated between a second input line (19) coupled through a coupling device (Q51.sub.y) to the first input line (17.sub.y) and a second reference line (20) coupled through another coupling device (Q52.sub.y) to the first reference line (18.sub.y) by capacitively charging the second lines (19 and 20) preferably with a pair of capacitors (C61 and C62) individually coupled to the second lines (19 and 20). A differential sensing device (90) senses the amplified voltage difference to determine the logic state which is fully restored to the memory cell (11.sub.x,y).

Abstract: A temperature-compensated reference voltage circuit includes a transistor having a positive temperature coefficient of current. A circuit for establishing a predetermined current in the positive-temperature-coefficient-of-current transistor is connected to that transistor. A predetermined resistance serially connects the positive-temperature-coefficient-of-current transistor with a transistor having negative temperature coefficient of base-to-emitter voltage. The temperature-compensated reference voltage is established between the transistors. The temperature-compensated reference voltage circuit is particularly useful in a supply voltage sense amplifier circuit for thermal printhead drive transistors or other load elements. The sense amplifier circuit includes a circuit for comparing the reference voltage and a supply voltage. An output is adapted to be connected to a load for receiving the supply voltage.

Abstract: An adaptive word line pull-down circuit steers a pull-down current only to the word being pulled down and only for the time when that word is being pulled down. The time that it takes for the bottom word line to fall controls how long the pull-down current is steered to the falling word.

Abstract: A method and apparatus for exciting the analog input of an analog-to-digital converter and examining the output by means of analysis with histograms to determine the amplitude probability distribution of each digital output value. The amplitude probability density functions corresponding to accurately known excitation signals may then be processed to obtain a description of the transfer characteristic for the analog-to-digital converter to be calibrated. In a particular embodiment, the excitation signals applied to the analog input of the analog-to-digital converter are pairs of signals representing accurately known rising and decaying exponential signals, and particularly exponential signals which are complementary to one another. Histograms of the digital response to the analog excitation signals are then constructed which correspond to amplitude density functions.

Abstract: A video game apparatus for connection to a standard television set and including an electronics-containing console having a plurality of parameter selection buttons and a chute mechanism for receiving a replaceable cartridge-containing supplementary electronic circuitry, and a pair of hand controllers for providing player control inputs to the console electronics. Improved connector apparatus is associated with the chute mechanism to enable electrical connection to be made to a cartridge contained printed circuit board with a minimum of insertion force.

Abstract: A process for suppressing electromigration in conducting lines formed on integrated circuit structures includes the steps of forming the conducting lines on the integrated circuit structure and heat treating the lines to cause the average grain size in the lines to become larger than the width of the conducting lines.

Abstract: An alignment target for an electron-beam direct write system is formed on a wafer of semiconductor material. First, a layer of silicon oxide is formed on a surface of the wafer. Then a layer of silicon nitride is formed on the oxide. Next, an opening is etched in the nitride layer to expose a surface portion of the oxide. The surface portion of the oxide is then etched to form a hole in the oxide. The hole is formed such that the oxide layer is undercut beneath the nitride layer such that a cantilevered nitride overhang is formed around the perimeter of the hole. A layer of aluminum is then deposited over the nitride layer.

Abstract: Bromine-containing plasma is utilized to inhibit corrosion of aluminum or aluminum alloy films which have been etched utilizing a chlorinated plasma.

Abstract: A universe of probes is contained within a platen in a spaced-apart, substantially parallel relationship with one another with their tips pointing in the same direction. Each probe is free to move longitudinally between an advanced or test position and a retracted position. The platen nests into a wired personalizer having probe selector posts upstanding therein in a pattern corresponding to the pattern of test points on a circuit board to be tested. These posts serve to push up or advance the probes needed to test a particular type of circuit board. The posts are conductive and each is individually connected to the test system. The circuit board to be tested rests on a special deformable gasket so that its test points are suspended over and aligned with the advanced test probes. When the fixture is evacuated, the circuit board to be tested is drawn downwardly so that the test points on the board make electrical contact with the tips of the advanced probes.

Abstract: High-speed testing circuitry which, when coupled to one terminal of a multi-terminal electronic device, such as an integrated circuit, can either supply test stimuli signals up to a frequency of 30 MHz, receive output signals produced by the device under test in response to test stimuli signals applied by associated test circuits and compare these signals against computer predicted signals, or provide for parametric testing of the device. .Iadd.