Abstract: A redundant power supply system includes power limit logic and plural power supplies. The power limit logic is configured to impose a first power limit threshold on the power supply system during a first time period in which one or more of the plural power supplies is being enabled, and a second power limit threshold higher than the first power limit threshold during a second time period.

Abstract: A system and method are provided for supplying power to a load using deep-sleep-mode power supplies. Each of plural switching power supplies includes an input converter, an output converter and a standby converter. Each is configured to have its output converter connected to the load, and each is configured to operate in at least an online mode in which the input, output and standby converters are enabled for switching, and a deep sleep mode in which the input, output and standby converters are disabled from switching. A system controller is configured to place a first set of the plural switching power supplies in the online mode and a second set of the plural switching power supplies in the deep sleep mode while the load is operating and the power supplies in the first set are supplying power to the load.

Abstract: A system includes two counter-rotating electric fans. A cooling controller is configured to run the fans at first and second operating points responsive to a measured value of a parameter. The first and second operating points correspond to first and second different required volumes per unit time of air flow. Rotational speeds of the fans at the first and second operating points define first and second different rotational speed offsets.

Abstract: A blade computer system includes a plurality of client devices, a blade enclosure having a plurality of blades therein, and an allocation server configured to allocate and deallocate the blades to and from the client devices. The blade enclosure is configured to place individual ones of the blades into or out of a sleeping state responsive to network messages received from the allocation server.

Abstract: A modified display list contains a series of n nested bounding volumes. The first bounding volume in the series contains the remaining n-1 bounding volumes the series. The second bounding volume contains the remaining n-2 bounding volumes in the series, and so on. Upon invocation, the graphics display system processes the modified list sequentially and tests the bounding volumes as they are encountered. As soon as a bounding volume is encountered whose coordinates define a region that should not be rendered, further sequential processing of rendering commands in the list may be halted. If any state commands remain in the list, those commands or an equivalent set of state commands may be executed, and then processing of the list is complete. Alternatively, if push/pop state commands exist on either side of the list, then processing of the list may be halted without more.

Abstract: A method of configuring IA-32 computer resources accommodates multiple operating systems and memory sizes automatically. If total available physical memory does not exceed 4 GB, then the minimum required memory-mapped IO size is rounded up to the next multiple of 128 M. Otherwise, it is rounded up to the next multiple of x, where x is a function of the number of DIMM socket pairs available. TOLM is set to 4 GB minus the rounded memory-mapped IO size. For operating systems that can address only up to 4 GB, the method chooses an acceptable value for TOLM because the granularity used to choose it is reasonably small—128 MB. For operating systems that can address more than 4 GB, the method chooses an exceptionally good value for TOLM: Regardless of the amount of memory available, the BIOS can define caching characteristics for all of the memory using at most 6 MTRR pairs.

Abstract: An I/O bus architecture is configurable so that I/O bandwidth may be re-allocated from one I/O slot or device to another. A first intermediate bus couples a system bus interface device to a first I/O bus interface device. A second intermediate bus couples the system bus interface device to a switching device. The switching device functions to couple the second intermediate bus either to the first or to the second I/O bus interface device responsive to a steering signal. The steering signal may be configured to indicate whether or not an I/O device is coupled to the second I/O bus interface device. If so, then the second intermediate bus is coupled to the second I/O bus interface device; but if not, it is coupled to the first I/O bus interface device so that the first I/O bus interface device may utilize the extra I/O bandwidth not being used by the second I/O bus interface device.

Abstract: A connector assembly for an electronic device saves space and cost. It includes first and second sockets defining first and second insertion paths for receiving mating plugs. A pivoting keep-out member has first and second blocking surfaces and can be pivoted between first and second positions. In the first position, the first blocking member blocks at least a portion of the first insertion path, but the second blocking member clears the second insertion path. In the second position, the second blocking member blocks at least a portion of the second insertion path, but the first blocking member clears the first insertion path. Thus the connector assembly may receive a plug in either the first or the second socket, but not in both simultaneously.

Abstract: A power supply unit according to a preferred embodiment of the invention is self testing. The power supply unit is enabled to function with no external loads applied, and includes a visual indicator of whether or not one or more voltage outputs of the power supply unit is within tolerance. To benefit from the self-test feature, a user in the field may simply unplug the power supply unit from all loads, plug the unit into an A/C source, and observe the visual indicator. If the visual indicator is lit, then the user may reasonably assume that the power supply unit is functioning correctly. But if the visual indicator is not lit, then the user may reasonably assume that the power supply unit is faulty.

Abstract: A technique according to the invention enables a single BIOS to support processors with or without 64-bit extensions efficiently. The BIOS creates a data structure having entries that correspond to elements stored in a state save area. The state save area elements themselves may be located at different addresses depending on whether or not the host processor includes 64-bit extensions. But the corresponding entries in the data structure are located at the same offsets within the data structure in either case. During execution of an SMI handler routine, the BIOS accesses the data structure whenever it needs to access elements of the state save area.

Abstract: A slot in a media drive cage receives a protrusion of a media drive housing. A spring adjacent to the slot engages the protrusion just before it reaches the end of the slot, causing the media drive to slow down prior to reaching a fully engaged position within the cage. The frictional slowing reduces mechanical shock to the drive when its movement stops. A resilient finger at the end of the slot further reduces shock. A resilient latch retains the drive within the slot. To remove the drive, the latch may be disengaged by pulling on a hook portion of the latch. The slot may be nonlinear to enable airflow through the slot and over the drive, thus facilitating cooling of the drive.

Abstract: A computer system according to a preferred embodiment of the invention may have either a local or a remote low-voltage power button. The arrangement is freely reconfigurable by the end user. A socket or plug is accessible from the exterior of the enclosure of a main unit. On the inside of the enclosure, the socket or plug is coupled to circuitry for sensing activity in a power button. The socket or plug is adapted to removably mate with a corresponding socket or plug on either a low-voltage power button or a low-voltage power button extender assembly. The low-voltage power button may comprise simply a switch integrated with a socket or plug. The low-voltage power button extender assembly may comprise a switch coupled to a socket or plug by means of a flexible cable.

Abstract: Client software stores an identifier corresponding to memory configuration data of interest and causes a software interrupt that requests a memory configuration read function. An interrupt read function handler then reads the data of interest responsive to the identifier and returns the data of interest. The client software may include, for example, BIOS firmware or application software executing in real or protected mode. The memory configuration information may be stored in a hidden I/O or MMIO register device. In such an embodiment, the interrupt handler may enable access to the hidden I/O or MMIO register device prior to reading the data of interest and disable access to the hidden I/O or MMIO register device afterwards.

Abstract: A preferred embodiment of the invention enables I/O port POST codes to be accessed via a universal serial bus (“USB”) port of the computer system: BIOS writes an I/O port POST code to a USB port. A device coupled to the USB port reads the I/O port POST code and presents the code on a display.

Abstract: A connector assembly includes first and second sockets disposed on opposite sides of a housing and defining first and second insertion paths, respectively, for receiving a plug. A sliding keep-out member has first and second blocking surfaces. The keep-out member can move back and forth through the housing between first and second positions. In the first position, the first blocking surface blocks at least a portion of the first insertion path, but the second blocking surface clears the second insertion path. In the second position, the second blocking surface blocks at least a portion of the second insertion path, but the first blocking surface clears the first insertion path. Thus the connector assembly may receive plugs in either the first or the second socket, but not in both sockets simultaneously.

Abstract: In a computer system according to a preferred embodiment of the invention, failed boot attempts to flash media are automatically detected and overcome without halting the system or requiring user input. The INT 19h handler is modified such that, when the BIOS is attempting to boot to a flash device, the normal INT 10h handler is replaced with a temporary INT 10h handler. The temporary INT 10h handler checks whether characters written to the screen constitute all or a unique part of an error message that would result from a failed boot attempt. If so, then the original INT 10h handler address is restored, and the BIOS jumps to attempt booting from the next bootable device without halting the system. If not, then the BIOS assumes the boot attempt to the flash device was successful, and simply restores the original INT 10h handler address.

Abstract: A technique for performing clear operations in a region having a subregion. Responsive to a first clear command: perform an initialization in which stale information is eliminated from pixels outside the subregion. Responsive to subsequent clear commands: update a current clear count for the region; and write the updated current clear count into clear count values associated with pixels outside the subregion. Prior to creating the subregion, a conventional fast clear technique may be employed in the region. After creating the subregion and during its life, the inventive technique may be employed. After the subregion is discontinued, the conventional technique may once again be employed. The inventive technique may be employed optionally depending on the percentage of the region's area occupied by the subregion.

Abstract: A computer includes a motherboard having first and second sets of expansion card slots, an expansion card bulkhead defining expansion card openings, and a configurable alignment mechanism operable to place the motherboard and the expansion card openings into first and second configurations relative to one another. In the first configuration, the first set of expansion card slots is aligned with the openings. In the second configuration, the second set of expansion card slots is aligned with the openings.

Abstract: A computer according to a preferred embodiment of the invention may have a power supply mounted therein without the use of tool-requiring fasteners. A chassis of the computer may have a chassis hook and either a stop or an elastic catch. A power supply of the computer may have a power supply hook and either an elastic catch or a stop. When the power supply is mounted to the chassis, the power supply hook engages the chassis hook, and the elastic catch engages the stop in a manner that prevents the power supply hook from disengaging from the chassis hook.

Abstract: A secure mechanism for remotely controlling the power-on state of a host computer: A microcontroller in the host computer is supplied with standby power even when system power to the host computer is turned off. The microcontroller senses the state of the host computer's RS-232 receive line so that commands may be sent to the microcontroller over an RS-232 connection to the host computer. An output of the microcontroller is logically ORed with the output of a power switch debounce circuit of the host computer. The output of the logical OR function is used to manipulate the power-on state of the host computer. The microcontroller may be programmed to respond to numerous commands.