Abstract: A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) has a layer (15) of ferroelectric material disposed on a semiconductor substrate (11) and a gate structure (27) formed on the semiconductor substrate (11). A source region (23) and a drain region (24) are formed on the semiconductor substrate such that the source region (23) and the drain region (24) are laterally spaced apart from the gate structure (27).

Abstract: The present invention relates to multi-bit exclusive-or (XOR) gates (60), including those where N parallel input bits (36, 38) are XORed with one data input bit (52). A modular approach is made using only one basic cell (30) for various implementations with different propagation delays. An N-bit XOR comprises basic cells (30) of adjacent first and second XOR gates (32, 34). Each first XOR gate (32) processes as input two of said N primary input bits (36, 38) and each second XOR gate (34) processes as input bits output bits of first or second XOR gates (32, 34) or the input data bit (52). This structure makes it possible to create an array of identical basic cells which is very suitable for VLSI implementation. There are few lines of connections between the different cells in the cell array which leads to substantial reduction in propagation delay without adding substantial wiring or layout complexity.

Abstract: A high precision DAC (10) incorporates a low precision DAC (18) and current sources (15(A)-15(O)) whose full-scale currents are adjusted to match a reference current generated by an analog calibration circuit (28). An additional low precision DAC (20) and another current source (16) are spares that allow periodic calibration of the high precision DAC (10) to occur in the background without taking the high precision DAC (10) off-line or out of service. A thermometer code generated by a thermometer code circuit (12) is used by a thermometer mapper circuit (13) to enable the most recently calibrated current sources to generate currents having the highest probability for use by the high precision DAC (10).

Abstract: Heater circuits (13) are placed in close proximity or integrated with connection points (12) of an integrated circuit. A connection point is an area where a wire bond or conductive bump is coupled for providing electrical interconnection external to an integrated circuit. Heater circuits (13) are polysilicon strips that form resistive heat elements. A DC voltage or a pulsed voltage is applied to the heater circuits (13) to generate a local heat at the connection points that can reach temperatures exceed 1000 degrees centigrade. The heat is localized to an area near the connection point to prevent damage to temperature sensitive material. The heater circuits (13) raise the temperature of the connection points (12) to increase bond strength of a wire bond or to reflow a conductive bump to adhere to a connection point of another substrate.

Abstract: Ferroelectric transistors are combined with MOSFETs to perform logic functions. The logic functions include a non-volatile ferroelectric latch (30), a clocked non-volatile ferroelectric latch (50), a programmable switch (60), an edge-triggered complementary flip-flop (78), a tri-state logic circuit (80), a ferroelectric logic NAND-gate (100), a clocked ferroelectric logic NAND-gate (140), and a programmable logic function (150). The programmable logic function (150) includes a programming terminal (156) to select between a NOR-gate function and a NAND-gate function.

Abstract: In a personal area network, a method for programming an appliance by a controller. The method includes steps of a) determining (358), by the controller (300), that the appliance (324) is included in the personal area network; b) determining (328), by the controller (300), that the appliance (324) is in data communication with the controller (300); and c) when the appliance (324) is in data communication with the controller (300), performing substeps of: i) requesting downloading (330) of a command set for controlling the appliance (324); ii) receiving (332) the command set for controlling the appliance (324); and iii) programming (401) the command set into a memory of the controller.

Abstract: A bandgap reference circuit (60) provides a selectable bandgap reference voltage that is substantially insensitive to temperature variations of an operating reference circuit. A final curvature caused by a current (I.sub.2) in a temperature coefficient compensation transistor (40) is equal to a drift in a Vbe voltage of a transistor (18) having a negative temperature coefficient plus the drift in a Vbe voltage of a transistor (20) having a positive temperature coefficient minus the drift in a Vbe voltage of the temperature coefficient compensation transistor (40). The nonlinearity of the current (I.sub.2) in the temperature coefficient compensation transistor (40) is adjusted by selecting a compensating current and associated temperature coefficient for the compensating current (I.sub.0) to minimize the characteristic bow or curvature of the current (I.sub.2) in the temperature coefficient compensation transistor (40).

Abstract: A trench power switching transistor (10) is fabricated having sub-micron features on a body layer (26) without using sub-micron lithography. An opening in a field oxide layer (28) defines an area for implanting a source region (30) in the body layer (26) that is self-aligned to a first edge (28A) and a second edge (28B) of the field oxide layer (28). Sidewall spacers (32) are formed in accordance with the first and second edges (28A and 28B) of the field oxide layer (28). A trench is aligned to the sidewall spacers (32) and formed centered within the source region (30). An implant layer (42) formed between sections of the power switching transistor (10) is aligned to the sidewall spacers (32) at the first and second edges (28A and 28B).

Abstract: In a personal area network, a method for including an appliance (121). The method includes steps of a) determining, by the personal area network (120), that the appliance (121) should be included in the personal area network (120); b) determining (253) that all individual members (121) of the personal area network (120) are in data communication with the personal area network (120); and c) when all individual members (121) of the personal area network (120) are in data communication with the personal area network (120), performing substeps of: i) selecting (259) a selected member (121) of the personal area network (120); ii) programming (261) security criteria relevant to the selected member (121) into the appliance (121); and iii) programming (263) security criteria relevant to the appliance (121) into the selected member (121).

Abstract: A phase-frequency detector (12) is configured for operating at a high frequency. A transition of a clock signal (REF CLK) is detected by a first latch (52) and a signal UP is generated. A transition of a feedback signal (FBK) is detected by a second latch (56) and a signal DOWN is generated. An logic circuit (64) detects the signals UP and the DOWN and generates a reset signal (RESET). A pulse-width of the reset signal (RESET) is controlled and limited by the logic circuit (64) to provide a faster response time for setting the first and second latches (52 and 56) to a state that allows detection of the phase and frequency differences between the clock signal (REF CLK) and the feedback signal (FBK).

Abstract: A transfer rate controller (10) allows the originator of the data to determine when the data is transferred on the communications link. A method of regulating the transfer of ATM cells to maintain rate precision and provide flexibility for dynamically adjusting the rates at which cells are transferred has been described. In accordance with information on the chronology of prior transfers, cell loss priority, set of rate parameters, traffic types, and priorities, a scheduler (12) determines and schedules the relative ordering or placement of virtual connections with respect to one another. The finder (14) selects virtual connections for data transfer. Therefore, the transfer rate controller (10) provides individual transfer rates to virtual connections in accordance with the type of data traffic transferred.

Abstract: A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) has a layer (13) of ferroelectric material disposed on a semiconductor substrate (11) and a gate electrode (17) formed on a portion (26) of the layer (13) of ferroelectric material. The portion (26) of the layer (13) of ferroelectric material sandwiched between a semiconductor substrate (11) and a gate electrode (17) retains its ferroelectric activity. The portions (21, 22) of the layer (13) of ferroelectric material adjacent the portion (26) are damaged and thereby rendered ferroelectrically inactive. A source contact (31) and a drain contact (32) are formed through the damaged portions (21, 22) of the layer (13) of ferroelectric material.