Abstract: Methods and apparatus are provided for use in testing a memory (230) coupled to a processing node (214). A background scrubber (316) in the processing node (214) is initialized to perform a test of the memory (230). A status of the background scrubber (316) is checked in which the status indicates whether an error occurred during the test. A predetermined action is taken in response to the status indicating that the error occurred during the test.

Abstract: A non-volatile memory system (230) includes a magnetoresistive random access memory (MRAM) (232) including a plurality of magnetoresistive memory cells, a floating-gate nonvolatile memory (234) including a plurality of floating-gate memory cells, and a controller (236) coupled to the MRAM (232) and to the floating-gate nonvolatile memory (234). The controller (236) is adapted to be coupled to a system bus (220) and controls a selected one of the MRAM (232) and the floating-gate nonvolatile memory (234) in response to an access initiated from the system bus (220).

Abstract: A superconductive article is disclosed, having a substrate a buffer layer overlying the substrate, and a superconductive layer overlying the buffer layer. According to embodiments, the article may have low density characteristics, associated with the article as a whole and/or individual layers of the article. The article may be embodied in the form of long length conductors, coiled long length conductors, and machines incorporating such coils, for example.

Abstract: A PM/FM modulator (100) includes an analog-to-digital converter (110) having an input terminal for receiving an analog input signal, and an output terminal, and a direct digital frequency synthesizer (120) having an input terminal coupled to the output terminal of the analog-to-digital converter, and an output terminal for providing a modulated output signal. In one form, an FM stereo modulator (200) includes a digital stereo modulator (210) and a direct digital frequency synthesizer (250). The digital stereo modulator (210) has a first input terminal for receiving a right analog input signal, a second input terminal for receiving a left analog input signal, and an output terminal for providing a digital signal having a stereo spectrum. The direct digital frequency synthesizer (250) has an input terminal coupled to the output terminal of the digital stereo modulator (210), and an output terminal for providing a modulated output signal.

Abstract: A modified polymer material is discloses, including a polymer base and boehmite particles provided in the polymer base. the boehmite particles are made up of mainly anisotropically shaped particles.

Abstract: A cross-connect switch (1000) is adapted for a plurality of input channels in a synchronous network. Each input channel has a pointer processor (800) including a pointer interpreter (802), an elastic store buffer (804), and a pointer generator (806). The cross-connect switch (1000) further comprises a memory-less space switch (1020) interposed between a plurality of pointer interpreters (1010) and a plurality of elastic store buffers (1030). The space switch (1020) switches selected outputs of the plurality of pointer interpreters (1010) to inputs of each elastic store buffer (1000) in response to a switching control signal.

Abstract: The invention is directed to a garment comprising a first and second sleeves, a flap, and a pocket. The arms of a wearer are fitted through the first and second sleeves. The first and second sleeves have first and second openings, respectively. The flap is provided along the first sleeve and is adapted to be positioned between open and closed positions. The closed position constricts the first opening of the first sleeve. The pocket is disposed between the flap and the first sleeve.

Abstract: A processor surrogate (320/520) is adapted for use in a processing node (S1) of a multiprocessor data processing system (300/500) having a plurality of processing nodes (P0, S1) coupled together and to a plurality of input/output devices (330, 340, 350/530, 540, 550, 560) using corresponding communication links. The processor surrogate (320/520) includes a first port (372, 374/620, 622) comprising a first set of integrated circuit terminals adapted to be coupled to a first external communication link (370/590) for coupling (P0) of the plurality of processing nodes (310, 320/510, 520), a second port (382, 384/630, 632) comprising a second set of integrated circuit terminals adapted to be coupled to a second external communication link (380/592) for coupling to one (350/550) of the plurality of input/output devices (330, 340, 350/530, 540, 550, 560), and an interconnection circuit (390, 392/608, 612, 614) coupled between the first port (372, 374/620, 622) and the second port (382, 384/630, 632).

Abstract: Disclosed is a reel-to-reel substrate tape polishing and cleaning system including precleaning, electropolishing section and post cleaning sections and which is suitable for polishing and cleaning long lengths of metal substrate tape used in the manufacture of HTS-coated tape.

Abstract: A switched capacitor input circuit (200) includes an input buffer (210), a switched capacitor sampler circuit (220), and an integrator (250). The input buffer (210) has an input terminal for receiving an input voltage, and an output terminal. The switched capacitor sampler circuit (220) has an input terminal coupled to the output terminal of the input buffer (210), and an output terminal. The switched capacitor sampler circuit (220) includes a capacitor (222) and stores a charge proportional a voltage at the output terminal of the input buffer (210) in the capacitor (222) during a sample period, and transfers the charge from the capacitor (222) to the output terminal thereof during a transfer period subsequent to the sample period in a plurality of charge portions corresponding to a like plurality of phases of the transfer period. The integrator (250) has an input terminal coupled to the output terminal of the switched capacitor sampler circuit, and an output terminal for providing an output voltage signal.

Abstract: A switched capacitor sampler circuit (220) includes an input terminal (224) for receiving an input voltage, an output terminal (226), a capacitor (222) having first and second terminals, and a switching circuit (230). The switching circuit (230) is coupled to the input terminal (224), the output terminal (226), and the first and second terminals of the capacitor (222). The switching circuit (230) stores a charge on the capacitor (222) proportional to the input voltage during a sample period, and transfers the charge from the capacitor (222) to the output terminal (226) during a transfer period subsequent to the sample period. The switching circuit (230) transfers the charge in a plurality of charge portions corresponding to a like plurality of phases of the transfer period.

Abstract: The disclosure is directed to a solid oxide fuel cell including an electrolyte. The electrolyte is formed using a fused electrolyte powder. The disclosure is also directed to a solid oxide fuel cell stack including a plurality of solid oxide fuel cells. Each solid oxide fuel cell of the plurality of solid oxide fuel cells includes an electrolyte. The electrolyte is formed using a fused electrolyte powder.

Abstract: A memory (100) includes first (116) and second (118) sense amplifiers, a first logic gate (120), a first three-state driver (130), and a latch (180). The first sense amplifier (116) is coupled to a first local data line and has an output terminal for providing a signal indicative of a state of a selected memory cell on the first local data line. The second sense amplifier (118) is coupled to a second local data line and has an output terminal for providing a signal indicative of a state of a selected memory cell on the second local data line. The first three-state driver (130) has a data input terminal coupled to the output terminal of the first logic gate (120), a control input terminal for receiving a first select signal, and an output terminal coupled to a global data line. The latch (180) has an input/output terminal coupled to the global data line (170).

Abstract: A data processing system (100, 600) has a memory hierarchy including a cache (124, 624) and a lower-level memory system (170, 650). A data element having a special write with inject attribute is received from a data producer (160, 640), such as an Ethernet controller. The data element is forwarded to the cache (124, 624) without accessing the lower-level memory system (170, 650). Subsequently at least one cache line containing the data element is updated in the cache (124, 624).

Abstract: A thermal interface composition undergoes a viscoelastic change at microprocessor operating temperatures to transfer heat generated by a heat source, such as a microprocessor to a heat sink. The composition includes a low melting alloy dispersed in a matrix. The matrix comprises a viscoelastic composition which softens at about the operating temperature of the heat source. The viscoelastic composition may include a thermoplastic elastomer, a compatible hydrocarbon oil, and a tackifying resin. In use, the thermal interface composition flows under pressure between the heat source and the heat sink to make thermal contact between the two. When the heat source is operated and reaches operating temperature, the viscoelastic composition softens and the low melting alloy melts at around the operating temperature to form a highly thermally conductive, generally homogeneous mixture which readily transfers heat to the heat sink.

Abstract: A tape manufacturing system and a tape-surface-inspection unit are disclosed. The tape-surface-inspection unit is capable of continuously characterizing the surface of a non-transparent tape that is usable with or without a tape manufacturing system. The tape-surface-inspection unit includes a surface illuminator, an imager, an image processor, a tape guide, and, optionally, an indexer. The surface illuminator provides a tape surface located by the tape guide in a manner that allows the imager to capture images for characterization by the image processor. The indexer facilitates a correlation of locations along the tape and a characterization of the locations on the tape. The tape manufacturing system, in addition to at least one tape-surface-inspection unit, includes a tape-processing unit, a tape handler, and a controller.

Abstract: A low alternating current loss superconducting cable is provided, including a plurality of superconducting tapes spirally wound around a longitudinally extending core. The tapes are provided in a path between about 5° and 85° relative to the longitudinal axis of the core such that the tape completely covers the surface of the core. The tapes are generally parallel to each other and include first and second tapes that are adjacent to each other. The first and second tapes partially overlap each other.

Abstract: A superconducting tape is disclosed, including a substrate, a buffer layer overlying the substrate, a superconductor layer overlying the buffer layer, and stabilizer layers overlying opposite sides of the tape. Also disclosed are components incorporating superconducting tapes, methods for manufacturing same, and methods for using same.

Abstract: This invention relates to a dense ceramics having ESD dissipative characteristics, tunable volume and surface resistivities in semi-insulative range (103-1011 Ohm-cm), substantially pore free, high flexural strength, light colors, for desired ESD dissipation characteristics, structural reliability, high vision recognition, low wear and particulate contamination to be used as ESD dissipating tools, fixtures, load bearing elements, work surfaces, containers in manufacturing and assembling electrostatically sensitive microelectronic, electromagnetic, electro-optic components, devices and systems.

Abstract: Aspects of the present invention may be found in an electrostatic dissipative ceramic component having a stabilized zirconia base, a surface resistivity between 1×105 and 1×1012 ohms per square and at least 2 percent by volume scattering material. The stabilized zirconia may be present in amounts between 60 and 95 weight percent. Further aspects of the invention may be found in an electrostatic dissipative ceramic material having stabilized zirconia, a resistivity modifier, and a scattering material. The stabilized zirconia may be present in amounts between 60 and 95 weight percent of the ceramic material. The resistivity modifier may be present in amounts between 5 and 30 weight percent. The scattering material may comprise at least 2 volume percent of the electrostatic dissipative ceramic material. The component may be used in the manufacturing of electronic component such as hard drives.