Patents Represented by Attorney Laurence J. Marhoefer
  • Patent number: 4789925
    Abstract: A system for detecting and resolving logical usage conflicts is described for use in a scientific data processing system. A plurality of pipelined overlapping macro instructions request access to the system memory. Often the information required by a subsequent instruction is not available until an earlier overlapped instruction has been completed thereby creating a conflict. This conflict is sensed by the subsequent instruction and memory access is delayed a number of memory cycles until the correct information is available at which time the subsequent instruction is allowed to proceed. This allows a scientific vector support processor having a high degree of asynchronism to be able to produce results as if no overlap existed to provide program execution results as if each instruction were executed serially to completion in the proper program order. There are three categories of data logical usage conflicts.
    Type: Grant
    Filed: July 31, 1985
    Date of Patent: December 6, 1988
    Assignee: Unisys Corporation
    Inventor: Archie E. Lahti
  • Patent number: 4786797
    Abstract: A source of light modulated by input data provides the modulated light to a phototransistor. A capacitor couples the emitter of the phototransistor to ground. A discharging transistor switch is coupled across the capacitor and a voltage comparator is coupled to the phototransistor emitter for providing a signal when the voltage across the capacitor exceeds a predetermined threshold. A microprocessor coupled to the comparator actuates the discharging switch in accordance with the comparator output.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: November 22, 1988
    Assignee: Unisys Corporation
    Inventor: Richard I. Ely
  • Patent number: 4782991
    Abstract: A solder reflow machine for removing and replacing electronic components of the pin-grid array type having a large number of leads soldered into a very densely populated printed circuit board. The machine utilizes a heat-transfer liquid and a vacuum to remove the component from the board. The printed circuit board is positioned with the component facing downwardly. A tank containing the heat-transfer liquid is located below the printed circuit board. The apparatus includes a solder reflow head which has a component-engaging vacuum plate with a central opening that is in communication with a vacuum source through a pipe which is pulled downwardly to remove the component. The component is surrounded by a wall in combination with the bottom of the printed circuit board and seals off the liquid flow path.
    Type: Grant
    Filed: November 24, 1987
    Date of Patent: November 8, 1988
    Assignee: Unisys Corporation
    Inventor: Dennis L. Breu
  • Patent number: 4777479
    Abstract: A remote indicator for displaying the position of a power control switch whether or not power is applied to the switch. An auxiliary DC power supply provides a reference potential to a plurality of voltage dividers. One voltage divider provides a first reference potential to a comparator. A second voltage divider and the reference power supply are connected through the power control switch so that a second reference potential is applied to the comparator when the power switch is closed. Differences of the two reference potentials corresponding to the open and closed switch positions are sensed by the comparator and used to activate an indicator accordingly.
    Type: Grant
    Filed: April 3, 1987
    Date of Patent: October 11, 1988
    Assignee: Unisys Corporation
    Inventor: Paul Hinckley
  • Patent number: 4771426
    Abstract: An electronic system for providing a stable, isochronous clock signal with very low jitter and slew rate to thereby permit multiplexing of data from an external source which is not synchronous with the multiplexer frame rate.
    Type: Grant
    Filed: July 17, 1986
    Date of Patent: September 13, 1988
    Assignee: Unisys Corporation
    Inventors: Glen D. Rattlingourd, Richard K. Wells, James R. Nelson
  • Patent number: 4767198
    Abstract: An acoustic signal is launched as a surface acoustic wave (SAW) by a hyperbolically tapered transducer and then reflected into a bulk acoustic wave (BAW) by a tapered reflector. At each frequency the tapered reflector must satisfy the phase match conditions between the SAW and BAW as defined by their wave vectors. Let k.sub.B be the projection of the BAW wave vector on the surface, and let k.sub.S be the wave vector of the SAW. Then, if k.sub.G is defined to be the wave vector of the grid, i.e., k.sub.G =2.pi./d, where d is the periodicity of the reflecting strips at the frequency under consideration, the phase match condition is k.sub.G =k.sub.B -k.sub.S. A reflector designed to satisfy this condition will reflect the SAW into a BAW at any desired angle (as specified by k.sub.B). The laser beam is then Bragg scattered by the BAW in the usual manner. The advantage of this scheme is that the tapered transducer separates the acoustic signals spatially so no intermodulation products are formed.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: August 30, 1988
    Assignee: Unisys Corporation
    Inventors: Leland P. Solie, Joseph H. Labrum
  • Patent number: 4763941
    Abstract: The automatic vacuum gripper comprises a gripper member with a resilient seal coupled to a hollow piston and shaft. The piston is spring loaded downward in a cylinder coupled to a vacuum source. With vacuum applied, the piston does not move until the gripped part is completely sealed to the gripper member.
    Type: Grant
    Filed: June 11, 1987
    Date of Patent: August 16, 1988
    Assignee: Unisys Corporation
    Inventor: Albert Sniderman
  • Patent number: 4761975
    Abstract: Apparatus for locking together modules of a computer system includes first and second members that are secured, by screws, proximate adjacent edges of adjacent modules. Tabs on the members and holes through the tabs align so that a padlock may be utilized to lock the modules together. A slotted plate is positioned on the tabs and secured in place by the padlock to cover the securing screws so that they cannot be removed.
    Type: Grant
    Filed: June 5, 1987
    Date of Patent: August 9, 1988
    Assignee: Unisys Corporation
    Inventors: Thomas A. Kachnowski, Frederick E. Bratro, Elhanan Kaplan, George A. Sudol
  • Patent number: 4763338
    Abstract: A synchronous decoder for recovering a train of binary data encoded in a biphase format and decoding into NRZ format. Encoded data is sampled during the first half of a bit period and the second half of a bit period and stored respectively into two storage elements. The stored data is combined and applied to a third storage element at the beginning of the next bit period. The state of the third storage element is responsive to the sequentially applied combined signals in the train of data and thereby produces a pulsed output encoded in NRZ format.
    Type: Grant
    Filed: August 20, 1987
    Date of Patent: August 9, 1988
    Assignee: Unisys Corporation
    Inventor: Robert A. Barndt, Sr.
  • Patent number: 4761725
    Abstract: An A.C. to D.C. power conditioner, which draws sinusoidal input current utilizes digital proportional-integral control to provide output voltage regulation by adjusting the gain of a current program loop. The current program loop controls the state of a power switch to force the instantaneous average current in an inductor to follow the instantaneous rectified line voltage. Variable hysteresis control provides noise immunity by increasing the ripple current in an iron-cored filter inductor when the instantaneous input voltage is high. Digital proportional-integral (PI) control provides output voltage regulation by adjusting, in discrete steps, the gain of the current program loop. A multiplying digital-to-analog converter serves as an interface between the voltage regulation loop and the current program loop. The sampling rate of the PI controller is determined by the input line frequency, which allows good transient response to be obtained.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: August 2, 1988
    Assignee: Unisys Corporation
    Inventor: Christopher P. Henze
  • Patent number: 4759020
    Abstract: A block replicate magnetic bubble memory organization is disclosed in which a number of storage loops are arranged between write and read tracks. Data in the read track is supplied to a deskewing circuit under the control of one section of an EAPROM so that the deskewing circuit outputs one page at a time, where each bit of the page is derived from a different storage loop, to a buffer and error correcting circuit which supplies corrected information to a data processing system as long as only one error bit has occurred on a page. If an error does occur in a page, the processor which has stored in it information relating to all of the used and unused loops of the system, controls another section of the EAPROM so that the defective loop will be exchanged for a good loop after a predetermined number of failures have occurred for the particular bad loop. The write side of the EAPROM is subsequently updated by the processor or remote processor that utilizes the read-out data.
    Type: Grant
    Filed: September 25, 1985
    Date of Patent: July 19, 1988
    Assignee: Unisys Corporation
    Inventors: Dennis L. Amundson, Gerald L. Brown, Raymond C. Hedin, Samuel A. Meddaugh
  • Patent number: 4759041
    Abstract: A local area network packet receiving system synchronizes the passage of packets through a receive buffer through a synchronizing circuit which supplies clock pulses to the receive buffer. The clock system utilizes a sensing circuit that senses the rate at which packets are being stored in the receive buffer. A master oscillator provides a reference signal and a rate control circuit coupled to the sensing circuit controls the rate at which the clock pulses are supplied to the receive buffer. A programmable timer supplies timing pulses out of the control of the rate control circuit. A phase-lock-loop having first and second comparison inputs is coupled to the programmable timer to receive the timing pulses on the first comparison input and to the master oscillator to receive a reference signal on the second comparsion input.
    Type: Grant
    Filed: February 19, 1987
    Date of Patent: July 19, 1988
    Assignee: Unisys Corporation
    Inventors: Steven C. Anderson, Joseph Pobiel
  • Patent number: 4755150
    Abstract: The locking apparatus is used to secure one or more memory cartridges in a housing in a computer system module. An L-shaped member is fastened to the module by a screw in an existing threaded screw hole in the module. A second member is inserted into the module and locked to the L-shaped member by a padlock. The second member includes a first plate that fits into a clearance space between the cartridges and the housing to prevent the cartridges from being unplugged from connectors mounted in the housing. The second member includes a second plate that prevents the end of the outermost cartridge from being pulled out of the housing to clear the first plate and includes a third plate which in use covers the mounting screw of the L-shaped member so that the screw cannot be removed.
    Type: Grant
    Filed: June 5, 1987
    Date of Patent: July 5, 1988
    Assignee: Unisys Corporation
    Inventors: Frederick E. Bratro, Thomas A. Kachnowski, Elhanan Kaplan, George A. Sudol
  • Patent number: 4749971
    Abstract: A delay line with multiple taps is provided in which a hyperbolically tapered input transducer directs a wave to a plurality of hyperbolically tapered partial reflectors. A plurality of hyperbolically tapered output transducer taps are aligned with each of the partial reflectors so that varying delays may be obtained over a wide frequency band.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: June 7, 1988
    Assignee: Unisys Corporation
    Inventor: Leland P. Solie
  • Patent number: 4749884
    Abstract: An improved driver interface circuit for interfacing between low voltage, low drive capability logic signals and large capacitive loads requiring high speed, high voltage logic signals. The improvement comprising the use of the logic input signal to power gate a high level buffer contained in the driver and thereby minimize the power consumption during inactive periods.
    Type: Grant
    Filed: June 10, 1983
    Date of Patent: June 7, 1988
    Assignee: Unisys Corporation
    Inventors: Steven H. Karban, Cleon L. Hennen
  • Patent number: 4746882
    Abstract: A simple compact, high performance SAW multiplexer is provided by utilizing an input transducer in which hyperbolic tapered electrode fingers are provided. These hyperbolic electrode fingers provide a low frequency output acoustic wave at locations where the spacing between the fingers is relatively large, and a higher frequency signal at points where the spacing is relatively closer. A series of pickup taps which are preferably located on both sides of the input transducer which are also constructed with hyperbolically tapered fingers, but these pickup elements are separated into segments, and isolated by ground straps so that each pickup finger pad will be responsive only to a portion of the frequencies launched by the input transducer. The frequency of the pickup pads varies from a low frequency to a high frequency in alternate manner from one side of the multiplexer to the other.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: May 24, 1988
    Assignee: Unisys Corporation
    Inventor: Leland P. Solie
  • Patent number: 4743835
    Abstract: An arrangement for enhancing the available energy storage capability of a hold-up energy storage element for use with the step-up or boost regulator stage of a power supply enables use of smaller hold-up storage elements, such as capacitors. The circuit stores energy at the boost regulator output and returns the energy either to the regulator input in the event of a transient line failure, or to the regulator output during a load transient. The invention provides improved transient fault tolerance by increasing the hold-up time of the storage element.
    Type: Grant
    Filed: September 3, 1987
    Date of Patent: May 10, 1988
    Assignee: Unisys Corporation
    Inventors: Bertrand Bosse, Thomas Gati
  • Patent number: 4737743
    Abstract: A single mode waveguide dispersive surface acoustic wave (SAW) delay line is formed by aligning an elongated input transducer, which has a pattern of interdigital electrode fingers which launches a wideband SAW, with a beam compressor that feeds an input waveguide. The input SAW passes down the waveguide to a 3 dB coupler which extracts one-half of the power of the incoming SAW and feeds it in the direction opposite to the input wave. Both portions of the SAW are passed to dispersive reflective arrays along a folded path. A series of additional couplers and reflective dispersive arrays that form the folded path serve to further delay the SAW until it reaches a beam expander at the output end which feeds the SAW to an output transducer that is constructed in a manner similar or analogous to the input transducer.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: April 12, 1988
    Assignee: Unisys Corporation
    Inventor: Leland P. Solie
  • Patent number: 4734909
    Abstract: A bus arbitration system comprising a plurality of bus lines and a clock which produces first and second phrases in which a drive generates a first logic state during the first phase to precharge the capacitance associated with the bus lines and generates either first or second logic state during the second phase. Also, a bus interface is described in which different types of information are transmitted during different phases.
    Type: Grant
    Filed: August 21, 1986
    Date of Patent: March 29, 1988
    Assignee: Sperry Corporation
    Inventors: Donald B. Bennett, Lee T. Thorsrud, Thomas W. Petschauer
  • Patent number: 4729114
    Abstract: A feedback loop circuit that may be used for Fourier Transform analysis, for carrier acquisition, or for other related purposes, sums the inputs signal, passes it through a delay line to provide an output signal, samples a portion of the output signal in a feedback path, mixes the supplied feedback signal with a first oscillator signal that is several times larger than the center frequency of the allowed input signal bandwidths, eliminates the low sideband frequencies of this mixed signal, mixes this signal with a second local oscillator signal, the frequency of which is lower than the frequency of the first local oscillator by approximately the inverse of the delay time of the input signal, filters out the high sideband frequencies of this signal and combines the remaining feedback signal (either by summation or subtraction) with the input signal.
    Type: Grant
    Filed: July 24, 1986
    Date of Patent: March 1, 1988
    Assignee: Unisys Corporation
    Inventors: Samuel C. Kingston, Randall J. Mills