Abstract: A method of forming transistors on a wafer includes forming gates over gate insulators on a surface of the wafer and ion implanting dopant impurity atoms into the wafer to form source and drain regions aligned on opposite sides of each gate. The wafer is then annealed by pre-heating the bulk of the wafer to an elevated temperature over 350 degrees C. but below a temperature at which the dopant atoms tend to cluster. Meanwhile, an intense line beam is produced having a narrow dimension along a fast axis from an array of coherent CW lasers of a selected wavelength. This line beam is scanned across the surface of the heated wafer along the direction of the fast axis, so as to heat, up to a peak surface temperature near a melting temperature of the wafer, a moving localized region on the surface of the wafer having (a) a width corresponding to the narrow beam width and (b) an extremely shallow below-surface depth.

Abstract: A plasma reactor for processing a workpiece includes a reactor chamber and a workpiece support within the chamber, the chamber having a ceiling facing the workpiece support, a capacitively coupled plasma source power applicator comprising a source power electrode at one of: (a) the ceiling (b) the workpiece support, and plural VHF power generators of different fixed frequencies coupled to the capacitively coupled source power applicator, and a controller for independently controlling the power output levels of the plural VHF generators so as to control an effective VHF frequency applied to the source power electrode. In a preferred embodiment, the reactor further includes a plasma bias power applicator that includes a bias power electrode in the workpiece support and one or more RF bias power generators of different frequencies coupled to the plasma bias power applicator.

Abstract: A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber and furnishing a hydrocarbon process gas into the chamber, preferably propylene (C3H6) or toluene (C7H8) or acetylene (C2H2) or a mixture of acetylene and methane (C2H4). The process further includes inductively coupling RF plasma source power into the chamber while and applying RF plasma bias power to the wafer. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired stress (compressive or tensile). We have discovered that at a wafer temperature less than or equal to 475 degrees C.

Abstract: The voltage of a wafer on the pedestal of an RF plasma reactor is instantly determined from the applied bias current and the applied bias voltage sampled during plasma processing of the wafer using a pair constants. Prior to plasma processing of the wafer, a determination is made of first and second constants based upon electrical characteristics of a transmission line through which RF power is coupled to the pedestal. During plasma processing of the wafer, the wafer voltage is determined by performing the steps of sampling an RF input current and an RF input voltage at the impedance match circuit; multiplying the RF input voltage by the first constant to produce a first product; multiplying the RF input current by the second constant to produce a second product; and computing a sum of the first and second products.

Abstract: Defects and fixed charge in a gate dielectric near the gate dielectric-substrate interface are reduced by performing a gate dielectric relaxation anneal step prior to source-drain ion implantation, in which the wafer temperature is ramped gradually to near a melting temperature of the substrate equal to a peak post-ion implantation anneal peak temperature. The ramping rates are sufficiently gradual so that the gate dielectric is held above its reflow temperature for a significant duration.

Abstract: Plasma parameters such as plasma ion density, wafer voltage, etch rate and wafer current in the chamber are determined from external measurements on the applied RF bias electrical parameters such as voltage and current. The method includes sensing RF parameters corresponding to an input impedance, an input current and an input voltage at the input of the impedance match element to a transmission line coupled between the bias generator and the wafer pedestal. The method continues by computing a junction admittance of a junction between the transmission line and the electrode within the wafer pedestal from the input impedance, input current and input voltage and from parameters of the transmission line. The method further includes providing shunt electrical quantities of a shunt capacitance between the electrode and a ground plane, and providing load electrical quantities of a load capacitance between the electrode and a wafer on the pedestal.

Abstract: A process is provided for removing polymer from a backside of a workpiece. The process includes supporting the workpiece on the backside in a vacuum chamber while leaving at least a peripheral annular portion of the backside exposed. The process further includes confining gas flow at the edge of the workpiece within a gap at the edge of the workpiece on the order of about 1% of the diameter of the chamber, the gap defining a boundary between an upper process zone containing the wafer front side and a lower process zone containing the wafer backside. The process also includes providing a polymer etch precursor gas underneath the backside edge of the workpiece and applying RF power to a region underlying the backside edge of the workpiece to generate a first plasma of polymer etch species concentrated in an annular ring concentric with and underneath the backside edge of the workpiece.

Abstract: A plasma etch process for etching high aspect ratio openings in a dielectric film on a workpiece is carried out in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a first polymerizing etch process gas through a radially inward one of plural concentric gas injection zones in the ceiling electrode and injecting a second polymerizing etch process gas through a radially outward one of the plural concentric gas injection zones in the ceiling electrode, the compositions of the first and second process gases having first and second carbon-to-fluorine ratios that differ from one another.

Abstract: A method of fabricating multilayer interconnect structures on a semiconductor wafer begins by roughening the interior surface of a metal lid to a surface roughness in excess of SA 2000 with a reentrant surface profile, and installing the metal lid as the ceiling of a plasma clean reactor chamber having a wafer pedestal facing the interior surface of the ceiling.

Abstract: A plasma etch process etches high aspect ratio openings in a dielectric film on a workpiece in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a polymerizing etch process gas through an annular zone of gas injection orifices in the ceiling electrode, and evacuating gas from the reactor through a pumping annulus surrounding an edge of the workpiece. The high aspect ratio openings are etched in the dielectric film with etch species derived from the etch process gas while depositing a polymer derived from the etch process gas onto the workpiece, by generating a plasma in the reactor by applying VHF source power and/or HF and/or LF bias power to the electrodes at the ceiling and/or the electrostatic chuck.

Abstract: A plasma reactor chamber is characterized by performing the following steps: (a) for each one of the chamber parameters, ramping the level of the one chamber parameter while sampling RF electrical parameters at an RF bias power input to the wafer support pedestal and computing from each sample of the RF electrical parameters the values of the plasma parameters, and storing the values with the corresponding levels of the one chamber parameter as corresponding chamber parameter data; (b) for each one of the chamber parameters, deducing, from the corresponding chamber parameter data, a single variable function for each of the plasma parameters having the one chamber parameter as an independent variable.

Abstract: A method for processing a workpiece in a plasma reactor chamber by applying RF source power to inner and outer source power applicators, and introducing a process gas into the reactor while rotating at least one of (a) the workpiece, (b) the outer source power applicator, about a radial tilt axis to a position at which the plasma distribution is nearly symmetrical, and translating the inner source power applicator relative to the outer source power applicator along the axis of symmetry to a location at which the spatial distribution is nearly uniform.

Abstract: A plasma etch process for successively different layers, including an anti-reflection coating (ARC), an amorphous carbon layer (ACL) and a dielectric layer, with successively different etch chemistries is performed in a single plasma reactor chamber. A first transition step is performed after etching the ARC by replacing the fluorine-containing process gas used in the ARC etch step with an inert species process gas. A flush step is performed after etching the ACL by replacing the hydrogen-containing process gas used in the ACL etch step with argon gas.

Abstract: A thermal processing chamber includes a substrate support rotating about a center axis and a lamphead of plural lamps in an array having a predetermined difference in radiance pattern between them. The radiance pattern includes a variation in diffuseness or collimation. In one embodiment, the center lines of all of the lamps are disposed away from the center axis. The array can be an hexagonal array, in which the center axis is located at a predetermined position between neighboring lamps.

Abstract: A method for processing a workpiece in a plasma reactor chamber having radially inner and outer source power applicators at a ceiling of the chamber facing the workpiece, the inner and outer source power applicators and the workpiece sharing a common axis of symmetry. The method includes applying RF source power to the source power applicator, and introducing a process gas into the reactor chamber so as to carry out a plasma process on the workpiece characterized by a plasma process parameter, the plasma process parameter having a spatial distribution across the surface of the workpiece.

Abstract: Apparatus for dynamic surface annealing of a semiconductor wafer includes a source of laser radiation emitting at a laser wavelength and comprising an array of lasers arranged in rows and columns, the optical power of each the laser being individual adjustable and optics for focusing the radiation from the array of lasers into a narrow line beam in a workpiece plane corresponding to a workpiece surface, whereby the optics images respective columns of the laser array onto respective sections of the narrow line beam. A pyrometer sensor is provided that is sensitive to a pyrometer wavelength. An optical element in an optical path of the optics is tuned to divert radiation emanating from the workpiece plane to the pyrometry sensor. As a result, the optics images each of the respective section of the narrow line beam onto a corresponding portion of the pyrometer sensor.

Abstract: A method of electrostatically chucking a wafer while removing heat from the wafer in a plasma reactor includes providing a polished generally continuous surface on a puck, placing the wafer on the polished surface of the puck and cooling the puck. A chucking voltage is applied to an electrode within the puck to electrostatically pull the wafer onto the surface of the puck with sufficient force to attain a selected heat transfer coefficient between contacting surfaces of the puck and wafer.

Abstract: A plasma reactor chamber is characterized by performing two steps for each one of plural selected chamber parameters. The first step consists of ramping the level of the one chamber parameter while sampling RF electrical parameters at an RF bias power input to said wafer support pedestal and computing from each sample of said RF electrical parameters the values of the plasma parameters. The second step consists of deducing, from the corresponding chamber parameter data generated in the first step, a single variable function for each of the plural plasma parameters having said one chamber parameter as an independent variable, and constructing combinations of these functions that are three variable functions having each of the chamber parameters as a variable.

Abstract: A method of processing a workpiece includes placing the workpiece on a workpiece support pedestal in a main chamber with a gas distribution showerhead, introducing a process gas into a remote plasma source chamber and generating a plasma in the remote plasma source chamber, transporting plasma-generated species from the remote plasma source chamber to the gas distribution showerhead so as to distribute the plasma-generated species into the main chamber through the gas distribution showerhead, and applying plasma RF power into the main chamber.