Patents Represented by Attorney Law Office of Robert M Wallace
  • Patent number: 7291545
    Abstract: A method of ion implanting a species in a workpiece to a selected ion implantation profile depth includes placing a workpiece having a semiconductor material on an electrostatic chuck in or near a processing region of a plasma reactor chamber and applying a chucking voltage to the electrostatic chuck. The method further includes introducing into the chamber a precursor gas including a species to be ion implanted in the workpiece and applying an RF bias to the electrostatic chuck, the RF bias having a bias level corresponding to the ion implantation profile depth.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: November 6, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo, Gonzalo Antonio Monroy
  • Patent number: 7292428
    Abstract: A lift pin assembly for use in a reactor for processing a workpiece includes plural lift pins extending generally parallel with a lift direction, each of the plural lift pins having a top end for supporting a workpiece and a bottom end. A lift table faces the bottom ends of the pins and is translatable in a direction generally parallel with the lift direction. A small force detector senses a force exerted by the lift pins that is sufficiently large to indicate a chucked wafer and sufficiently small to avoid dechucking a wafer. A large force detector senses a force exerted by the lift pins in a range sufficient to de-chuck the wafer.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: November 6, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Hiroji Hanawa, Andrew Nguyen, Kenneth S. Collins, Kartik Ramaswamy, Biagio Gallo, Amir Al-Bayati
  • Patent number: 7291360
    Abstract: A chemical vapor deposition process is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece is placed in the process region, so that a workpiece surface of the workpiece is generally facing a surface plane of the nearest one of the ion shower grids, and a gas mixture comprising a deposition precursor species is furnished into the ion generation region. The process region is evacuated at an evacuation rate sufficient to create a pressure drop across the plural ion shower grids between the ion generation and process regions whereby the pressure in the ion generation region is several times the pressure in the process region.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: November 6, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Hiroji Hanawa, Tsutomu Tanaka, Kenneth S. Collins, Amir Al-Bayati, Kartik Ramaswamy, Andrew Nguyen
  • Patent number: 7288491
    Abstract: One method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber includes initially depositing a seasoning film on the interior surfaces of the plasma reactor chamber before the workpiece is introduced, by introducing a seasoning film precursor gas into the chamber and generating a plasma within the chamber, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma, and then removing the workpiece from the chamber and removing the seasoning film from the chamber interior surfaces.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: October 30, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo
  • Patent number: 7244474
    Abstract: A chemical vapor deposition process is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid. A workpiece is placed in the process region facing the ion shower grid, the workpiece having a workpiece surface generally facing the surface plane of the ion shower grid. A gas mixture is furnished comprising deposition precursor species into the ion generation region and the process region is evacuated at an evacuation rate sufficient to create a pressure drop across the ion shower grid from the ion generation region to the process region whereby the pressure in the ion generation region is at least several times the pressure in the process region.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: July 17, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Hiroji Hanawa, Tsutomu Tanaka, Kenneth S. Collins, Amir Al-Bayati, Kartik Ramaswamy, Andrew Nguyen
  • Patent number: 7223676
    Abstract: A low temperature process for depositing a coating containing any of silicon, nitrogen, hydrogen or oxygen on a workpiece includes placing the workpiece in a reactor chamber facing a processing region of the chamber, introducing a process gas containing any of silicon, nitrogen, hydrogen or oxygen into the reactor chamber, generating a torroidal RF plasma current in a reentrant path through the processing region by applying RF plasma source power at an HF frequency on the order of about 10 MHz to a portion of a reentrant conduit external of the chamber and forming a portion of the reentrant path, applying RF plasma bias power at an LF frequency on the order of one or a few MHz to the workpiece, and maintaining the temperature of the workpiece under about 100 degrees C.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: May 29, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Hiroji Hanawa, Kartik Ramaswamy, Kenneth S. Collins, Amir Al-Bayati, Biagio Gallo, Andrew Nguyen
  • Patent number: 7214628
    Abstract: A method of fabricating a gate of a transistor device on a semiconductor substrate, includes the steps of placing the substrate in a vacuum chamber of a plasma reactor and introducing into the chamber a process gas that includes oxygen while maintaining a vacuum pressure in the chamber. An oxide insulating layer on the order of several Angstroms in thickness is formed at the surface of the substrate by generating a plasma in a plasma generation region within the vacuum chamber during successive “on” times, and allowing ion energy of the plasma to decay during successive “off” intervals separating the successive “on” intervals, the “on” and “off” intervals defining a controllable duty cycle. During formation of the oxide insulating layer, the duty cycle is limited so as to limit formation of ion bombardment-induced defects in the insulating layer, while the vacuum pressure is limited so as to limit formation of contamination-induced defects in the insulating layer.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: May 8, 2007
    Assignee: Applied Materials, Inc.
    Inventor: Thai Cheng Chua
  • Patent number: 7186943
    Abstract: A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for supplying power at a frequency of the generator to the overhead electrode and capable of maintaining a plasma within the chamber at a desired plasma ion density level. The overhead electrode has a capacitance such that the overhead electrode and the plasma formed in the chamber at the desired plasma ion density resonate together at an electrode-plasma resonant frequency, the frequency of the generator being at least near the electrode-plasma resonant frequency. The reactor further includes a set of MERIE magnets surrounding the plasma process area overlying the wafer surface that produce a slowly circulating magnetic field which stirs the plasma to improve plasma ion density distribution uniformity.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: March 6, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Daniel J. Hoffman, Yan Ye, Dan Katz, Douglas A. Buchberger, Jr., Xiaoye Zhao, Kang-Lie Chiang, Robert B. Hagen, Matthew L. Miller
  • Patent number: 7183177
    Abstract: A method of fabricating a semiconductor-on-insulator structure from a pair of semiconductor wafers, includes forming an oxide layer on at least a first surface of a first one of the wafers and performing a bonding enhancement implantation step by ion implantation of a first species in the first surface of at least either of the pair of wafers. The method further includes performing a cleavage ion implantation step on one of the pair of wafers by ion implanting a second species to define a cleavage plane across a diameter of the wafer at the predetermined depth below the top surface of the one wafer. The wafers are then bonded together by placing the first surfaces of the pair of wafers onto one another so as to form an semiconductor-on-insulator structure.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: February 27, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Amir Al-Bayati, Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Biagio Gallo, Andrew Nguyen
  • Patent number: 7166524
    Abstract: An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: January 23, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Amir Al-Bayati, Rick J. Roberts, Kenneth S. Collins, Ken MacWilliams, Hiroji Hanawa, Kartik Ramaswamy, Biagio Gallo, Andrew Nguyen
  • Patent number: 7141514
    Abstract: A transistor gate selective re-oxidation process includes the steps of introducing into the vacuum chamber containing the semiconductor substrate a process gas that includes oxygen while maintaining a vacuum pressure in the chamber. An oxide insulating layer on the order of several Angstroms in thickness is formed by generating a plasma in a plasma generation region within the vacuum chamber during successive “on” times, and allowing ion energy of the plasma to decay during successive “off” intervals separating the successive “on” intervals, the “on” and “off” intervals defining a controllable duty cycle. During formation of the oxide insulating layer, the duty cycle is limited so as to limit formation of ion bombardment-induced defects in the insulating layer, while the vacuum pressure is limited so as to limit formation of contamination-induced defects in the insulating layer.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: November 28, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Thai Cheng Chua
  • Patent number: 7137354
    Abstract: A plasma immersion ion implantation reactor for ion implanting a species into a surface layer of a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber and a workpiece support pedestal within the chamber having a workpiece support surface facing the ceiling and defining a process region extending generally across the wafer support pedestal and confined laterally by the side wall and axially between the workpiece support pedestal and the ceiling. The enclosure has at least a first pair of openings at generally opposite sides of the process region and a first hollow conduit outside of the chamber having first and second ends connected to respective ones of the first pair of openings, so as to provide a first reentrant path extending through the conduit and across said process region.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: November 21, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo, Gonzalo Antonio Monroy
  • Patent number: 7135392
    Abstract: A method for forming P-N junctions in a semiconductor wafer includes ion implanting dopant impurities into the wafer and annealing the wafer using a thermal flux laser annealing apparatus that includes an array of semiconductor laser emitters arranged in plural parallel rows extending along a slow axis, plural respective cylindrical lenses overlying respective ones of the rows of laser emitters for collimating light from the respective rows along a fast axis generally perpendicular to the slow axis, a homogenizing light pipe having an input face at a first end for receiving light from the plural cylindrical lenses and an output face at an opposite end, the light pipe comprising a pair of reflective walls extending between the input and output faces and separated from one another along the direction of the slow axis, and scanning apparatus for scanning light emitted from the homogenizing light pipe across the wafer in a scanning direction parallel to the fast axis.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: November 14, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Bruce E. Adams, Dean Jennings, Abhilash J. Mayur, Vijay Parihar, Joseph M. Ranish
  • Patent number: 7129440
    Abstract: Apparatus for thermally processing a semiconductor wafer includes an array of semiconductor laser emitters arranged in plural parallel rows extending along a slow axis, plural respective cylindrical lenses overlying respective ones of the rows of laser emitters for collimating light from the respective rows along a fast axis generally perpendicular to the slow axis, a homogenizing light pipe having an input face at a first end for receiving light from the plural cylindrical lenses and an output face at an opposite end, the light pipe comprising a pair of reflective walls extending between the input and output faces and separated from one another along the direction of the slow axis, and scanning apparatus for scanning light emitted from the homogenizing light pipe across the wafer in a scanning direction parallel to the fast axis.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: October 31, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Bruce E. Adams, Dean Jennings, Abhilash J. Mayur, Vijay Parihar, Joseph M. Ranish
  • Patent number: 7109098
    Abstract: A method of forming semiconductor junctions in a semiconductor material of a workpiece includes ion implanting dopant impurities in selected regions of the semiconductor material, introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and optically annealing the workpiece so as to activate dopant impurities in the semiconductor material.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 19, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7094670
    Abstract: A method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber, includes placing the workpiece on a workpiece support in the chamber, controlling a temperature of the wafer support near a constant level, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma while minimizing deposition and minimizing etching by holding the temperature of the workpiece within a temperature range that is above a workpiece deposition threshold temperature and below a workpiece etch threshold temperature.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: August 22, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo
  • Patent number: 7068096
    Abstract: An EER amplifier for amplifying an RF signal includes: (II) a first RF amplifier for amplifying the phase portion of the signal; (III) an EER modulator for amplifying the envelope or baseband portion of the signal, including: A) a high frequency operational amplifier; B) a power amplifier; C) a feedback control loop including: (1) a current-to-voltage conversion amplifier having an input coupled to a current monitoring output of the power amplifier and an output, (2) an input buffer amplifier having an input coupled to receive the envelope signal and an output; (3) a summing amplifier having: (a) an input coupled to the outputs of: (a) the current-to-voltage conversion amplifier and (b) the input buffer amplifier, and (b) an output coupled to the current control input of the power amplifier.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: June 27, 2006
    Assignee: Northrop Grumman Corporation
    Inventor: Peter F. Chu
  • Patent number: 7037813
    Abstract: A method for implanting ions in a surface layer of a workpiece includes placing the workpiece on a workpiece support in a chamber with the surface layer being in facing relationship with a ceiling of the chamber, thereby defining a processing zone between the workpiece and the ceiling, and introducing into the chamber a process gas including the species to be implanted in the surface layer of the workpiece. The method includes generating from the process gas a plasma by capacitively coupling RF source power across the workpiece support and the ceiling or the sidewall from an RF source power generator. The method further includes applying an RF bias from an RF bias generator to the workpiece support.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: May 2, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo, Gonzalo Antonio Monroy
  • Patent number: 7030335
    Abstract: A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor workpiece, an overhead electrode overlying said workpiece support, the electrode comprising a portion of said chamber wall, an RF power generator for supplying power at a frequency of said generator to said overhead electrode and capable of maintaining a plasma within said chamber at a desired plasma ion density level. The overhead electrode has a capacitance such that said overhead electrode and the plasma formed in said chamber at said desired plasma ion density resonate together at an electrode-plasma resonant frequency, said frequency of said generator being at least near said electrode-plasma resonant frequency.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: April 18, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Daniel J. Hoffman, Gerald Zheyao Yin, Yan Ye, Dan Katz, Douglas A. Buchberger, Jr., Xiaoye Zhao, Kang-Lie Chiang, Robert B. Hagen, Matthew L. Miller
  • Patent number: 6939434
    Abstract: A plasma reactor is described that includes a vacuum chamber defined by an enclosure including a side wall and a workpiece support pedestal within the chamber defining a processing region overlying said pedestal. The chamber has at least a first pair of ports near opposing sides of said processing region and a first external reentrant tube is connected at respective ends thereof to the pair of ports. The reactor further includes a process gas injection apparatus (such as a gas distribution plate) and an RF power applicator coupled to the reentrant tube for applying plasma source power to process gases within the tube to produce a reentrant torroidal plasma current through the first tube and across said processing region. A magnet controls radial distribution of plasma ion density in the processing region, the magnet having an elongate pole piece defining a pole piece axis intersecting the processing region.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: September 6, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Yan Ye, Kartik Ramaswamy, Andrew Nguyen, Michael S. Barnes, Huong Thanh Nguyen