Patents Represented by Attorney Lawrence R. Fraley
  • Patent number: 6492600
    Abstract: A chip carrier structure and method for forming the same having a receptor pad formed therein. The structure comprises a circuitized substrate having a conductive element on the surface, an External Dielectric Layer mounted on the circuitized substrate with an opening positioned above the conductive element to form a microvia. The walls of the microvia are first treated to enhance copper adhesion and then are electroplated to provide a receptor pad. Finally, a solder paste is deposited within the microvia to create a solder deposit or bump.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: Miguel A. Jimarez, Ross W. Keesler, Voya R. Markovich, Rajinder S. Rai, Cheryl L. Tytran-Palomaki
  • Patent number: 6492071
    Abstract: A device and process for applying mixtures of adhesive formulations combined with solder flux such that flip chips may be rapidly encapsulated with such combinations without interfering with subsequent wafer processing steps are provided. Also provided is a wafer stencil designed in such a manner that the saw kerf lines separating individual chip dies are protected from coming into contact with the formulation. Extrusion screening using such wafer stencil is also provided.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: William E. Bernier, Mark V. Pierson, Ajit K. Trivedi
  • Patent number: 6493240
    Abstract: The present invention is an interposer for electrically coupling a microcard with a mother board. The interposer includes a frame which is interposed between the microcard and the motherboard, electrically connecting the microcard and the motherboard by means of plated via-holes. The substrate is organic and a plurality of chips are mounted on both sides of the substrate. On the opposite sides of the interposer are pluralities of metal pads which are coupled by metallized via holes, the pads in turn connected to the chips, thereby coupling chips or cards on one side of the interposer to chips or boards on the other side. Electrical connection between the chips on the top side of the substrate and the metal pads on the lower side of the substrate is provided by the metallized via holes.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: Patrizio Broglia, Francesco Garbelli, Alberto Monti
  • Patent number: 6488198
    Abstract: A process and apparatus are described for wire bonding circuit pads of large scale integrated design. The bonding process employs a capillary tool that applies heat and pressure to the wires in order to bond them to the circuit pad. The circuit pad is supported upon a closed woven, fiberglass mesh, which supports the circuit pad during the bonding process.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Douglas E. Chrzanowski, John A. Welsh, James W. Wilson, Jeffrey A. Zimmerman
  • Patent number: 6488153
    Abstract: A cushioning member with three interconnecting parts provides a full internal corner for contacting and protecting the external surfaces of an article during shipping and handling. The three interconnecting parts also provide a full external corner. Both full internal and external corners provide a rugged shipping and handling protector for an article (e.g., personal computer) to be shipped.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventor: John Jay Morris
  • Patent number: 6490161
    Abstract: A flip-chip module is interconnected to a PCB or circuit card through a peripheral LGA interposer connector. The flip-chip is mounted on the same surface of the module substrate as the peripheral array of LGA interconnection pads and projects into a central opening of the interposer. An opening in the upper stiffener of the PCB or circuit card permits the peripheral array of LGA interconnection pads to make contact with corresponding LGA PCB or circuit card pads. A first heat sink is arranged to thermally contact the entire surface of the substrate opposing the surface upon which the flip-chip is mounted. An opening in the PCB or circuit card and lower stiffener allows a second heat sink to make thermal contact with the surface of the flip-chip.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventor: Eric Arthur Johnson
  • Patent number: 6486415
    Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: November 26, 2002
    Assignee: International Business Machines Corporation
    Inventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
  • Patent number: 6486414
    Abstract: The present invention provides a through-hole structure for connecting a connector to a printed circuit board, the through-hole structure comprising a signal through-hole having a conductive layer therein for supplying a signal to the printed circuit board, power through-holes having a conductive layer therein for supplying power to the printed circuit board, and dielectric constant adjusting portions formed among the signal through-hole and the power through-holes. Moreover, the present invention provides a printed circuit board having the above-described through-hole structure formed therein.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: November 26, 2002
    Assignee: International Business Machines Corporation
    Inventors: Kaoru Kobayashi, Hiroyuki Mori, Kimihiro Yamanaka
  • Patent number: 6485892
    Abstract: Through-holes in a substrate are masked during plating of the substrate by substantially filling the through-holes with a liquid material, followed by applying a photoimageable material to an external surface of the substrate, forming a predetermined pattern in the photoimageable material, circuitizing the predetermined pattern and then removing both the photoimageable material and the liquid material from the through-holes.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: November 26, 2002
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Norman A. Card, Jr., Richard Allen Day, Stephen J. Fuerniss, John Joseph Konrad, Jeffrey McKeveny, Timothy L. Wells
  • Patent number: 6483074
    Abstract: A laser system for micro via formation directly over a plated through hole (PTH). The laser system forms the micro via directly over the PTH with full dielectric removal from a capture pad while minimizing the dielectric removal from a center portion of the PTH.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: November 19, 2002
    Assignee: International Business Machines Corporation
    Inventor: John S. Kresge
  • Patent number: 6484123
    Abstract: A method and system for identifying parameters that are important in predicting a target variable. The method comprises the steps of compiling training data, said training data identifying, for each of a first set of subjects, values for each of a first set of parameters; and compiling test data, said test data identifying, for each of a second set of subjects, values for each of a second set of parameters, said first and second sets of parameters having at least a plurality of common parameters. The method comprises the further steps of using the data in the training data, and using a nearest neighbor procedure, to identify, for each of the second set of subjects, a value for a target parameter; and processing the training data and the test data, according to a predefined procedure, to determine the relative importance of at least selected ones of the first group of parameters in predicting the values for the target parameter.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: November 19, 2002
    Assignee: International Business Machines Corporation
    Inventor: Ashok N. Srivastava
  • Patent number: 6483046
    Abstract: The present invention provides a circuit board having burr free castellated plated through holes. In particular, the leading edge of the plated through hole, that tends to produce burr formation during conventional profiling, is removed or pre-profiled to off-set the leading edge of the plated through hole from a surface of the circuit board.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: November 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: David E. Houser, James M. Larnerd, Jeffrey L. Lee, Francis S. Poch
  • Patent number: 6479093
    Abstract: A laminate circuit structure assembly is provided that comprises at least two modularized circuitized plane subassemblies; a joining layer located between each of the subassemblies and wherein the subassemblies and joining layer are bonded together with a cured dielectric from a bondable, curable dielectric. The subassemblies and joining layer are electrically interconnected with bondable electrically conductive material. The joining layer comprises dielectric layers disposed about an internal electrically conductive layer. The electrically conductive layer has a via and the dielectric layers each have a via of smaller diameter than the vias in the electrically conductive layer and are aligned with the vias in the electrically conductive layer. The vias are filled with electrically bondable electrically conductive material for providing electrical contact between the subassemblies.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: November 12, 2002
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Voya R. Markovich, Thomas R. Miller, Konstantinos I. Papathomas, William E. Wilson
  • Patent number: 6471419
    Abstract: A method and apparatus are disclosed for aligning an array of light transmitting elements to an array of photosensitive detectors. The array is adjusted along three axes. Any element (a coupled transmitting and detecting unit of the array) can be selected as the center of rotation. Small angular correction is made about the selected element by differentially moving the array in two axes, using adjustment tools. Alignment is accomplished by performing translational movement in the horizontal X and Y axes until a signal is detected. A rotational correction about the selected element is performed by moving one of a pair of adjustment devices until maximum light intensity is achieved for the end elements. Next, the array is scanned for the weakest performing element in the array. The alignment procedure is repeated until the performance of all of the elements in the array fall within a pre-established specification range.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: October 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: Richard R. Hall, How Tzu Lin, Candido C. Tiberia
  • Patent number: 6471117
    Abstract: A transfer fluxing apparatus is provided. The apparatus is a flux reservoir for holding flux, a compliant pad attached to an opening in the flux reservoir and a means for controlling deposition of flux onto the compliant pad. The apparatus can be attached to an automated component placement machine. In the preferred embodiment of the invention, the control means is a valve located within the flux reservoir. The valve is opened by applying pressure to a plunger that extends through the compliant pad. When the plunger is pressed, the valve opens, and flux falls onto the compliant pad. Flux then passes through the pad to a component placement site. A method for automated fluxing and to component placement also is provided.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: October 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: John Gillette Davis, Allen Thomas Mays, Kris Allen Slesinger
  • Patent number: 6468363
    Abstract: An activated no-clean flux composition for soldering includes a dicarboxylic acid, an organic solvent, and acetic acid in the range of about 2% to about 4% by weight.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Donald W. Henderson, James Spalik
  • Patent number: 6464080
    Abstract: A cushioning structure for placement between an impacting surface and a surface of an object to be cushioned against damage caused by impact during transport, storage, or usage, comprising a spring member having a load bearing portion and spring lead portions, and a restraining member adapted for engaging with the spring leads, to restrain the movement of the spring leads while the cushioning structure is subjected to loading or accelerating or decelerating forces.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: October 15, 2002
    Assignee: International Business Machines Corporation
    Inventors: John Jay Morris, Robert Lee Scott
  • Patent number: 6464125
    Abstract: A method and apparatus for desoldering electronic components from a substrate. A vacuum is used to enhance the flow of a hot gas under an electronic component to reflow the solder connections attaching the electronic component to a substrate. Water vapor is added to the hot gas to increase the heat capacity of the hot gas. A system for periodically changing the direction of flow of the hot gas and vacuum under the electronic component is used to uniformly heat the solder connections. A method and apparatus for depositing underfill material between an electronic component and the substrate on which the electronic component is mounted. A vacuum is applied to enhance the flow of underfill material into the space between the electronic component and the substrate.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: October 15, 2002
    Assignee: International Business Machines Corporation
    Inventors: Wilton L. Cox, Joseph D. Poole, Kris A. Slesinger
  • Patent number: 6462285
    Abstract: A method and product for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Wesley M. Enroth, George D. Oxx, Jr., Jenny B. Porter
  • Patent number: 6458005
    Abstract: A selectively compliant chuck for assembling tiles into larger LCD displays facilitates alignment between a cover plate and a tile. A linear clutch is positioned between the tile chuck and the tile chuck carrier. This allows each chuck to float in the axis perpendicular to the tile's mating surface. The chuck has freedom to move linearly in this axis, and allows for pitch and roll motion as well. This floating connection can be turned on or off at will. Thus, a tile attached to the chuck can be lowered to intimately contact a cover plate and the chuck will compliantly move for high mating tolerances. Thereafter, the clutch can be locked to fix the chuck in it's current position. In this manner, the tile can be raised so that an adhesive can be applied to the cover plate. The tile can then be lowered back over the adhesive with the clutch locked and alignment maintained.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: October 1, 2002
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Baker, Ronald J. Becker, Allan O. Johnson, Ramesh R. Kodnani