Abstract: A semiconductor memory cell array includes a plurality of bit-lines, a plurality of word-lines, a plurality of memory cells, a plurality of dummy memory cells, a plurality of dummy bit-lines, and a plurality of dummy word-lines. The dummy bit-lines are in outer regions of the bit-lines. The dummy word-lines are in outer regions of the word-lines. The dummy bit-lines are maintained in a floating state. The dummy word-lines retain a turn-off voltage.
Abstract: A photovoltaic device and a manufacturing method thereof are provided. The photovoltaic device includes: a substrate; a first conductive layer formed on the substrate; P layers and N layers alternately formed along a first direction on the first conductive layer; and I layers covering the P layers and the N layers on the first conductive layer, wherein the P layers and the N layers are separated from each other by a first interval, the I layers are formed between the P layers and the N layers that are separated by the first interval, and the P layers, the I layers, and the N layers formed along the first direction form unit cells.
Abstract: A one sheet test device and a method of testing using the same that can prevent a change of current characteristics due to a failure panel by measuring a current of normal panels except for the failure panel, when testing a one sheet substrate that includes panels, first wires that are arranged in a first direction between and connected to the panels, second wires that are arranged in a second direction different from the first direction between and connected to the panels. The test device includes voltage application units that are connected to the first and second wires, respectively, to apply a selected one of the first voltage and the second voltage to the corresponding wires; and a test unit that controls the voltage application units to measure an on-current and off-current of each of the panels.
Abstract: A method of fabricating a semiconductor device, the method including providing a substrate; forming an underlying layer on the substrate; forming a sacrificial layer on the underlying layer; forming an opening in the sacrificial layer by patterning the sacrificial layer such that the opening exposes a predetermined region of the underlying layer; forming a mask layer in the opening; forming an oxide mask by partially or completely oxidizing the mask layer; removing the sacrificial layer; and etching the underlying layer using the oxide mask as an etch mask to form an underlying layer pattern.
Abstract: A driver comprises odd-numbered stages configured to be driven by first and second clock signals and even-numbered stages configured to be driven by the second and third clock signals. Each stage is coupled to a corresponding emission control line, and includes a first driver, a second driver, and a third driver. In a first stage, the first and second drivers receive first and second start pulses and output first and second output signals, respectively. In each stage except the first stage, the first and second driver receives first and second output signals of a previous stage and outputs first and second output signals of each stage, respectively. In each stage, a third driver receives the first and second output signals of each stage and outputs an emission control signal to be transmitted to an emission control line coupled to each stage.
Type:
Grant
Filed:
June 4, 2010
Date of Patent:
October 16, 2012
Assignee:
Samsung Display Co., Ltd.
Inventors:
Dong-Hwi Kim, Hwan-Soo Jang, Seon-I Jeong, Ki-Myeong Eom
Abstract: An adhesive composition and an optical member, the adhesive composition including 100 parts by weight of a polymer prepared by polymerization of (meth)acrylic ester containing monomers; 0.01 to about 3 parts by weight of an antistatic agent containing an ionic compound and/or a lithium salt; 0 to about 1 part by weight of a silane coupling agent; and about 3 to about 20 parts by weight of a benzotriazole group containing compound; and about 0.05 to about 5 parts by weight of a cross-linking agent, or about 3 to about 30 parts by weight of a multifunctional (meth)acrylate monomer, and 0 to about 5 parts by weight of an active energy-ray initiator.
Type:
Grant
Filed:
June 13, 2011
Date of Patent:
October 16, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Cheong Hun Song, Hiroshi Ogawa, Tatsuhiro Suwa
Abstract: An electronic display device includes a display unit adapted to display an image, and a barrier unit overlapping the display unit, the barrier unit including a liquid crystal layer between first and second substrates, the first and second substrates facing each other, a common electrode between the liquid crystal layer and the first substrate, a transparent insulation layer between the liquid crystal layer and the second substrate, the transparent insulation layer having an inner surface facing the liquid crystal layer and an outer surface facing the second substrate, a plurality of first electrodes along a first direction between the outer surface of the transparent insulation layer and the second substrate, the first electrodes being spaced apart from each other along a second direction, and a plurality of second electrodes along the first direction between the inner surface of the transparent insulation layer and the first substrate.
Type:
Grant
Filed:
March 6, 2009
Date of Patent:
October 9, 2012
Assignee:
Samsung Display Co., Ltd.
Inventors:
Beom-Shik Kim, Ja-Seung Ku, Hui Nam, Chan-Young Park, Hyoung-Wook Jang
Abstract: Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern.
Abstract: A method of manufacturing a semiconductor device includes forming a plurality of preliminary gate structures, forming a capping layer pattern on sidewalls of the plurality of preliminary gate structures, and forming a blocking layer on top surfaces of the plurality of preliminary gate structures and the capping layer pattern such that a void is formed therebetween. The method also includes removing the blocking layer and an upper portion of the capping layer pattern such that at least the upper sidewalls of the plurality of preliminary gate structures are exposed, and a lower portion of the capping layer pattern remains on lower sidewalls of the preliminary gate structures. The method further includes forming a conductive layer on at least the upper sidewalls of the plurality of preliminary gate structures, reacting the conductive layer with the preliminary gate structures, and forming an insulation layer having an air gap therein.
Type:
Grant
Filed:
September 16, 2011
Date of Patent:
October 9, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Tae-Hyun Kim, Kyung-Hyun Kim, Jae-Hwang Sim, Jae-Jin Shin, Jong-Heun Lim, Hyun-Min Park
Abstract: A flexible printed circuit board (FPCB) simultaneously coupled to both surfaces of a substrate structure, e.g., a touch screen panel is provided. The FPCB includes a main substrate unit having a first pad unit and an auxiliary substrate unit extending from the main substrate unit to one side of the first pad unit. The auxiliary substrate unit includes a first substrate unit positioned parallel with the first pad unit along a first direction, a second substrate unit including a second pad unit, the second substrate unit spaced apart from the first substrate unit in a second direction, orthogonal to the first direction, and a plurality of third substrate units extending along the second direction between the first and second substrate units.
Abstract: Disclosed is an organic compound that easily dissolves in an organic solvent, and that is applicable as a host material of an emission layer of an organic photoelectric device since it emits fluorescence and phosphorescence at a red wavelength through a blue wavelength. The organic compound according to one embodiment of the present invention is represented by Chemical Formula 1. In the above Chemical Formula 1, X1 to X24, Ar1 to Ar3, and Ar? to Ar??, and Chemical Formulae 2 to 5, are as described in the specification. The organic compound easily dissolves in an organic solvent, and is applicable as a host material of an emission layer of an organic photoelectric device since it emits fluorescence and phosphorescence at a red wavelength through a blue wavelength.
Abstract: A triphenylmethane-based complex dye, a photosensitive resin composition, and a color filter, the triphenylmethane-based complex dye being represented by the following Chemical Formula 1:
Type:
Grant
Filed:
June 23, 2011
Date of Patent:
October 9, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Nam-Gwang Kim, Jianhua Li, Sina Maghsoodi, Shahrokh Motallebi, Jae-Hyun Kim, Gyu-Seok Han
Abstract: A battery pack, including a cell including a cathode, an anode, and an electrode terminal having a bolt coupling region on a surface thereof, a circuit board electrically coupled to the cell and having a bolt through-hole at a position corresponding to the bolt coupling region, and a bolt passing through the bolt through-hole and coupled to the bolt coupling region.
Abstract: A semiconductor device and associated methods, the semiconductor device including a semiconductor substrate with a first well region, a first gate electrode disposed on the first well region, and a first N-type capping pattern, a first P-type capping pattern, and a first gate dielectric pattern disposed between the first well region and the first gate electrode.
Type:
Grant
Filed:
September 20, 2011
Date of Patent:
October 2, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Hongbae Park, Hagju Cho, Sunghun Hong, Sangjin Hyun, Hoonjoo Na, Hyung-seok Hong
Abstract: An optical laminate film, a backlight unit, and a liquid crystal display module, the optical laminate film including a multilayer film composed of multiple layers including at least two polymers having different refractive indexes, the multilayer film transmitting only a light component vibrating in a direction parallel to one transmittance axis while reflecting other light components; an embossed diffusing film laminated on one side of the multilayer film, the embossed diffusing film having roughness on a surface thereof; and a microlens film laminated on another side of the multilayer film, the microlens film having microlenses arranged on a surface thereof.
Type:
Grant
Filed:
November 15, 2010
Date of Patent:
October 2, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Jin Woo Lee, Gyu Chan Cho, Sun Hong Park, Sei Jin Oh
Abstract: A diffuser prism sheet, an LCD back light unit including the same, and an LCD device including the same, the diffuser prism sheet including a base film made of a transparent material, and a light refracting part on a surface of the base film, the light refracting part including a plurality of unit prisms arranged in one direction, having a predetermined cross-sectional shape and valley regions between adjacent unit prisms, and light diffusing elements in the valley regions between the adjacent unit prisms.
Type:
Grant
Filed:
September 14, 2009
Date of Patent:
September 25, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Jun Hyeak Choi, Man Suk Kim, Ju Yeol Choi, Seok Hoon Jang
Abstract: A semiconductor wafer includes semiconductor chip areas on a semiconductor substrate, the semiconductor chip areas having thereon semiconductor circuit patterns and inner guard ring patterns surrounding the semiconductor circuit patterns; and scribe lanes on the semiconductor substrate between the semiconductor chip areas, the scribe lanes having thereon outer guard ring patterns surrounding the inner guard ring patterns and a process monitoring pattern between the outer guard ring patterns, the outer guard ring patterns and the process monitoring pattern being merged with each other.
Abstract: A hardmask composition includes a solvent and an organosilicon copolymer. The organosilicon copolymer may be represented by Formula A: (SiO1.5—Y—SiO1.5)x(R3SiO1.5)y??(A) wherein x and y may satisfy the following relations: x is about 0.05 to about 0.9, y is about 0.05 to about 0.9, and x+y=1, R3 may be a C1-C12 alkyl group, and Y may be a linking group including a substituted or unsubstituted, linear or branched C1-C20 alkyl group, a C1-C20 group containing a chain that includes an aromatic ring, a heterocyclic ring, a urea group or an isocyanurate group, or a C2-C20 group containing one or more multiple bonds.
Type:
Grant
Filed:
November 21, 2007
Date of Patent:
September 25, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Mi Young Kim, Sang Kyun Kim, Sang Hak Lim, Sang Ran Koh, Hui Chan Yun, Do Hyeon Kim, Dong Seon Uh, Jong Seob Kim
Abstract: An embodiment is directed to a method of fabricating a semiconductor memory device, the method including preparing a substrate having a cell array region and a contact region, forming a thin film structure on the substrate, including forming sacrificial film patterns isolated horizontally by a lower isolation region, the lower isolation region traversing the cell array region and the contact region, and forming sacrificial films sequentially stacked on the sacrificial film patterns, and forming an opening that penetrates the thin film structure to expose the lower isolation region of the cell array region, the opening being restrictively formed in the cell array region.
Type:
Grant
Filed:
November 3, 2010
Date of Patent:
September 18, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sungwoo Hyun, Byeongchan Lee, Sunghil Lee
Abstract: An emitting device includes a first electrode on a base substrate, a second electrode on the base substrate, a third electrode on the base substrate, an emitting structure on and/or at a same level as the first electrode, a first pattern on the base substrate being electrically connected to the first electrode, and a plurality of second patterns on the base substrate, wherein at least one of the second patterns is arranged on a first side of the first pattern and is electrically connected to the second electrode and at least another one of the second patterns is arranged on a second side of the first pattern and is electrically connected to the third electrode, the first side opposing the second side.