Abstract: An arbiter which allows a normal arbitration algorithm to be implemented for standard I/O devices, and an isochronous arbitration algorithm to be run for isochronous devices. Further, the isochronous devices can participate in the normal arbitration scheme when operating as a standard I/O device. A host bridge interconnects a system bus with an I/O bus, such as the PCI bus. The host bridge includes an arbiter with a normal arbitration algorithm, and, an isochronous arbitration algorithm implemented in either logic circuitry or software. Each I/O device (both standard devices and isochronous devices) connected to the I/O bus has a bus request line which transmits a request for control of the I/O bus to the arbiter. Depending on the state of the bus request control signal, the arbiter can determine which arbitration algorithm is to be utilized. For example, a standard device will drive the bus request signal active and hold it in its active state to indicate a standard bus request.