Patents Represented by Attorney, Agent or Law Firm Lisa L. B. Yociss
  • Patent number: 6836855
    Abstract: A method, system, and apparatus for isolating fatal data fetch errors to a single partition within a logically partitioned data processing system. In one embodiment, the logically partitioned data processing system includes a plurality of operating systems and a plurality of processors is provided. Each of the operating systems is assigned to a separate one of a plurality of logical partitions. Each of the processors is assigned to one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor for creating and maintaining separation of the plurality of logical partitions. The hypervisor contains services and functions accessed by each of the logical partitions and, to prevent fatal data fetch errors in one partition from effecting other partitions within the logically partitioned data processing system, the hypervisor includes a plurality of data structure areas.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: December 28, 2004
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6834363
    Abstract: A method for prioritizing bus errors for a computing system is provided. A subsystem test is executed on a first subsystem from a plurality of subsystems on a bus system, wherein the subsystem test on the bus system is specific to the first bus subsystem. An output is received in response to executing the subsystem test. In response to the output indicating an error on the first subsystem, a severity level is assessed based on the error. For all subsystems from the plurality of subsystems on the bus system, a subsystem test is executed on each remaining subsystem, wherein each subsystem test on the bus system is specific to each remaining subsystem. An output is received in response to executing each subsystem test. In response to the output indicating an error on any of the remaining subsystems, a severity level is assessed based on the error.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Christopher Harry Austen, Michael Anthony Perez, Mark Walz Wenning
  • Patent number: 6834340
    Abstract: A method for managing system firmware in a data processing system having a plurality of logical partitions is provided. Responsive to a request to update the system firmware from a first logical partition within the plurality of logical partitions in the data processing system, a determination is made whether the first logical partition within the plurality of logical partitions is present in the data processing system. Responsive to the determination that the first logical partition within the plurality of logical partitions is present in the data processing system, the system firmware is updated from the first logical partition in the data processing system. Then starting of additional partitions within the plurality of logical partitions in the data processing system is inhibited until the firmware update from the first logical partition is complete.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Sayileela Nulu
  • Patent number: 6832297
    Abstract: A method, apparatus, and computer implemented instructions for managing a plurality of caches of data, wherein the data processing system includes a plurality of independent computers. In response to initiating a read operation to read data on a data block, an indication is posted on a directory of data blocks identifying the computer that now holds a copy of that block and a location in the memory of that computer where a flag associated with that block is held. Then in response to initiating a write operation on that data block, messages are sent to all the computers holding that block which resets the said flag, thus informing each computer that the data in that block is no longer valid. These messages are sent using means that perform that flag reset without, in the preferred embodiment, any overhead of interruption of processing on the computers where the flags reside.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Gregory Francis Pfister, Renato John Recio, Noshir Cavas Wadia
  • Patent number: 6829771
    Abstract: A method and apparatus in a data processing system for dispatching events. An event from a first object is received. A type for the event is identified. A dispatching strategy is selected for the event based on parameter settings, a source of the event, and default settings to form a selected dispatching strategy. The event is dispatched using the selected dispatching strategy.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: December 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter C. Bahrs, Raphael Poole Chancey, Barry Alan Feigenbaum, Manish Mahesh Modh
  • Patent number: 6823375
    Abstract: A method, system, and product are described for configuring remote input/output (RIO) hubs within a data processing system. Each one of the RIO hubs is assigned to one of multiple slave processors which are included within the data processing system. Each one of the slave processors which has an assigned RIO hub then configures its assigned RIO hub. Each RIO hub has an associated data structure that is updated with current configuration information by the slave processor assigned to configure that RIO hub. When the slave processor has finished configuring its assigned RIO hub, the slave processor then sets a configuration flag to indicate the completion of the configuration of the RIO hub.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Kiet Anh Tran
  • Patent number: 6823445
    Abstract: A method, program, and system for modifying computer program instructions during execution of those instructions are provided. The invention comprises writing a first instruction into a memory location, wherein the instruction is a patch class instruction. This first instruction is then fetched from the memory location and executed. Concurrent with execution of the first instruction, the memory location is overwritten with a second instruction, which is also a patch class instruction. Because the first and second instructions are patch class instructions, if a program is executing from the memory location, or returns to execute from that location, it will fetch and execute either the first instruction or the second instruction. In one embodiment, reconciling the processor's execution pipeline with the memory location will ensure that the second instruction is fetched and executed if the program returns to execute from that location.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Cathy May, Edward John Silha
  • Patent number: 6820176
    Abstract: A system, method, and computer program product are disclosed for reducing overhead associated with software lock monitoring in a multiple-processor data processing system having a memory that is shared among the multiple processors. Multiple memory locations in the shared-memory are associated with one of multiple locks. Overhead is reduced by generating a trace hook only in response to activity associated with lock misses.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventor: Randall Ray Heisch
  • Patent number: 6804770
    Abstract: A hazard prediction array consists of an array of saturating counters. The array is indexed through a portion of the instruction address. At issue, the hazard prediction array is referenced and a prediction is made as to whether the current instruction or group of instructions is likely to encounter a flush. If the prediction is that it will flush, the instruction is not issued until it is the next instruction to complete. If the prediction is that the instruction will not flush, it is issued as normal. At completion time, the prediction array is updated with the actual flush behavior. When an instruction is predicted to flush and, thus, not issued until it is the next to complete, the predictor may be updated as if the instruction did not flush.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 12, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas Robert Logan, Alexander Erik Mericas, William John Starke
  • Patent number: 6801912
    Abstract: A data processing system, method, and product are disclosed for self-directed distance learning. The data processing system includes a client computer system coupled to a server computer system utilizing a network. An Internet-based distance learning environment is first accessed from which a first one of multiple, separate information streams is selected. The selected information stream is associated with an educational presentation. The selected information stream is then used to select a second information stream. Both information streams are then presented.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: October 5, 2004
    Assignee: International Business Machines Corporation
    Inventors: Paul Andrew Moskowitz, Clifford A. Pickover, William Grey, Stephen J. Boies
  • Patent number: 6802063
    Abstract: An improved logically partitioned data processing system is provided. In one embodiment, the data processing system includes a plurality of hardware devices, including processors, and a plurality of operating systems. Each of the plurality of operating systems executes within a separate partition within the logically partitioned data processing system. A firmware component provides each operating system with a virtualized copy of the hardware devices, thus maintaining separation between each of the logical partitions. The firmware component is implemented as 64-bits, thus allowing each of the processors to execute in 64-bit mode and eliminating the need for virtual address translation from a 32-bit virtual address to a 64-bit physical address.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: October 5, 2004
    Assignee: International Business Machines Corporation
    Inventor: Van Hoa Lee
  • Patent number: 6799166
    Abstract: A method and apparatus for processing electronic transactions. A batch request is received, wherein the batch request includes a plurality of electronic transactions. A determination is then made as to whether the batch request has been processed. Responsive to a determination that a portion of the batch request has been processed, the plurality of electronic transactions is sent for processing. Responsive to a determination that a portion of the batch request has been processed, a signal is sent indicating a check for duplicate electronic transactions should be made with respect to the plurality of electronic transactions.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corporation
    Inventors: Daniel Michael Dorrance, Jerry Walter Malcolm
  • Patent number: 6792554
    Abstract: A method and system for controlling a clock signal is provided. The clock signal is first stored in a storage device. An input representing a clock control signal is input into a first end of a plurality of interconnected memory storage circuits. An outputted clock signal is output from a second end of the plurality of interconnected memory storage circuits based on receipt of the pulse representing the clock control signal. In one embodiment, the plurality of interconnected memory storage circuits is comprised of latches. In an alternate embodiment, the plurality of interconnected memory storage circuits is comprised of latches and master/slave flip-flops.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: September 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Gilles Gervais, Stephen Douglas Weitzel
  • Patent number: 6792564
    Abstract: A method, system, and product in a computer system are described for reporting error events which occur within the computer system. The computer system includes multiple logical partitions. Each of the logical partitions includes a different one of multiple, different operating systems. A format is specified for reporting error events. An error event occurring within one of the logical partitions is detected. Information about the error event is formatted according to the specified format. Each operating system utilizes this format to report error events.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: September 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: George Henry Ahrens, Jr., Douglas Marvin Benignus, Leo C. Mooney, Arthur James Tysor
  • Patent number: 6782508
    Abstract: A method and apparatus in a data processing system for processing user input in a graphical user interface. A graphical user interface is presented using a view controller, wherein the view controller handles the user input to the graphical user interface. Responsive to a selected user input, an event is sent to a first application mediator. Responsive to the first application mediator being unable to process the event, the event is sent to a second application mediator for processing, wherein the first application mediator and the second application mediator handle an order in which a set of displays are displayed by a view controller.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: August 24, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter C. Bahrs, Manish Mahesh Modh
  • Patent number: 6778174
    Abstract: A method and apparatus in a data processing system for processing graphics data in a processing element. A command is received. A determination is then made as to whether the command affects processing of current graphics data within the processing element. The command is sent to a subsequent processing element if the processing element is unaffected by the command. The command is held without affecting the processing element if the command affects processing of the current graphics data within the processing element until processing of the current graphics data has completed.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Thomas Winters Fox, Javier A. Rodriguez, Mark Ernest Van Nostrand, Jeffrey Allan Whaley
  • Patent number: 6779155
    Abstract: A method and apparatus in a data processing system for displaying a graphical user interface. A container is displayed in a graphical user interface from a set of containers, wherein a display of the container handled by a view controller from a set of view controllers. Each view controller handles the display of an associated container within the set of containers and user input for the associated container. A display of the set of containers is altered by an application mediator, wherein the set of containers are displayed in an order determined by the application mediator.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter C. Bahrs, Raphael Poole Chancey, Barry Alan Feigenbaum, Manish Mahesh Modh, Sean Michael Sundberg, John Allen Hubert Woolfrey
  • Patent number: 6775691
    Abstract: A dead e-mail identification locator discovers dead e-mail addresses without forwarding messages to valid recipients. Existing headers in the mail protocol are extended to include a test header. A mail server that supports the protocol extension of the present invention may send a reply if the address does not exist and may discard the message if the address does exist. The test header allows a sender to test an e-mail address for validity without the message being forwarded to the user, as will be described below. The sender may be a dead e-mail locator program, which tests a plurality of e-mail addresses, such as an e-mail address list or white pages of e-mail addresses.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Joseph Kubik, Lorin Evan Ullmann
  • Patent number: 6769078
    Abstract: A method system, and computer program product for determining the source of a fault within a bus, such as, for example, an inter integrated circuit (I2C) bus is provided. In one embodiment, a bus driver monitors the bus for faults. If a fault occurs on the bus, the bus driver resets each switch on the bus and then turns on the first switch connected to the bus driver. If the fault is encountered after turning on the first switch, then it is determined that the fault was caused by either the first switch, a device connected to the bus as a result of turning on the first switch, or one of the bus connectors just switched on as a result of turning on the first switch. If the fault is not encountered, the next switch is turned on and the process is repeated until the fault is encountered. The fault when encountered will be caused by either the most recently turned on switch or a device or bus connectors switched in by the turning on of the last switch.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: July 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Michael Anton Barenys, Robert Allan Faust, Joel Gerald Goodwin
  • Patent number: 6751582
    Abstract: A formal verification method and apparatus allowing a user, via a waveform-based graphical user interface, to modify the waveform displayed by a verification algorithm by highlighting specific values at specific cycles. The user may begin either from scratch or from an existing trace produced by the tool. After running the tool, the resultant waveform represents a trace that the user wishes to extract from the model using the verification tool. The annotations input by the user are translated to “cycle-specific invariants” to force the tool to produce a trace that satisfies the desired annotated waveform and to insure a much faster and more efficient query. The invariants are then passed to a verification algorithm, which outputs a trace satisfying these invariants. The user determines whether the trace is satisfactory and may add additional constraints to the waveform to derive a subsequent trace until the user is satisfied.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: Flemming Andersen, Jason Raymond Baumgartner, Steven Leonard Roberts