Patents Represented by Law Firm Lowe Price Leblanc Becker & Shur
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Patent number: 5007056Abstract: A processing circuit for receiving input data having an error detecting and correcting code from a data bus is disclosed, that includes a write data latch circuit connected to the data bus for latching the input data; an error detecting and correcting circuit responsive to an output signal from the write data latch circuit for checking the data and correcting the latched data and outputting an error correction signal when the latched data is erroneous; a register circuit for storing correct data sent from the error detecting and correcting circuit; first and second input data latch circuits each of which is connected to the data bus and the register circuit for temporarily latching the input data from the data bus in the absence of the error correction signal, and for temporarily latching the correct data in the presence of the error correction signal; and an arithmetic unit circuit responsive to the input data latched in the first and second input data latch circuits for executing an operation on the input dType: GrantFiled: December 27, 1988Date of Patent: April 9, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masaitsu Nakajima
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Patent number: 5007012Abstract: A method of transferring data in one access cycle between two devices over a communications bus. Data is read from a predetermined location in the first device. The data is also latched into a temporary register. Data is simultaneously written into a predetermined location of a second device. The read operation of the first device is terminated and the data from the temporary register is applied to the second device simultaneously with the termination step so that data is available to the second device notwithstanding the fact that the first device has ceased transmission.Type: GrantFiled: September 9, 1988Date of Patent: April 9, 1991Assignee: Advanced Micro Devices, Inc.Inventor: Vineet Dujari
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Patent number: 5005199Abstract: A line powered telephone interface circuit answers an incoming call and, responsive to a command tone, routes the call to a selected terminal. If no command tone is received within a predetermined time period, low voltage audio signalling devices located near the conventional telephone sets are activated to alert the subscriber of an incoming call. The interface need not be connected to a separated supply source. The device is connected to a telephone line and to at least one plug connectable with a telephone set jack, the device being connected to various terminals. A detector detects the ring signal and a relay establishes connection with a telephone line as soon as the ring signal has been detected for a determined time duration. A combination timer/switcher circuit inhibits the ringing of the corresponding telephone set, and is associated with a sound transducer connected operable by a low voltage signal.Type: GrantFiled: November 15, 1989Date of Patent: April 2, 1991Assignee: Dolphin IntegrationInventor: Christian Dupillier
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Patent number: 5004457Abstract: The transplantation of donor tissue into the brain is effected by locking the head relative to a stereotaxic unit; penetrating the brain with a first cannula to a predetermined depth to create a transplant site within the brain while the first cannula is fixed by the stereotaxic unit relative to the brain; then feeding a second cannula, which contains donor tissue at its distal end, through the already fixed first cannula so that the distal end of the second cannula comes to rest at the transplant site; and finally withdrawing the first cannula and the second cannula so as to leave the donor tissue at the transplant site.Type: GrantFiled: December 2, 1988Date of Patent: April 2, 1991Assignee: The United States of Americas as represented by the Secretary of the Department of Health and Human ServicesInventors: Richard J. Wyatt, William J. Freed, Richard A. Staub
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Patent number: 5005044Abstract: A masking device employed for a composer and the like for forming a desired opening portion by covering a glass plate holding an original includes a pair of light intercepting devices for covering the glass plate from the front and rear and left and right directions. One end of each of the light intercepting devices includes a holding portion for holding an end portion of masking sheet for covering the glass plate and a member for defining an opening portion on the glass plate. The holding member and the opening portion defining member in the front and rear directions are provided spaced part from each other in the up and down directions, and the light intercepting device in the left and right directions are posed in an opening portion formed between the holding member and the opening portion defining member of the light intercepting device in the front and rear directions to define the opening portion in left and right directions.Type: GrantFiled: September 21, 1989Date of Patent: April 2, 1991Assignee: Dainippon Screen Mfg. Co., Ltd.Inventors: Makoto Yahata, Fumihiko Nishida
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Patent number: 5004970Abstract: In a device for detecting the flow of a current lower than a given threshold current in a load (L) in series with a power MOS transistor (M1), the free terminal of the MOS transistor is connected to a first terminal (1) of a supply source, the second terminal (2) of which is connected to the free terminal of the load (L), the gate (G1) of the MOS transistor being connected to a control source (3). A means (11) for detecting the voltage drop is connected across the terminals of the MOS transistor and a control loop (12) imposes an appropriate gate voltage to the MOS transistor as soon as the voltage drop across its terminals tends to decrease below a determined level.Type: GrantFiled: January 19, 1990Date of Patent: April 2, 1991Assignee: SGS-Thomson Microelectronics S.A.Inventor: Michel Barou
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Patent number: 5004640Abstract: Multilayered ceramic substrates having Cu electrode patterns in or on ceramic-glass insulating layers which consist essentially of Al.sub.2 O.sub.3, SiO.sub.2, B.sub.2 O.sub.3, Na.sub.2 O, K.sub.2 O, CaO, MgO and PbO. The methods for manufacturing the substrate comprises thermally treating a laminate of alternately superimposing ceramic-glass insulating layers and CuO-based electrode layers of desired patterns in air or in a molecular oxygen-containing atmosphere to eliminate organic binders from the laminates by burning out, reducing the CuO into metallic Cu at low temperatures in an atmosphere containing hydrogen, and firing the thus reduced laminate in an inert gas such as nitrogen. The firing is effected at 850.degree. to 950.degree. C. The multilayered ceramic substrate may also be obtained by forming ceramic-glass insulating layers and CuO-based electrode layers alternately on a sintered ceramic support, followed by the thermal treatment, reduction and firing set forth above.Type: GrantFiled: March 10, 1989Date of Patent: April 2, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Seiichi Nakatani, Satoru Yuhaku, Tsutomu Nishimura, Yukio Terada, Yasuyuki Baba
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Patent number: 5004573Abstract: A method of producing a zinc oxide varistor for high voltage which is a voltage-current non-linear type of resistor including zinc oxide as the major ingredient and bismuth oxide or manganese dioxide as additives for use with a circuit protector and gapless arrester. The method of the invention includes sintering a zinc oxide composition lacking bismuth oxide at 1200.degree.-1350.degree. C. under conditions and for a period of time effective to form a primary sintered body, heat-treating a primary sintered body coated with an amount of metal oxide paste containing mostly bismuth oxide at a temperature of 1000.degree.-1200.degree. C. for a period of time effective to diffuse the metal oxide paste to the grain boundaries of the zinc oxide grains.Type: GrantFiled: November 2, 1989Date of Patent: April 2, 1991Assignee: Korea Institute of Science and TechnologyInventors: Myung H. Oh, Kyung J. Lee, In J. Chung, Nam Y. Lee, Myung S. Kim
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Patent number: 5004235Abstract: The invention provides a surface unit, to be mounted on the surface of a peripheral wall of a tennis court field having a plurality of tennis courts without partition between one court and the other, to prevent a tennis ball that impacts onto the wall rearward of the back line from rebounding into an adjacent court. The tennis ball thus rebounds with a reduced velocity, back to the original court where a game is going on. The surface unit comprises a plurality of repelling members of rebound-reducing material each formed into elongated triangular-sectioned elements, preferably of isosceles cross-section, the plurality of repelling members being installed in parallel on a surface of a peripheral wall of a tennis court field so that the longitudinal direction of each repelling member extends vertically. The flat sides of the members, opposed to ridge lines formed by joining the other two sides of the repelling member, are held at the surface of the peripheral wall either directly or through a sheet member.Type: GrantFiled: December 6, 1988Date of Patent: April 2, 1991Inventor: Tamio Suga
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Patent number: 5004453Abstract: A centrifuge includes an outer frame defining therein a rotor chamber, a centrifuge rotor detachably disposed in the rotor chamber, and a door slidably mounted on the frame for opening and closing the rotor chamber. The door projects outwardly from the frame when it is disposed in an open position. Since the door is received within the frame when it is fully closed, it does not enlarge the necessary space for installation of the centrifuge.Type: GrantFiled: July 27, 1989Date of Patent: April 2, 1991Assignee: Hitachi Koko Company, LimitedInventors: Hiroshi Hayasaka, Akio Nagata
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Patent number: 5002449Abstract: Inner pickers (6) are provided for respective stages of racks (4) of storage areas (2, 3) to be movable on rails (7). Operations of the inner pickers (6) are independently controlled in the respective rack stages by optical communication through optical communication units (9).Type: GrantFiled: August 15, 1988Date of Patent: March 26, 1991Assignee: Kabushikikaisha Itoki KosakushoInventors: Hiroshi Kita, Shigeki Tsuchida, Tetsuji Hamada
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Patent number: 5003542Abstract: In a semiconductor memory device having an error correcting circuit, a pair of bit lines and inverted bit lines are connected to the inputs of first and second inverting amplitude circuits through a first and second N channel MOS transistors, respectively, and the output of the first inverting amplitude circuit is connected to the bit line through a third transistor and the output of the second inverting amplitude circuit is connected to the inverted bit line through a fourth transistor. When an error of information of any bit line pair is detected by an error detecting circuit, the first and second N channel MOS transistors are turned off and each bit line pair is separated from the input of the first and second inverting amplitude circuits and, as a result, information of a bit line pair is rewritten by the output of the first and second inverting amplitude circuits.Type: GrantFiled: November 15, 1988Date of Patent: March 26, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Koichiro Mashiko, Kiyohiro Furutani, Kazutami Arimoto
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Patent number: 5003205Abstract: In an output buffer circuit, two P channel MOSFET's (1, 2) are connected in parallel between a power supply terminal (16) and an output terminal (10), and two N channel MOSFET's (3, 4) are connected in parallel between the ground terminal (17) and the output terminal (10). When a high potential is applied to the power supply terminal (16), either one of the P channel MOSFET's (1, 2) or either one of N channel MOSFET's (3, 4) is turned on in response to an input signal. When a normal power supply potential is applied to the power supply terminal (16), two P channel MOSFET's (1, 2) or two N channel MOSFET's (3, 4) are turned on in response to the input signal.Type: GrantFiled: September 12, 1989Date of Patent: March 26, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kenji Kohda, Tsuyoshi Toyama, Yasuhiro Kouro, Hiroyasu Makihara
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Patent number: 5003129Abstract: A protecting structure for a harness arranged over stationary and movable sides of a telescopic steering column comprises a flat, wide harness protector for protecting the harness. The harness protector includes a pair of openings opposing each other in its longitudinal direction to introduce the harness thereinto or to extract the harness therefrom. The harness protector is in itself constructed to telescopically move according to telescopic motion of the steering column when the harness protector is arranged over both of the stationary and movable sides of the steering column. The harness protector includes a harness guide provided midway therebetween for defining two branch harness passageways converged towards the openings to arrange the harness in such a manner as to branch the harness into two harness sections in its transverse direction, thereby allowing the two branched harness sections to move inwardly or outwardly in a transverse direction according to the telescopic motion of the steering column.Type: GrantFiled: June 1, 1990Date of Patent: March 26, 1991Assignee: Nissan Motor Company, Ltd.Inventors: Shunichi Toyomasu, Kazuyuki Mori
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Patent number: 5002106Abstract: A method for the production of finished wood sheets from rough cut wood includes the steps of conditioning the rough cut wood, as necessary, to obtain a predetermined moisture content equivalent to a humidity of 50%. The conditioned rough cut wood is cut into predetermined dimensions using a sawdust-free process and then immediately dried to obtain a low moisture content. The dried wood is further treated using a grinding process to eliminate rough edges of the finished sheet.Type: GrantFiled: December 21, 1989Date of Patent: March 26, 1991Inventor: Hans Binder
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Patent number: 5003402Abstract: A charge latent image is formed on a recording medium in response to information and a reference pattern so that the information and the reference pattern are recorded on the recording medium. During a reproducing process, the information is read out from the recording medium and an information signal representing the readout information is generated. In addition, the reference pattern is read out from the recording medium and a reference signal representing the reference pattern is generated. The information is demodulated from the information signal. The reference signal is used in the demodulation of the information from the information signal.Type: GrantFiled: November 8, 1989Date of Patent: March 26, 1991Assignee: Victor Company of Japan, Ltd.Inventors: Itsuo Takanashi, Shintaro Nakagaki, Hirohiko Shinonaga, Tsutou Asakura, Masato Furuya, Hiromichi Tai
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Patent number: 5003536Abstract: In cases where a first communication control unit locks a second communication control unit to communicate with the second unit, the first unit stores a data representing a time remaining until the locking of the second unit is released. In these cases, the second unit stores a data representing an address of the first unit as a lock address corresponding to an address of a unit which locks the second unit. In cases where a third communication control unit tries to communicate with the second unit and fails the communication with the second unit, the third unit connects with the second unit and reads out the data representative of the lock address from the second unit, and then the third unit connects with the first unit in response to the lock address and reads out the data representative of the lock remaining time from the first unit. The third unit retries to communicate with the second unit after the lock remaining time elapses.Type: GrantFiled: July 10, 1989Date of Patent: March 26, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shotaro Tanaka, Masao Ikezaki, Yukiko Hase Nee Ono
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Patent number: 5003246Abstract: A single-chip solid-state bidirectional switch comprises two power MOS transistors (TP1, TP2) connected by their drains (D1, D2), and the sources of which (S1, S2) constitute the main terminals (A1, A2) of the switch; two auxiliary MOS transistors (T1, T2) each of which is connected by its main terminals between the source and the gate of each power transistor, the gates of those auxiliary MOS transistors being connected to the common drain of the power transistors; and two high-value resistors (R1, R2), respectively connected between the gate (G1, G2) of each power transistor and the control terminal (G) of the solid-state switch.Type: GrantFiled: August 30, 1989Date of Patent: March 26, 1991Assignee: SGS-Thomson Microelectronics S.A.Inventor: Bruno Nadd
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Patent number: 5001178Abstract: Thermoplastic blend compositions comprise a crystalline polyalkylene terephthalate, a styrenic polymer component, and a diepoxide. The styrenic polymer component comprises a rigid portion formed from at least one monomer selected from the group consisting of styrene, halogen-substituted styrene, alpha-methyl styrene and para-methyl styrene, and at least one additional ethylenically unsaturated monomer, and a rubber portion including polybutadiene.Type: GrantFiled: March 6, 1989Date of Patent: March 19, 1991Assignee: General Electric CompanyInventors: Ronald L. Jalbert, Keith E. Cox
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Patent number: D316114Type: GrantFiled: March 28, 1988Date of Patent: April 9, 1991Inventor: Shih-Ming Hwang