Abstract: A vertical takeoff and landing (“VTOL”) aircraft, e.g., an unmanned aerial vehicle (“UAV”), includes an elongated fuselage having a pair of forward swept wings and a pair of rearward swept canards, the outer tips of which are respectively joined with a respective tip end portion of one of the forward swept wings. The thrust outlet of a thrust-vectoring jet engine is disposed along the roll axis of the aircraft and aft of the pitch axis thereof, and a pair of downwardly exhausting ducted lift fans, e.g., tip turbine fans, are respectively disposed within a tip end portion of respective ones of the forward swept wings such that the fans are located symmetrically with respect to each other on opposite sides of the roll axis and forward of the pitch axis. The aircraft is capable of VTOL operations, including hovering, and is highly maneuverable at both very low and very high speeds.

Abstract: In one embodiment, a gimbaled reflector antenna is provided that includes: a Dragonian antenna having a sub-reflector and a main reflector; a feed; a third reflector adapted to reflect a beam from the feed to the sub reflector; an azimuth gimbal adapted to rotate the Dragonian antenna with respect to the third reflector; and an elevation gimbal adapted to rotate the flat reflector with respect to the feed.

Abstract: A memory circuit having dual-gate memory cells and a method for fabricating such a memory circuit are disclosed. The dual-gate memory cells each include a memory device and an access device sharing a semiconductor layer, with their respective channel regions provided on different surfaces of the semiconductor layer. The semiconductor layer has a thickness, such that when a pass voltage is applied to the gate electrode of the access device, the access device and the memory device remains isolated, such that the charge stored in the memory device is unaffected by the pass voltage. The pass voltage is determined from a range of voltages, when applied to the access device, has no effect on the threshold voltage of the memory device. The dual-gate memory cells can be used as building blocks for a non-volatile memory array, such as a memory array formed by NAND-strings.

Abstract: Circuits and related methods are provided for buffering reference voltages from noise associated with output driver transistors. In one example, an output driver buffer circuit includes an output driver transistor adapted to adjust an output voltage of an output pad. The circuit also includes a pre-driver circuit connected to a gate of the output driver transistor. The pre-driver circuit is adapted to receive a reference voltage to control the output driver transistor. The pre-driver circuit includes a precharged capacitor, a first switch adapted to connect the capacitor to the gate, and a second switch adapted to connect the reference voltage to the gate. The second switch is adapted to operate following a time period after the capacitor is connected to the gate. The capacitor is adapted to buffer noise associated with the output driver transistor during the time period.

Abstract: According to an embodiment of the present invention, a device configured to send and receive messages over a first network and a second network includes a network status detector unit and a network disabling unit. The network status detector unit is configured to detect the availability of the first network and output a first network status signal indicating the availability or unavailability of the first network. The network disabling unit is configured to receive the first network status signal and disable the sending and receiving of messages on the second network when the first network status signal indicates the first network is unavailable.

Abstract: A communications system is provided in which a host may receive data from a slave device over a polling bus. The slave device first reports to the host an initial amount of data to be transferred. The host can then initiate a data transfer from the slave device in order to retrieve the specified amount of data. As that initial data is being transferred over the bus, if additional data to be transferred to the host is received by the slave device, the slave device will report that supplemental amount of data to the host along with the initial data. The host may then immediately schedule a supplemental data transfer from the slave device in order to retrieve the additional data. The slave device may utilize a self-decrementing counter in order to keep track of the packets that require transfer but have not yet been reported to the host. The amount of data reported by the slave device to the host device may be provided as a count of packets in which the packets have a predetermined maximum size.

Abstract: A multi-function device with a positioning function and a real time positioning engine is disclosed. The device contains also a shared processor used by the positioning function and other functions of the device, such as a mobile radio-communication function. The positioning engine performs in real time the most computational intensive calculations of the positioning function, such as downsampling, Doppler mixing and correlation calculations. Since the received signal need not be stored, the memory requirements of the positioning function are significantly reduced if aiding data is available.

Abstract: A filament attachment system includes a bond head comprising a de-spooling system with a spool and balanced dancer arm assembly, a clamp having a curved filament entry, a narrower gripping region, and a wider filament exit, and a bond tool comprising a guide portion, a grooving portion, and a staking portion. The grooving portion forms a groove into a bond and the staking portion closes the groove over the filament, securing the filament in the bond. Thus, the filament can be attached with a single pass of the bond head using a single bond.

Abstract: A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, and a drain electrode overlapping the edge of the gate electrode; and a pixel electrode connected to the drain electrode.

Abstract: Systems and methods are disclosed herein to provide a protective cover over one or more switches on an electronic device. For example, in accordance with an embodiment of the present invention, an electronic device includes a housing having a first perforation and a switch coupled to the housing. A switch cover may be placed over the switch to prevent operation of the switch, with the switch cover having a second perforation that aligns with the first perforation of the housing. A locking mechanism may be inserted at least partially through the first and second perforations to lock the switch cover to the electronic device.

Abstract: In an array substrate and a display apparatus having the array substrate, a pixel part includes gate lines, data lines and pixels electrically connected to the gate and data lines. A gate driving circuit is electrically connected to a first end of the gate lines and applies a gate signal to the gate lines. A first inspecting circuit is electrically connected to odd-numbered gate lines of the gate lines and inspects odd-numbered pixels connected to the odd-numbered gate lines. A second inspecting circuit is electrically connected to even-numbered gate lines of the gate lines and inspects even-numbered pixels connected to the even-numbered gate lines. Thus, electrical defects between the pixels may be easily detected, thereby improving the inspectability for the defects of the array substrate.

Abstract: A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.

Abstract: A measure of the quality of a laser beam is obtained by comparing the power of a theoretical Gaussian beam through a (certain sized area) pinhole to the power of a test beam through a same sized (area) pinhole. The theoretical surrogate Gaussian beam with the same second moment of intensity as the test beam is used to determine the “bucket size” used in “power-in-the-bucket” techniques. The bucket size is an interaction area determined by the wavelength of the laser light, the focusing distance, and the 1/e2 radius of the near field intensity. The beam quality is determined by taking the square root of the ratio of the theoretical power through a bucket and the actual power through a pinhole with the same size as the bucket. The beam quality of different types of beam profiles can be obtained with a single method or measure.

Abstract: Systems and methods are disclosed herein to provide improved electrostatic protection for electrical circuits. For example, in accordance with an embodiment of the present invention, an electrostatic protection device includes: a drain region formed in a substrate; a gate separated from the substrate by a gate oxide; and an isolation region formed in the substrate, the isolation region being adapted to isolate the gate oxide from a DC voltage coupled to the drain region.

Abstract: A terrestrial C/A code GPS receiver system digitally samples, filters and stores a segment of 11 half chips of the received composite as a binary number and multiplexes this number for parallel correlation with each of a series of multibit code replicas for the satellites to be tracked. Each of the time delay specific correlation products are accumulated in a cell of a memory matrix so that at least twenty two delays for each satellite may be evaluated each code period providing fast reacquisition, even within a city intersection, as well as correction of multipath tracking and multipath interference. All cells of the memory matrix may be used for an acquisition of a single satellite in about 4 ms. Two satellite tracking, in addition to altitude hold, uses cross track hold alternating with clock hold to update the cross track estimate. Single satellite tracking uses cross track and clock hold together. Navigation data is updated with detected changes in motion including turns.

Abstract: Devices and methods are described for determining position information without broadcast ephemeris data for extended time periods. A server or client device receives or collects historical state data of satellites of a satellite-based positioning system and generates predictions of future satellite trajectories for future time periods. When a server generates the predictions, the predictions are subsequently transferred to a client device. The client device selects predictions appropriate to time of interest. The time can be any time during a period of at least seven calendar days. The client device reconstructs satellite states using information on the predictions and uses the reconstructed satellite states to acquire satellite signals as appropriate to the current location and time of the client device. The client device determines and/or tracks its position using information of the satellite states and timing information of the satellite signals.

Abstract: A lens assembly suitable for use in miniature cameras is disclosed. The lens assembly can have a plurality of glass lenses having spherical surfaces and a single plastic lens having aspheric surfaces, for example. Optionally, all of the lenses can be disposed within a common lens barrel. A pupil plane can be located just in front of the first lens to provide a small chief ray angle. Both the cost of the lens assembly and alignment sensitivity are advantageously mitigated.

Abstract: A spectrophotometer capable of high spectral resolution (e.g., in the GHz range) is presented. The spectrophotometer includes a container for holding a sample, an arrayed-waveguide grating coupled to the sample holder, and a detector array coupled to the arrayed-waveguide grating. The arrayed-waveguide grating may be a monolithic chip, and the container may be integrated into the chip. An integrated container may be a microfluidic channel formed through the layers in the chip and positioned in such a way that light is transferable from the microfluidic channel to the waveguides of the arrayed-waveguide grating. The invention is also a method of making the spectrophotometer. The method entails providing an arrayed-waveguide grating having an input end and an output end, coupling a container to the input end, wherein the container is capable of holding a sample, and coupling a detector array to the output end of the arrayed-waveguide grating.

Abstract: Systems and methods are disclosed herein to provide improved techniques for assembling and packaging infrared camera components. For example, in accordance with an embodiment of the present invention, an infrared camera includes a housing having a plurality of holes, with a shutter, a lens, an infrared detector, and a first spacer disposed within the housing. The first spacer is secured within the housing by an adhesive disposed in one or more of the holes of the housing.

Abstract: Disclosed is an LCD system including an LCD panel having a plurality of data lines, a plurality of gate lines intersecting the data lines in a substantially perpendicular state, and a plurality of pixel electrodes arranged in a matrix configuration and each having a switch connected to one of the gate lines and one of the data lines; a gate driver for successively applying a gate voltage to the gate lines to turn on the switches; a data driver for applying a gray voltage, corresponding to image data signals, to the data lines; and a printed circuit board having a timing controller for sending both the image data signals and a shift clock signal to the data driver, a first signal wire through which the shift clock signal is transmitted, and a second signal wire through which a first clock signal having a frequency equal to and a phase difference of 90° to 270° compared to the shift clock signal.