Patents Represented by Attorney, Agent or Law Firm Majestic, Parsons, Siebert & Hsue
  • Patent number: 6162430
    Abstract: A method is provided that accelerates the rate of kill of pests such as from the order Lepidoptera. The method comprises treating the pests or their loci with at least two different insect toxins which are expressed from at least one recombinant microbe. Pairs of toxins that do not compete with each other on the same binding site and that differ in their pharmacology have been found to provide synergistic control. Preferred insecticidal microbes are baculoviruses.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: December 19, 2000
    Assignee: The Regents of the University of California
    Inventors: Bruce D. Hammock, Rafael Herrmann, Haim Moskowitz
  • Patent number: 6163246
    Abstract: A chip-type electronic device has a sintered ceramic body formed by integrally sintering a plurality of ceramic layers, inner electrodes including first electrodes, second electrodes and a third electrode formed inside this sintered ceramic body and outer electrodes formed on both end surfaces of this sintered ceramic body. One end of each of the first electrodes is electrically connected to one of the outer electrodes. Each of the second electrodes is electrically connected to a corresponding one of the first electrodes through an associated one of throughholes through one of the ceramic sheets. The third electrode is electrically connected to the other of the outer electrodes and overlaps with the second electrodes as seen perpendicularly to the planar inner electrodes.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: December 19, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukiko Ueda, Masahiko Kawase
  • Patent number: 6159205
    Abstract: An automated method is described for advantageously preparing and treating an eye of the patient. The method further provides a vision-corrective procedure, such as photothermal keratoplasty. The automated method is useful to dry the cornea to reduce or eliminate a tear film on the corneal surface that might otherwise interfere with or reduce the efficacy of a vision-corrective procedure and thereafter to treat the cornea according to a vision-corrective procedure. The automated method is user-friendly, allowing the treatment provider to develop or to select an appropriate pre-treatment and treatment plan and to activate sane using a familiar "Windows" environment. The method has particular application in the area of automated corneal preparation and treatment, it may be used in the automated preparation and treatment of other tissues or substrates.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: December 12, 2000
    Assignee: Sunrise Technologies International Inc.
    Inventors: Satish V. Herekar, Benjamin W. Woodward
  • Patent number: 6160739
    Abstract: Non-volatile memory cells in a sector of a memory array are selectively erased only when it is determined that the selected memory cells require erasing. A memory cell is selectively erased by applying two non-zero erase voltages to the cell, where the combination of the two erase voltages generates an electric field sufficient to induce Fowler-Nordheim tunneling and erase the cell. Memory cells not selected for erasing, either in the same sector or other sectors, have only one or none of the two erase voltages applied, which is insufficient to erase the unselected memory cells is a result, endurance of the non-volatile memory cells is improved because the memory cells are not subjected to repeated unnecessary erasing and programming operations.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: December 12, 2000
    Assignee: SanDisk Corporation
    Inventor: Sau C. Wong
  • Patent number: 6157558
    Abstract: An SRAM-based CAM cell and CAM array architecture reduce transistor count and memory size by replacing pass transistors and search transistors of conventional SRAM-base CAM cells with a pair of transistors having gates coupled to bit lines. The two bit-line-controlled transistors in a CAM cell are between storage nodes and a word/match line for the CAM cell. The sizes of pull-up and pull-down devices in the CAM cells are selected so that grounding a storage node to a word/match line through one of the two bit-line-controlled transistors can change the bit stored in a CAM cell, but applying a voltage (near the supply voltage) from the word/match line through either of the two bit-line-controlled transistors to a storage node cannot change the bit or data stored in a CAM cell. Accordingly, a write operation grounds a selected word/match line and applies a voltage to the unselected word/match lines. A search operation charges all word/match lines and senses the word/match lines.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: December 5, 2000
    Assignee: SanDisk Corporation
    Inventor: Sau-Ching Wong
  • Patent number: 6156653
    Abstract: Deposited dielectric layers for a semiconductor device are typically formed in a chemical vapor deposition. Often a hydrogen by-product is formed. Especially in a plasma enhanced chemical vapor deposition process, the hydrogen by-product can form free radicals that are introduced into the dielectric layers. The hydrogen free radicals can affect the stability of the threshold and breakdown voltage of MOSFET transistors. Deuterium introduced into the CVD chamber competes to enter the dielectric layer with the hydrogen. The deuterium prevents some of the hydrogen free radicals from entering the dielectric layer and thus increases MOSFET reliability.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: December 5, 2000
    Assignee: Zilog, Inc.
    Inventors: John A. Smythe, John E. Berg
  • Patent number: 6157983
    Abstract: An EEPROM system includes flash EEPROM cells organized into subarrays. Pairs of subarrays share row address decoders by sharing word lines, and individual subarrays have dedicated column address decoders and data registers. Each row decoder has an associated row address latch, and each column decoder has an associated column address latch. Multiple data chunks are concurrently written into the subarrays by first latching chunk addresses into the row and column address latches, and corresponding chunks of data into the data registers, then activating a programming signal to initiate concurrent programming and verifying the programming of the data chunks.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: December 5, 2000
    Assignee: SanDisk Corporation
    Inventors: Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra, Raul-Adrian Cernea
  • Patent number: 6154793
    Abstract: An improved DMA controller is provided. The improved DMA controller uses a peripheral control bus which has scan codes to indicate the DMA channel, conventional data request/data acknowledge lines, and additional lines indicating a "terminate," "type fetch," "end of buffer" and "store status." List entries are associated with the buffers in the memory. Each list entry has a type/status field which can be coded with information indicating "ready buffer," whether to notify "end of buffer," "buffer in progress," "completed buffer without status," "completed buffer with status," "ready buffer with command," and "ready buffer without command." The type of status byte can be checked before processing the buffers.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: November 28, 2000
    Assignee: Zilog, Inc.
    Inventors: Craig MacKenna, Gyle Yearsley
  • Patent number: 6154157
    Abstract: An analog-to-analog converter uses programmable conversion arrays containing non-volatile memory cells to provide references that depend on the threshold voltages of the memory cells, with the type of conversion dependent on the threshold voltages of the cells. An analog input signal is applied to an analog-to-digital conversion array for conversion to a digital signal. The digital signal is applied to a digital-to-analog conversion array for conversion to an analog output signal. A memory cell in the digital-to-analog conversion array is selected corresponding to the digital signal and reads the memory cell to generate the analog output signal, which is equal to or has a one-to-one correspondence with the threshold voltage of the memory cell. The conversion arrays can be programmed with suitable threshold voltages to implement desired conversions, such as logarithmic conversion for voice applications or random conversions for signal encryption.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: November 28, 2000
    Assignee: SanDisk Corporation
    Inventor: Sau C. Wong
  • Patent number: 6154610
    Abstract: An underwater camera housing for enclosing a camera for use with a flash unit has a cable connector to which a signal-transmitting cable extending to the flash unit is attached and a link switch is provided on its outer surface by which the transmission of signals through the cable can be cut off or connected again. The signal transmitted through the cable may be electrical signals or light signals. If light signals are transmitted from the housing to control the flash unit, a circuit is provided for generating an electrical signal to prepare the camera for flash photography and the link switch serves to control the generation of this electrical signal such that the camera can be prepared selectively either for flash or natural-light photography.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: November 28, 2000
    Inventors: Akihide Inoue, Yoshiyuki Takematsu
  • Patent number: 6154086
    Abstract: An apparatus having a power supply terminal, a capacitor terminal, and a load terminal for distributing power from the power supply terminal to the capacitor terminal. The apparatus has a driver which supplies load current to the load terminal in response to a control signal, a controller which generates the control signal, and is coupled to the capacitor terminal, and a switching device. The switching device couples the power supply terminal to the controller and the capacitor terminal when the driver does not supply the load current to the load terminal, and decouples the power supply terminal from the controller and the capacitor terminal when the driver supplies the load current to the load terminal. As a result, the controller is effectively isolated from the noisy power supply.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: November 28, 2000
    Assignee: Zilog, Inc.
    Inventor: Mihai C. Manolescu
  • Patent number: 6150415
    Abstract: Biologically stable inhibitors of soluble epoxide hydrolases are provided. The inhibitors can be used, for example, to selectively inhibit epoxide hydrolase in therapeutic applications such as treating inflammation, for use in affinity separations of the epoxide hydrolases, and in agricultural applications. A preferred class of compounds for practicing the invention have the structure shown by Formula 1 ##STR1## wherein X and Y is each independently nitrogen, oxygen, or sulfur, and X can further be carbon, at least one of R.sub.1 -R.sub.4 is hydrogen, R.sub.2 is hydrogen when X is nitrogen but is not present when X is sulfur or oxygen, R.sub.4 is hydrogen when Y is nitrogen but is not present when Y is sulfur or oxygen, R.sub.1 and R.sub.3 are each independently a substituted or unsubstituted alkyl, haloalkyl, cycloalkyl, aryl, acyl, or heterocyclic, or being a metabolite or degradation product thereof.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: November 21, 2000
    Assignee: The Regents of the University of California
    Inventors: Bruce D. Hammock, Christophe H. Morisseau, Jiang Zheng, Marvin H. Goodrow, Tonya Severson, James Sanborn
  • Patent number: 6149316
    Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: November 21, 2000
    Assignee: SanDisk Corporation
    Inventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
  • Patent number: 6148874
    Abstract: A machine and method for filling bags with liquid through spouts attached to the bags, wherein a piston within a filling head that operates to control flow of the liquid from the filling head is also extended out of the filling head and into the spout, after the bag is filled, in order to push remaining material from the spout and through is bottom opening into the bag. The spout bottom opening is then closed, after which any remaining material adhering to the walls inside the spout and surfaces of the filling head are cleaned by forming a chamber between them through which a cleaning fluid is passed. This machine and method are particularly useful when filling bags with highly viscous and/or sticky liquids, such as thick food products. They avoid a result of having either to distribute messy bags of product with material remaining adhered to the outside of the spout and/or bag, or to first remove this material by an additional cleaning step.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: November 21, 2000
    Assignee: Packaging Systems, L.L.C.
    Inventors: Christopher C. Rutter, Stanley E. Hurd
  • Patent number: 6151248
    Abstract: An EEPROM system having an array of memory cells that individually include two floating gates, bit line source and drain diffusions extending along columns, steering gates also extending along columns and select gates forming word lines along rows of floating gates. The dual gate cell increases the density of data that can be stored. Rather than providing a separate steering gate for each column of floating gates, an individual steering gate is shared by two adjacent columns of floating gates that have a diffusion between them. The steering gate is thus shared by two floating gates of different but adjacent memory cells.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: November 21, 2000
    Assignee: SanDisk Corporation
    Inventors: Eliyahou Harari, Daniel C. Guterman, George Samachisa, Jack H. Yuan
  • Patent number: 6151166
    Abstract: A color image display device has a light source which emits an approximately parallel beam of light, a color separation element for separating this parallel beam into beams of light of different colors, a liquid crystal display panel having picture elements and a lens array for focusing the separated beams at corresponding ones of these picture elements. The color separation element is formed with a prism array having two diffraction gratings on both sides of it such that a beam of white light passing through it will be separated into beams of different colors and the angles between the optical axes of these beams of different colors will be greater as they leave the separation element than if this beam of white light passed through only one of these diffraction gratings. Either one or both of these diffraction gratings may be integrally formed respectively on one or both of the surfaces of the prism array.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: November 21, 2000
    Assignee: Omron Corporation
    Inventors: Tomohiko Matsushita, Masayuki Shinohara, Shigeru Aoyama
  • Patent number: 6149658
    Abstract: A sutured staple, instrument and method are provided for constructing a graft-to-artery anastomosis and other soft tissue anastomoses, particularly by minimally invasive (or endoscopic) surgery. The sutured staple is comprised of a needle, pin, base and flange. The needle allows this surgical staple to be sewn through, for example, a graft and artery to be joined, and the pin, base and flange are formed to seal the graft and artery together between cooperating surfaces of the base and flange. The instrument holds the staple at its distal or working end, and controls in the handle allow application of the staple. The method employs the sutured staples and instrument to join soft tissues and to construct graft-to-artery anastomoses.
    Type: Grant
    Filed: January 9, 1997
    Date of Patent: November 21, 2000
    Assignee: Coalescent Surgical, Inc.
    Inventors: Barry N. Gardiner, Paul T. McDonald, Richard D. Phipps
  • Patent number: 6151246
    Abstract: A multibit-per-cell non-volatile memory divides the suitable threshold voltages of memory cells into ranges corresponding to allowed states for storage of data and ranges corresponding to forbidden zones indicating a data error. A read process in accordance automatically checks whether a threshold voltage is in a forbidden zone. In an alternative embodiment, a refresh process includes reprogramming the threshold voltage into an allowed state. In the case of a flash memory, a refresh reads a sector of the memory and saves corrected data from the sector in a buffer or another sector. The corrected data from the buffer or other sector can be written back in the original sector, or the corrected data can be left in the other sector with addresses of the original sector being mapped to the other sector.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: November 21, 2000
    Assignee: SanDisk Corporation
    Inventors: Hock C. So, Sau C. Wong
  • Patent number: 6149643
    Abstract: An instrument primarily adapted for use in photothermal keratoplasty procedures to shrink collagen tissue within a cornea of an eye being treated by controlled heating of the tissue with infra-red radiation. In a specific implementation example, a moveable multi-faceted prism is a primary optical element that forms a desired treatment infra-red radiation pattern from a single beam source. Multiple exposures to variations of the radiation pattern are provided. Parameters of two or more exposures to spot radiation patterns are stored in a memory of the instrument, and automatically configure the instrument to deliver the two or more exposures in sequence. Automatic calibration of the radiation intensity is also provided. A guide positions the head of the patient with respect to the instrument, and sensors monitoring movement of both the head and eye provide signals used to by the instrument to control radiation delivery.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: November 21, 2000
    Assignee: Sunrise Technologies International, Inc.
    Inventors: Satish V. Herekar, Benjamin W. Woodward
  • Patent number: 6147330
    Abstract: A PTC thermistor element for a heating device has a main body of a layered structure having a thinner layer and a thicker layer, sandwiched between electrodes formed on the main outer surfaces facing away from each other. The thinner layer has a thickness 0.05-0.43 times that of the thicker layer and is made of a PTC thermistor material with a Curie temperature which is lower than that of the thicker layer by 20.degree. C. or more. The center of heat generation is thus shifted towards the electrode formed on the thinner layer, and a heating plate contacting it can be effectively heated.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 14, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yutaka Ikeda, Takashi Shikama, Yuichi Takaoka, Kenjiro Mihara