Patents Represented by Law Firm Marger, Johnson, McCollom & Stolowitz
  • Patent number: 5751642
    Abstract: A voltage control circuit is used to control the voltage levels on input and output lines of a semiconductor memory device. A load transistor is controlled by feeding back an output voltage of the input and output lines in order to increase data access speed. The input and output lines are separately controlled by clamp devices that clamp low voltage levels on the input and output lines to voltages between a ground potential and a power supply voltage. The clamping devices are enabled during read operations by feeding back the output data from a sense amplifier coupled to the input and output lines. The sense amplifier senses and amplifies the voltage difference of the input and output lines. The feedback control signal from the sense amplifier eliminates DC current paths while the voltage of the input and output lines are toggled between high and low states. The voltage control circuit increases operation speed and reduces current consumption in the memory device.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: May 12, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jei-hwan Yoo
  • Patent number: 5747974
    Abstract: Internal supply voltage generating circuits generate internal supply voltages at voltage levels below an external supply voltage. The internal supply voltages operate peripheral circuits and array circuits. A reference voltage generates a constant reference voltage. First and second dividing circuits output a given voltage in response to the internal supply voltage. First and second differential amplifiers compare the reference voltage with each of the output voltages from the first and second dividing circuits. First and second driving circuits supply the internal supply voltage from the external supply voltage. First and second voltage boosting circuits clamp output voltage levels for the first and second driving circuits from the external supply voltage and raise the clamped output voltage level of the first driving circuit higher than the clamped output voltage level of the second driving circuit.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: May 5, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jun-Young Jeon
  • Patent number: 5748440
    Abstract: The mountable calculator comprises a calculator body having a rectangular front wall and a substantially flat back wall connected by opposing lateral sides and opposing longitudinal sides. The front wall is positioned over and spaced apart from the back wall to provide a space therebetween. Calculator has a plurality of numeric keys and a plurality of function keys defined on the front wall. To improve use for the visually challenged, the numeric and function keys are sized greater then the fingertip size of an average user. Electronics are disposed within the calculator body and are operatively connected to the numeric and function keys. A display screen for displaying numbers relating to the operation of the calculator is also operatively connected to the electronics. Finally, the calculator can be mounted using first and second lateral wings which integrally formed or separate from the calculator body.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: May 5, 1998
    Inventor: Lyndsy J. Frey
  • Patent number: 5747600
    Abstract: A dehydrated reconstitutable polyacrylamide material for use as a polyacrylamide gel sample in electrophoretic analysis is provided. The dehydrated reconstitutable material includes a stabilizer material and excludes a buffer salt. The dehydrated reconstitutable polyacrylamide material is storable at ambient temperature without substantial loss of potency for at least about 120 days.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: May 5, 1998
    Inventor: Ta-Yun Fang
  • Patent number: 5748531
    Abstract: A common source line control circuit for a semiconductor memory device includes a resistor connected in series with a transistor to reduce the voltage across the transistor, thereby preventing snap back breakdown. The resistor and transistor are connected in series with a second transistor which together form a current path between the bulk region of a memory cell array and a ground node for discharging the bulk region during an erase voltage recovery period. The resistor can be connected between the transistors or between one transistor and the bulk region. A second resistor can be connected in series with the other resistor and the two transistors. The resistance values of the resistors are larger than the channel resistances of the transistors.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: May 5, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byeng-Sun Choi
  • Patent number: 5743510
    Abstract: A mold box for molding concrete products includes a pair of opposed substantially parallel end plates. A pair of opposed substantially parallel mounting brackets are positioned at opposite ends of the end plates and together with the end plates form a substantially rectangular mold box. A corner portion is defined adjacent the juncture of each mounting bracket with each end plate. At least one partition plate extends from one end plate to the other between the mounting brackets. An alignment pin is formed on the mounting bracket at each corner portion and an alignment bore coaxial with the pin is formed on the end plate. The bores are sized and positioned so that when each bore has its associated alignment pin therein the mold box assembly is sufficiently aligned to form molded products.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: April 28, 1998
    Assignee: Columbia Machine
    Inventor: Llewellyn L. Johnston
  • Patent number: 5741183
    Abstract: A system for monitoring and configuring gaming devices interconnected over a high-speed network is disclosed. The system can support a file server, one or more floor controllers, one or more pit terminals, and other terminals all interconnected over the network. Each gaming device includes an electronic module which allows the gaming device to communicate with a floor controller over a current loop network. The electronic module includes a player tracking module and a data communication node. The player tracking module includes a card reader for detecting a player tracking card inserted therein which identifies the player. The data communication node communicates with both the floor controller and the gaming device. The data communication node communicates with the gaming device over a serial interface through which the data communication node transmits reconfiguration commands.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: April 21, 1998
    Assignee: Acres Gaming Inc.
    Inventors: John F. Acres, Alec Ginsburg, David Wiebenson
  • Patent number: 5739476
    Abstract: A printed circuit board laminated without reinforced binder. The invention makes possible reduced board thickness and increased layer count without excessive reduction in the thickness of core material. Laser or plasma drilling can be performed with increased control. Straighter traces, higher trace resolution and higher signal velocity with reduced distortion are made possible.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: April 14, 1998
    Inventor: Chung Namgung
  • Patent number: 5739413
    Abstract: The combination of ambient air, exhaust and premeasured calibration gases is used according to this invention in the analysis of either low or high pollutant concentration gases measured by a single range analyzer. By using ambient air as a diluent and employing its concentration values to generate the Reference Dilution Ratio, DR.sub.ref, iterative calculations are made to find the Raw Sample Concentration value, C.sub.raw. The gas diluting/mixing system includes pressure balanced infeed plumbing legs. Each of the legs feeds to respective flow restrictors and a common, downstream mixing "T" fitting. One leg is interconnected to the high concentration emission gas output from the sampling system and high concentration calibration gas. The other leg is interconnected to the diluent gas source, ambient air.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: April 14, 1998
    Assignee: Envirotest Systems, Inc.
    Inventors: Bruce R. Kohn, Donald W. Bilsbarrow, Pradeep R. Tripathi
  • Patent number: 5739680
    Abstract: The present invention relates to a constant voltage control device for preventing parasitic transistors from operating, which comprises a constant voltage generating section, an undervoltage lock-out section, an operation control section, and a supply voltage control section. According to the present invention, parasitic transistors induced during the operation of a switching transistor made of a lateral transistor are prevented from operating by feedback of a signal derived from the Vref signal output from the constant voltage generating section to the operation control section. Unwanted power consumption by the parasitic transistors is reduced and malfunction resulting therefrom is prevented.
    Type: Grant
    Filed: August 15, 1996
    Date of Patent: April 14, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Sik Lim, Young-Gi Ryou
  • Patent number: 5735459
    Abstract: This invention is directed to a bio-carrier which is non-toxic to most biological agents, will suspend various agents for increased uniformity of delivery, has adjustable adhesive properties which simulates nature, has variability in its adhesives and suspension qualities, it decreases control agent mortality, and it enhances overall effectiveness by allowing more live control agent to reach the target. It does so by depositing, adhering and maintaining the control agent in the active use zone of the target crop.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: April 7, 1998
    Assignee: Smucker Manufacturing, Inc.
    Inventor: Walter K. Kropf
  • Patent number: 5732415
    Abstract: The present invention is an eye protection device adapted to be worn by a canine. The device comprises an eye enclosure element such as a transparent plastic goggle which is adapted to rest snugly against the face of a canine. A pair of side straps extend from opposing sides of the eye enclosure element to connect to a collar adapted to be worn about the neck of the canine. The side straps are length adjustable as by hook and loop attachments, snaps or pawl mechanism and couple to the collar along a selected length of the collar thereby allowing two-dimensional adjustment of the side straps. A preferred embodiment of the invention further includes a pivot element for easily rotating the eye enclosure element away from the eyes of the canine when the invention is not needed. Alternately, the invention can include anti-lift and anti-loss straps for maintaining use of the invention when the wearing animal is using the invention in inclement conditions.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: March 31, 1998
    Inventor: David J. Boyd
  • Patent number: 5733596
    Abstract: A process is provided for continuously applying a substantially uniform and smooth filler of a water-based filler material to underlying wood substrates. The process comprises introducing the underlying wood substrates into a filler application area. Then, the initial temperature of the outer surface of the underlying wood substrates is determined. Prior to applying the water-based filler material, the initial temperature of said water-based filler material is determined. Prior to applying same to said underlying wood substrates, the initial temperature of the water-based filler material is continuously adjusted, based on the initial temperature of the underlying wood substrate, so that the final temperature of the water-based filler material of the outer surface of the underlying substrate is maintained. The water-based filler material is continuously applied to the outer surface of the underlying wood substrates in the filler application area.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: March 31, 1998
    Assignee: Willamette Valley Company
    Inventor: Donald L. Arrington
  • Patent number: 5732029
    Abstract: A test control circuit and method of testing a memory cell in a semiconductor memory device. The test control circuit includes a memory cell array having a plurality of normal memory cells to store data on a semiconductor substrate and a plurality of redundancy memory cells to substitute for defective normal memory cells. Row and column redundancy fuse boxes include fuse elements to be electrically fused to enable row and column redundancy decoders for selecting rows and columns of the redundancy memory cells. A redundancy cell test signal generator generates, in response to a test signal applied to an extra line in the address bus, a master clock for testing the redundancy memory cell under the same mode as a test mode of the normal memory cell. A test controller provides an enable signal for selecting the redundancy memory cells of a memory array in response to logic levels of the master clock and an address signal applied during the redundancy memory cell test.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: March 24, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Kil Lee, Yong-Sik Seok
  • Patent number: 5732032
    Abstract: A burn-in test circuit for a semiconductor memory device tests for defective memory cells. The test circuit applies a test signal that turns "off" transistors in a precharge circuit and applies a select signal to memory cells at predetermined intervals. The select signal and test signal are delayed for different time intervals depending on whether the memory device is transitioning from a normal operating mode to a test mode or from the test mode to the normal operating mode. The selective delay prevents overcurrent conditions from occurring during the mode transitions.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: March 24, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Choul Park, Kook-Hwan Kwon
  • Patent number: 5727580
    Abstract: An apparatus and method for cleaning overhead gutters. The apparatus includes two inverted J-shaped members connected by a hinge at the apex. Each J-shaped member has a scoop depending downwardly from the apex and a handle arm depending downwardly from the apex, the handle arm being longer than the scoop. The J-shaped members are hinged such that rotating the handle arms toward each other causes the scoops to rotate toward each other thereby grasping debris therebetween. The scoops are pliable and ellipsoidal shaped and can have teeth or bristles. The hinge provides fulcrum type leverage for grasping and dislodging debris. The J-shaped members can be snapped into and out of the hinge. The gutter cleaner includes a coupling for connecting the cleaner to a garden hose through a valve. Water is channeled to a scoop where a baffle directs the water into the scoop and under debris to dislodge and consolidate debris.
    Type: Grant
    Filed: May 9, 1996
    Date of Patent: March 17, 1998
    Inventor: John W. Patterson
  • Patent number: 5726939
    Abstract: The time required for testing high-density semiconductor memory devices is reduced by circuits and methodology for rapidly writing test data bits into the memory array. A common word line enable signal is arranged to turn on all of the word lines in the array simultaneously. Test data bits are applied to the array by gating them onto the I/O lines so that separate test bit lines are not required. A fast test enable signal gates the test bits onto the I/O lines in all columns of the array simultaneously, so that all of the memory cells receive test bits at one time. The new circuitry has the further advantages of reduced area and capacitance, the latter further contributing to reducing the test data write time.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: March 10, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-In Cho, Jung-Hwa Lee
  • Patent number: 5725148
    Abstract: In building environmental control, primary HVAC services are supplemented to improve individual user comfort by automatically adjusting lighting levels and airflow direction mix in the individual workspace. An individual terminal unit provides these individualized supplemental services without affecting loading on the primary HVAC system. Multiple individual terminal units disposed in an open, common area communicate with one another and adjust operations in response to neighborhood conditions to improve overall system efficiency and save energy while optimizing individual user comfort.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: March 10, 1998
    Inventor: Thomas B. Hartman
  • Patent number: D391903
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: March 10, 1998
    Assignee: Creative Pipe, Inc.
    Inventor: Mark Pappas
  • Patent number: D393538
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: April 21, 1998
    Assignee: Adidas AG
    Inventor: Guy A. Marshall