Abstract: Level shifting circuits and methods are disclosed. One embodiment provides a high speed level shifting circuit that uses an input signal to generate two intermediate signals and uses the intermediate signals to generate an output signal such that voltage stress on individual devices within the level shifting circuit is minimized. One embodiment includes a first driver and second driver coupled in parallel to provide intermediate signals to an output driver. In a particular aspect, individual transistors of the output driver are subject to voltage stresses that are less than the peak-to-peak amplitude of the output signal. In one embodiment, the first driver includes an n-channel metal oxide semiconductor (“NMOS”) cascode circuit, the second driver includes a p-channel metal oxide semiconductor (“PMOS”) cascode circuit, and the output driver includes a complementary metal oxide conductor (“CMOS”) inverter stage.

Abstract: A clearinghouse authorizes a content provider to use a scrambler to scramble content using a content ID. The content provider provides the scrambled content to a content consumer. If the content consumer has a valid authorization, it can use a content descrambler and the content ID to descramble and access the content. Authorization takes the form of a electronically signed authority message including a device ID and the content ID. The authorization is valid for the content consumer if the device ID matches a corresponding value in the descrambler. The scrambler implements an irreducible scrambling function that can be performed quickly in special-purpose hardware but not on general purpose hardware or software. The scrambler and descrambler can also be used to authenticate the content consumer.