Patents Represented by Attorney Mayer Brown Rowe & Maw LLP
  • Patent number: 7101427
    Abstract: A particulate metal oxide having a mean length of the primary particles in the range from 50 to 90 nm, the mean width of the primary particles in the range from 5 to 20 nm, and the median volume particle diameter of the secondary particles is less than 45 nm. The metal oxide can be used in a sunscreen product that exhibits both effective UV protection and improved transparency.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: September 5, 2006
    Assignee: Imperial Chemical Industries plc
    Inventors: Graham Paul Dransfield, Susan Cutter, Philip Laurence Lyth
  • Patent number: 7102925
    Abstract: A flash memory device including a boot location select signal for selecting location of a boot region is generated by coding it in a CFI block, generated depending on the state of the OTP cell in the protection block, or generated by applying the power supply voltage or the ground voltage as a metal option. The bank select circuit needs not be modified even though location of the boot region is changed. It is thus possible to shorten development time, simplify a verification work and reduce the size of a chip.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: September 5, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyeok Kang
  • Patent number: 7101786
    Abstract: Provided is a method for forming a metal line in a semiconductor device. The method forms round portions at top edges of an insulation film by means of a polymer and then etches the rest portion (i.e., sidewall parts) in an almost vertical direction, which makes it possible to shrink down a width of a patterned insulation film at maximum nevertheless of a dimension of a metal-line patterning mask. By way the method, an interval between adjacent metal lines is extended at maximum, preventing mutual interference between the metal lines.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: September 5, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Jung Lee
  • Patent number: 7098293
    Abstract: A polyesteramide copolymer having a glass transition temperature (Tg) of less than or equal to 0° C., contains at least one hard segment containing at least one amide bond, and at least one soft segment containing at least one ester bond. The soft segment is formed from at least one dimer fatty acid and/or dimer fatty diol and/or equivalent thereof. The copolymer is particularly suitable for use as a hot melt adhesive on low energy surfaces.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: August 29, 2006
    Assignee: Imperial Chemical Industries PLC
    Inventors: Renee Josie Gide Van Schijndel, Jeffrey Thomas Carter, Eric Appleman
  • Patent number: 7099376
    Abstract: A method for parallel type interference cancellation in a CDMA receiver, wherein minimum processing delay time is required while ensuring performance of an interference cancellation device, and space for embedding hardware for implementing the method can be reduced. The method for parallel type interference cancellation in a CDMA receiver, comprising: (a) when an over sample position of a received signal reaches the end of a symbol of a user, completing temporary detecting and recovering the symbol of the user; (b) generating a residual signal by using the recovered signal of the user and received signal state; and (c) detecting symbol information by obtaining an interference cancelled signal by adding the residual signal to the recovered signal of the user.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: August 29, 2006
    Assignee: Electronics and Telecommunications Research Institu
    Inventors: Young Wha Kim, Seong Rag Kim, Sung Ho Cho
  • Patent number: 7099213
    Abstract: The disclosed is a page buffer of a flash memory device. In accordance with the present invention, a latch is controlled through a program verification signal, a latch signal, and latch data in a page buffer during a program verification. As a result, there are many advantages. First, in the event that the program verification is performed after programming once more, a passed cell is not sensed again and maintains its value. Second, it is possible to prevent a problem caused by a sensing operation as well as a verification error due to an external factor. As a result, program operation errors can be prevented.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: August 29, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Gi Seok Ju
  • Patent number: 7098167
    Abstract: A combination comprising a bed of a particulate copper-containing catalyst and, a guard bed of a particulate composition containing a) lead and/or at least one lead compound that reacts with hydrogen chloride and b) a support therefor. The lead compound is preferably lead nitrate. The combination is of particular utility for the low temperature shift reaction wherein carbon monoxide is reacted with steam to produce hydrogen and carbon dioxide.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: August 29, 2006
    Assignee: Johnson Matthey PLC
    Inventor: Michael J Watson
  • Patent number: 7097715
    Abstract: The present invention relates generally to cleaning systems, and more specifically to substrate cleaning systems, such as textile cleaning systems, utilizing an organic cleaning solvent and a pressurized fluid solvent. However, unlike conventional cleaning systems, a conventional drying cycle is not necessary. Particularly, the present invention provides a process for cleaning substrates by cleaning the substrates with an organic solvent in absence of liquid carbon dioxide, and removing the organic solvent from the substrates using a pressurized fluid solvent.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: August 29, 2006
    Assignee: R. R. Street Co. Inc.
    Inventors: Timothy L. Racette, Gene R. Damaso, James E. Schulte
  • Patent number: 7098725
    Abstract: A multi stage voltage pumping circuit includes a plurality of voltage pumping stages each operated by a first clock signal and a second clock signal for raising a voltage level of an inputted voltage; and a plurality of charge storing means each connected to outputs of the plurality of voltage pumping stages respectively except for a last voltage pumping stage in order to store charge, wherein each of the plurality of voltage pumping stages is a cross coupled voltage doubler and an output of a previous voltage pumping stage is connected to an input of a next voltage pumping stage.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: August 29, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong-Uk Lee
  • Patent number: 7099209
    Abstract: A semiconductor memory device, including: a plurality of banks each of which includes a plurality of memory cells, a plurality of redundancy memory cells for replacing a defective memory cell and a repair circuit, having a plurality of fuse sets, for substituting an address to thereby access the redundancy memory cell instead of the defective memory cell; and a common repair circuit, having a plurality of fuse sets, for substituting the address in order to replace the defective memory cell with the redundancy memory cell included in any of the plurality of banks.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: August 29, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang-Hee Kang, Sung-Joo Ha, Ho-Youb Cho
  • Patent number: 7094927
    Abstract: Process for increasing the capacity of a urea plant comprising a compression section, a high-pressure synthesis section, a urea recovery section, in which a urea melt is formed, and optionally a granulation section, the capacity of the urea plant being increased by the additional installation of a melamine plant and the urea melt from the urea recovery section of the urea plant being fed wholly or partly to the melamine plant and the residual gases from the melamine plant being returned wholly or partly to the high-pressure synthesis section and/or the urea recovery section of the urea plant.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: August 22, 2006
    Assignee: DSM IP Assets B.V.
    Inventors: Tjay Tjien Tjioe, Jozef Hubert Meessen
  • Patent number: 7095656
    Abstract: Provided is concerned with a method of erasing a NAND flash memory device, capable of restraining an erasing disturbance fail arising from a deselected cell block and improving a product yield of the device by applying a negative voltage to a well of a high voltage transistor forming an X-decoder during an erasing operation in the NAND flash memory device.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: August 22, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Keun Woo Lee
  • Patent number: 7095057
    Abstract: Provided is a semiconductor laser including a substrate etched into a mesa structure, an active layer, clad layers, a current blocking layer, an etch-stop, an ohmic contact layer, and electrodes, and a method for manufacturing the same, whereby it is possible to improve a ratio of light output to input current by blocking a leakage current flowing outside an active waveguide in a BH laser.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: August 22, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung Ho Song, Chul Wook Lee, Ki Soo Kim, Yong Soon Baek
  • Patent number: 7095814
    Abstract: An apparatus for very high performance space-time array reception processing using chip-level beamforming and fading rate adaptation is disclosed.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: August 22, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Mun Geon Kyeong, Jae Joon Park
  • Patent number: 7095727
    Abstract: A system in an asynchronous mobile communications system and located in a mobile station for determining use of space-time block-coding-based transmit diversity encoding in a base station including transmission antennas, comprises: a cell search unit for detecting frame timing information and scrambling codes of the base station from signals output from the base station; a descrambling unit for descrambling the signals output from the base station using the frame timing information and the scrambling codes; an accumulation processor for despreading the descrambled signals; a depatternization unit for depatternizing the despread signals using pilot symbol patterns corresponding to the two transmission antennas; and an accumulator bank unit for performing accumulation and addition processes of the depatternized signals to output signals corresponding to the transmission antennas.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: August 22, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-Hoon Kim, Kyung Yeol Sohn, KyungHi Chang
  • Patent number: 7093331
    Abstract: The present invention provides a buckle and frame for a restraint system resisting to a harsh environment. The buckle comprising a frame having a base wall, the base wall includes a debris exit opening; and a cover which encloses the frame and forms at least one vent opening and at least one passage which couples the debris exit opening to the vent opening. Debris, dust and other foreign objects which find there way into the buckle are not necessarily trapped but rather are presented with a means of exiting the buckle via the vent opening.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: August 22, 2006
    Assignee: AmSafe Commercial Products, Inc.
    Inventors: Erin Edward Holmberg, Michael James Walton, Timothy Andrew Swann, Agus Suryana The, Jeffrey Philip Baldwin
  • Patent number: 7091303
    Abstract: The invention relates to a method to produce a modified hyperbranched polyesteramide, containing at least two ?-hydroxylamide ester groups and optionally also a hydroxyalkylamide endgroup, wherein (a) a hydroxy-, or aminefunctional monomer, oligomer or polymer is contacted with a first molar excess of a cyclic carboxylic acid anhydride, forming a mixture of an acid functional ester, respectively an acid functional amide and a cyclic carboxylic acid anhydride; (b) the mixture is contacted with an amount of alkanediolamine, wherein the amount is a second molar excess with respect to the first molar excess. The invention further relates to a modified hyperbranched polyesteramide containing at least two ?-hydroxylamide ester groups and optionally also a hydroxyalkylamide endgroup with a degree of polymerisation of more than 19, as well as the use of these polyesteramides as rheology modifier in gas-oil or in diesel.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 15, 2006
    Assignee: DSM IP Assets B.V.
    Inventor: Dirk Muscat
  • Patent number: 7091977
    Abstract: Disclosed is an animation method of deformable objects using an oriented material point and generalized spring model. The animation method comprises the following steps of: modeling a structure of a deformable object into oriented material points and generalized springs; initializing forces and torques acting on the material points, calculating the forces acting on the material points owing to collision of the material points and gravity, calculating the spring forces and torques acting on the material points, obtaining new positions and postures of the material points; updating positions, velocities, postures and angular velocities of the material points based upon physics, and displaying and storing updated results. The oriented material point and generalized spring model of the invention contains the principle of the conventional mass-spring model, but can animate deformable objects or express their structures in more intuitive manner over the conventional mass-spring model.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: August 15, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Il Kwon Jeong, In Ho Lee
  • Patent number: 7091581
    Abstract: A process for fabricating an integrated circuit package includes: selectively etching a leadframe strip to define a die attach pad and at least one row of contact pads; mounting a semiconductor die to one side of the leadframe strip, on the die attach pad; wire bonding the semiconductor die to ones of the contact pads; releasably clamping the leadframe strip in a mold by releasably clamping the contact pads; molding in a molding compound to cover the semiconductor die, the wire bonds and a portion of the contact pads not covered by the clamping; releasing the leadframe strip from the mold; depositing a plurality of external contacts on the one side of the leadframe strip, on the contact pads, such that the external contacts protrude from the molding compound; and singulating to provide the integrated circuit package.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: August 15, 2006
    Assignee: ASAT Limited
    Inventors: Neil McLellan, Geraldine Tsui Yee Lin, Chun Ho Fan, Mohan Kirloskar, Ed A. Varga
  • Patent number: D526846
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: August 22, 2006
    Assignee: Nuc Electronics Co., Ltd.
    Inventor: Jong-Boo Kim