Abstract: Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so
Type:
Grant
Filed:
December 29, 2004
Date of Patent:
May 30, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
Geum-Young Tak, Seok-Bong Hyun, Kyung-Hwan Park, Tae-Young Kang, Seong-Su Park
Abstract: A system and a method for drawing a patent map using a technical field word are disclosed. In the system and the method, a word to be used for drawing a patent map is extracted by calculating weight values of significant words which are gotten by removing unnecessary words from patent data, and this extracted word is matched with a patent to draw the patent map.
Type:
Grant
Filed:
November 29, 2001
Date of Patent:
May 30, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
Jeong Wook Won, Hyoung Bok Lee, Jai Sang Koh
Abstract: The present invention relates to a photo mask and a method of manufacturing the same, and a method of forming a photosensitive film pattern using the photo mask. A photo mask pattern having an exposure region, a phase-inverse region and a photosensitive region is provided. The predetermined size and shape of the patterns on the photo mask are formed. Through this manner, distortions of the photosensitive film pattern upon development are compensated and a target photosensitive film pattern can be more accurately acquired. Furthermore, the depth of focus of a photolithography process can be increased.
Abstract: The present invention provides a method for fabricating a semiconductor device capable of decreasing a parasitic capacitance to thereby increase a cell capacitance. To achieve this effect, the deposited third inter-layer insulation layer is planarized and is subjected to a wet etching process to make its height lower than that of the bit line. Afterwards, the nitride-based etch stop layer is formed on the etched third inter-layer insulation layer, and then, the contact hole for forming the storage node contact plug is formed in between the bit lines through the SAC process so that the etch stop layer does not remain at sidewalls of the bit line. From this structure, it is possible to decrease the parasitic capacitance, and this decrease further provides an effect of increasing the cell capacitance.
Type:
Grant
Filed:
July 11, 2003
Date of Patent:
May 30, 2006
Assignee:
Hynix Semiconductor Inc.
Inventors:
Sung-Kwon Lee, Sang-Ik Kim, Jun-Hyeub Sun
Abstract: The production of ethylenically unsaturated acids or esters by the catalytic reaction of an alkanoic acid or ester, especially methyl propionate, with formaldehyde, and a catalyst therefor wherein the catalyst comprises a porous high surface area silica containing 1–10% by weight of an alkali metal, especially cesium (expressed as a metal) and having compounds of at least one modifier element selected from boron, magnesium, aluminium, zirconium and hafnium dispersed in the pores of said silica in such amount that the catalyst contains a total of 0.25 to 2 gram atoms of primary modifier element per 100 moles of silica.
Type:
Grant
Filed:
January 17, 2003
Date of Patent:
May 30, 2006
Assignee:
Lucite International UK Limited
Inventors:
Samuel David Jackson, David William Johnson, John David Scott, Gordon James Kelly, Brian Peter Williams
Abstract: This apparatus of bidirectional optical recirculation loop transmission enables bidirectional transmission system to be tested in the long transmission distance. Unidirectional optical recirculation loop is composed of two optical modulators and one 4-port optical coupler. Bidirectional optical recirculation loop is composed of four optical switches, one 4-port optical coupler and six optical circulators. Two optical circulators at the entrance (simultaneously exit) of the loop enable transmitted (received) signals to be added (dropped). Four optical circulators enable forward (reverse) signal to bypass the optical switch set for reverse (forward) signal in the inner optical loop. Forward (reverse) signal can be transmitted simultaneously with the reverse (forward) signal without interference. Two independent optical recirculation loops exist on the same fiber link in each direction.
Type:
Grant
Filed:
May 26, 2005
Date of Patent:
May 30, 2006
Assignee:
Electronics and Telecommunications Research Institute
Abstract: In the case of a fuel tank (1) for a motor vehicle having a plurality of surge chambers (6, 6?) for collecting fuel, two surge chambers (6, 6?) are closed in a manner essentially forming a seal and are connected to each other. Fuel conducted by a pressure regulator (12) and by suction jet pumps (16, 16?) into the surge chambers (6, 6?) is distributed to the surge chambers (6, 6?) as required. When the surge chambers (6, 6?) are completely filled, a pressure is produced, as a result of which a further filling by the suction jet pumps (16, 16?) is avoided.
Abstract: A method of manufacturing a flash memory device by carrying out the process of shallow trench isolation (STI) in a memory cell region, so that it decreases an aspect ratio of pattern by forming a field isolation film so as to reduce gap-filling defects due to high density plasma (HDP) and to prevent the smiling effect at a tunnel oxide film so as to improve a programming speed of the flash memory device. The method also conducts the process of self-aligned shallow trench isolation (SA-STI) in a peripheral circuit region by forming a field isolation film, so that it prevents degradation in the characteristics of high and low voltage gate oxide films.
Abstract: A modulator phase shift keying modulator for performing data modulation by using the phase difference of each I/Q channel, comprising a data shifter for controlling delay of I/Q channel digital data at input terminals of the I/Q channels.
Abstract: In an apparatus for a TFCI mapping in a wireless communication mobile station, and a method thereof, the apparatus includes an encoding unit for encoding a TFCI transmitted from a main control unit as a CPU; a TFCI mapping unit for generating necessary control parameter and a TFCI code by using a signal encoded by the encoding unit and a signal transmitted from the CPU; and a CPU for controlling the encoding unit and the mapping unit.
Type:
Grant
Filed:
October 23, 2001
Date of Patent:
May 30, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
In Gi Lim, Hyung-Il Park, Kyung Soo Kim, Han Jin Cho
Abstract: Systems and methods are provided for performing the required phase calculation in a telecommunications system in order to optimize system performance more quickly and with reduced complexity as compared to prior approaches to solving this problem. In accordance with the preferred exemplary embodiment of the present invention, the phase delay of the precursor EQ is utilized for estimating the entire DFE phase shift by calculating the estimation exclusively based on an output of the precursor EQ this estimation is then used for adjusting the timing phase based on the phase estimation.
Abstract: A process for fabricating a leadless plastic chip carrier includes selectively etching at least a first surface of a leadframe strip to partially define at least a plurality of contact pads and a die attach pad; selectively plating at least one layer of metal on a second surface of the leadframe strip, on an undersurface of at least the plurality of contact pads and the die attach pad; mounting a semiconductor die on the first surface, on the partially defined die attach pad; wire bonding the semiconductor die to ones of the contact pads; encapsulating the wire bonds and the semiconductor die in a molding material such that the molding material covers a first portion of the die attach pad and first portions of the contact pads; selectively etching a second surface of the leadframe strip to define a second portion of the contact pads and a second portion of the die attach pad by etching the second surface with the at least one layer of metal resisting etching; and singulating the leadless plastic chip carrier
Type:
Grant
Filed:
January 28, 2004
Date of Patent:
May 23, 2006
Assignee:
ASAT Ltd.
Inventors:
Chun Ho Fan, Wing Him Lau, Kenneth Kwan, Janet Wong
Abstract: A fuel tank for a motor vehicle having a chamber delimited by a wall and having an activated carbon filter located to ventilate the volume of the fuel chamber located above the level of fuel in the tank.
Abstract: In a venting device for a fuel tank (1), a venting line (5) has a movable section (6) and a spring element (14). The free end of the venting line (5) is prestressed against an upper wall of the fuel tank (1). This ensures that a valve (7) which is arranged at the free end of the venting line (5) is always arranged in the vicinity of the upper wall of the fuel tank (1).
Abstract: A 4-state bar code printing and reading system for use in physical distribution-related services such as mail pieces, receptacles, reception and management forms or the like, and a method for controlling the system are disclosed.
Type:
Grant
Filed:
December 17, 2001
Date of Patent:
May 23, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
Moon Sung Park, Jae Gwan Song, Jae Gak Hwang, Yun Seok Nam, Hye Kyu Kim, Chee Hang Park
Abstract: An automated system and/or method is disclosed for rapidly, accurately, and efficiently processing bulk three-dimensional digital image data of both path/corridor and area scenes to discriminate different structures or classifications of objects from within the image. The method first decomposes the three-dimensional digital imagery coordinate points into simple local structures and then extracts the globally complex structures from the local structures. The system and/or method incorporates procedures for sub-dividing the three-dimensional image data into rectilinear and/or ellipsoidal finite element cells, mathematically analyzing the contents (point coordinates) of each individual cell to classify/define the local structure, and extracting the globally complex structure or object from the image.
Type:
Grant
Filed:
August 29, 2003
Date of Patent:
May 16, 2006
Assignee:
Aerotec, LLC
Inventors:
James W. Dow, Thomas Corbitt, Robert A. McLaughlin
Abstract: A security system and method for monitoring a security status of fixed and mobile assets. The security system comprises an agent connected with the asset. The agent monitors a security of the asset and transmits the data to a master control unit. The master control unit retransmits the security status to a global operations center for processing the security status to detect a security threat. In response to a security threat, the global operations center generates an output. Periodic reports are generated and transmitted to the customer, and the customer is billed at intervals. For mobile assets, the security system also tracks a location of the asset as the asset is transported between a shipper's loading dock and a designated distribution center, including an origination port and a destination port. For fixed agents, the security system includes an interface for interfacing an existing security device to the master control unit and for controlling the existing security system.
Abstract: Provided is a method for manufacturing a planar buried semiconductor optical amplifier in which a spot size converter with a double-core structure is integrated, comprising the steps of: after growing a lower cladding layer, a lower waveguide layer and an upper cladding layer on a substrate, patterning a portion of thickness of the lower cladding layer, the lower waveguide layer and the upper cladding layer through an etching process using a dielectric layer pattern to form a lower waveguide; growing a planarization layer on the etched portions of the lower cladding layer, the lower waveguide layer and the upper cladding layer to smooth a surface; after removing the dielectric layer pattern, growing a space layer, an upper waveguide layer and a first cladding layer on the overall upper surface; patterning the first cladding layer, the upper waveguide layer and the space layer through the etching process using the dielectric layer pattern to form an upper waveguide having a horizontal taper area; after growing
Type:
Grant
Filed:
May 13, 2004
Date of Patent:
May 16, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
Dong Hun Lee, Eun Deok Sim, Ki Soo Kim, Moon Ho Park
Abstract: The invention relates to a method for contacting molten urea with a gas stream that contains ammonia and/or carbon dioxide, in which use is made of an additional stream the temperature of which differs from the temperature of the molten urea and/or the gas stream. The additional stream preferably contains ammonia. The method is preferably part of a process for the preparation of melamine.
Type:
Grant
Filed:
June 6, 2002
Date of Patent:
May 16, 2006
Assignee:
DSM IP Assets B.V.
Inventors:
Tjay Tjien Tjioe, Henricus Antonius Maria Duisters
Abstract: The present invention relates to a memory device; and, more particularly, to a cell array of a nonvolatile ferroelectric memory device and an apparatus and a method for driving such a cell array.