Abstract: An image obtainment apparatus images an observation target to obtain an ordinary image by illuminating the observation target with illumination light and by receiving, at an imaging device, reflection light reflected from the observation target. Further, the apparatus generates spectral estimation image signals of a predetermined wavelength by performing spectral image processing on image signals output from the imaging device. A spectral image processing unit generates spectral estimation image signals of a specific wavelength related to an agent administered to the observation target, as spectral estimation image signals for obtaining luminance information, based on the image signals output from the imaging device. Further, a luminance information obtainment unit obtains luminance information about each of the spectral estimation image signals for obtaining luminance information that have been generated at a predetermined time interval, and obtains a rate of change in the luminance information.

Abstract: A method of fabricating a semiconductor device, including forming a circuit block in a peripheral edge portion of a semiconductor chip, forming a circuit block pad on the circuit block to provide an electrical interface for the circuit block, and forming a bonding pad laterally offset from the circuit block and the circuit block pad, the bonding pad being electrically connected to the circuit block pad and providing a bonding wire pad for the circuit block.

Abstract: A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion 20 which is provided in low melting point metal 15 for electrically connecting mutually joined wafers 61 and 62, and which defines an interval between mutually joined wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted. A joining structure of wafers 61 and 62 is manufactured by using wafers 61 and 62, at least one of which has protrusion 20. In the manufactured joining structure of wafers 61 and 62, wafers 61 and 62 are electrically connected to each other by low melting point metal 15, and protrusion 20, which defines the interval between wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted, is provided in low melting point metal 15.

Abstract: A semiconductor device (100) includes: a substrate (102); a bonding pad (110) provided above the substrate (102); and an inductor (112) provided above the substrate (102) and below the bonding pad (110) for carrying out signal transmission/reception to/from the external in a non-contact manner by electromagnetic induction.

Abstract: A semiconductor device includes an electrode pad provided on a semiconductor chip, in which the electrode pad includes aluminum (Al) as a major constituent and further including copper (Cu), a coupling ball primarily including Cu, the coupling ball is coupled to the electrode pad such that a plurality of layers of Cu and Al alloys are formed at a junction between the electrode pad and the coupling ball, and an encapsulating resin including a halogen of less than or equal to 1000 ppm, the encapsulating resin covering at least the electrode pad and the junction between the electrode pad and the coupling ball. A dimensional area of the plurality of layers of Cu and Al alloys is equal to or larger than 50% of a dimensional area of the junction between the electrode pad and the coupling ball. The plurality of layers of Cu and Al alloys includes a CuAl2 layer, a CuAl layer formed on the CuAl2 layer, and a layer including one of Cu9Al4 and Cu3Al2 formed on the CuAl layer.

Abstract: A method is provided for operating a display apparatus in which one source output of a source driver is connected with first to N-th data lines through first to N-th time division switches, which method includes: driving a first pixel positioned in a first horizontal line and connected with one of the first to N-th data lines, by feeding a first drive voltage to the one of the first to N-th data lines from the one source output with associated one of the first to N-th time division switches; and driving a second pixel positioned in a second horizontal line next to the first horizontal line and connected with the one of the first to N-th data lines, by feeding a second drive voltage to the one of the first to N-th data lines from the source output with associated one of the first to N-th time division switches. The associated one time division switch is kept turned on during a time period from a start time of the driving the first pixel to a start time of the driving the second pixel.

Abstract: In a wideband communication system including a transmitter and a plurality of mobile terminals (MT) that have maximum reception bandwidths, respectively, a Shared Control Channel (SCCH) for each MT is mapped so that physical channel symbols from the corresponding Physical Shared Control Channels (PSCCH) are confined to a block of consecutive sub-carriers defined by a smallest one of the maximum reception bandwidths.

Abstract: A pull-down detection apparatus includes a pixel comparator at least performing pixel comparison between a subsequent field and a present field to determine a presence of a pixel change between the subsequent field and the present field, a field comparator compiles a determination result in the pixel comparator by dividing the result according to pixel location in the fields and determining a presence of an image change between the subsequent field and the present field based on the divided compiled determination result, and a pull-down determinater determining that the input video signal is generated by pull-down processing based on a history of a determination result in the field comparator.

Abstract: [Subject] In a distributed authentication system, if a terminal including a plurality of communication devices changes a communication device to another communication device during using a service, the service under use can be used in succession, and the number of times for execution by the user can reduced. [Solving Means] An authentication-information management unit (5) registers authentication information of the user authenticated by each authentication unit (4), and allows sharing of said authentication information. A session-information management device (24) of a service providing unit (2) manages session information including a session identifier of a session established between the same and the terminal unit (3). More specifically, the service providing unit 2 performs individualized management of sessions established between the same and the terminal unit (3).

Abstract: A semiconductor device includes plural core chips and an interface chip that controls the plural core chips. Each of the plural core chips includes a layer address generating circuit that generates a second chip address by incrementing a value of a first chip address and a layer address comparing circuit that compares a third chip address supplied from the interface chip and the second chip address, and activates a chip selection signal when the third chip address and the second chip address are matched with each other. When a non-used chip signal is in an inactivated state, the layer address generating circuit supplies the second chip address to another core chip, and when the non-used chip signal is in an activated state, the layer address generating circuit supplies the first chip address to another core chip without a change.

Abstract: Device isolation regions for isolating a device forming region are formed over a substrate. Subsequently, a gate insulation film is formed over the device forming region. Then, a lower gate electrode film comprised of a metal nitride film is formed over the gate insulation film. Further, a heat treatment is performed to the lower gate electrode film and then an upper gate electrode film is formed over the lower gate electrode film.

Abstract: The semiconductor device may include, but is not limited to, a first switching circuit, a second switching circuit, and a control circuit. The first switching circuit switches between first and second states. The second switching circuit switches between the first and second states. The second switching circuit reduces a first power impedance across the first switching circuit. The control circuit is coupled to the first and second switching circuits. The control circuit keeps the first switching circuit in the first state. The control circuit switches the second switching circuit from the second state to the first state.

Abstract: A data line driving circuit for a display panel includes a plurality of output circuits, a bias circuit, and a plurality of switches. Each of the plurality of output circuits includes an electric current source which supplies electric current in response to a bias signal, and supplies a data voltage by using the electric current to a corresponding one of a plurality of data lines arranged in the display panel. The bias circuit generates the bias signal, and supplies the bias signal to the plurality of output circuits through bias wirings. The plurality of switches is provided between the bias circuit and the plurality of output circuits, and cuts off the bias wirings in response to a control signal.

Abstract: A battery voltage monitoring apparatus monitoring an assembled battery voltage, the assembled battery including a plurality of battery cells, includes a voltage sensor detecting potential of the plurality of battery cells; an output logic circuit outputting a potential detect signal based on an output of the voltage sensor, the potential detect signal representing that abnormal potential is detected; and a delay circuit adding certain delay to the output of the voltage sensor and outputting the delayed voltage detect signal to the output logic circuit; wherein, the voltage sensor comprises at least one comparator having hysteresis characteristic, and detects the potential of the battery cell based on an output of the comparator.

Abstract: Provided is an echo canceller capable of realizing an excellent echo cancellation performance even in a double talk state. An echo canceller (10) comprises: an adaptive filter (20); a subtractor (30); and an error signal generating circuit (40). The adaptive filter (20) synthesizes a spurious echo signal (y?(k)) from a receiving signal (x(k)) before being delivered from a speaker (3). The subtractor (30) subtracts the spurious echo signal (y?(k)) from an input signal (yin(k)) received by a microphone (2) so as to generate an echo cancellation signal (p(k)) The error signal generating circuit (40) generates an error signal (s(k?1)) by removing a spurious voice signal (r(k?1)) corresponding to a voice signal (v(k)) of a talker from the echo cancellation signal (p(k)). The adaptive filter (20) updates a characteristic of the adaptive filter (20) so that an amplitude of the error signal (s(k?1)) becomes smaller.

Abstract: A data processor includes a flash memory that stores a plurality of types of data therein, a random access memory that stores record data information therein, and a controller that can access the flash memory and the RAM. The record data information indicates a head address in the flash memory and a data length corresponding to latest data of each of the plurality of types of data. The controller reads, from the flash memory, the latest data of a type of a reading target among the plurality of types of data, with reference to the record data information.

Abstract: A method for producing a Group III nitride semiconductor light-emitting device with a face-up configuration including a p-type layer and a transparent electrode composed of ITO is provided in which a p-pad electrode on the transparent electrode and an n-electrode on an n-type layer are simultaneously formed. The p-pad electrode and the n-electrode are composed of Ni/Au. The resultant structure is heat treated at 570° C. and good contact can be established in the p-pad electrode and the n-electrode. The heat treatment also provides a region in the transparent electrode immediately below the p-pad electrode, the region and the p-type layer having a higher contact resistance than that of the other region of the transparent electrode and the p-type layer. Thus, a region of an active layer below the provided region does not emit light and hence the light-emitting efficiency of the light-emitting device can be increased.

Abstract: A method and structure for pricing a good or service to a customer includes a calculator that executes a pricing model that includes a dimension of a utility of the good or service to the customer.

Abstract: A semiconductor device includes an electric fuse formed on a substrate. The electric fuse includes: a first interconnect formed on one end side thereof; a second interconnect formed in a layer different from a layer in which the first interconnect is formed; a first via provided in contact with the first interconnect and the second interconnect to connect those interconnects; a third interconnect formed on another end side thereof, the third interconnect being formed in the same layer in which the first interconnect is formed, as being separated from the first interconnect; and a second via provided in contact with the third interconnect and the second interconnect to connect those interconnects, the second via being lower in resistance than the first via. The electric fuse is disconnected by a flowing-out portion to be formed of a conductive material forming the electric fuse which flows outwardly during disconnection.

Abstract: A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other.