Abstract: A rate control algorithm for an MPEG-2 compliant encoder is described. The rate control algorithm has embodiments useful for constant bit rate and variable bit rate encoding. In particular, the invention relates to fade detection.

Abstract: A method and system are disclosed for scheduling the assignment and writing of cells from cell sources into a outgoing bitstream transmitted from each device of an ATM communications network. The timeslots are organized into fixed length cycles which cycles each have a sequence of N timeslots, where N is an integer >1. Furthermore, each cycle is divided into at least one round comprising a variable length subsequence of the timeslots of the cycle. During each timeslot of a uniform timeslot clock, at least one subset of the sources is identified. Each subset corresponds to a round. One cell from each subset is assigned to, and written into, a respective timeslot of the corresponding round. During each timeslot of the timeslot clock, each of the sources is assigned a priority state depending on how many cells of that source have been previously assigned to timeslots during the current cycle and whether or not that source has a cell available for assignment to a round during that timeslot.

Abstract: A device for filtering a fluid, particularly a molten plastic, with a fluid-supplying canal and a fluid-draining canal is described, whereby two plate-like filters are movably arranged in and across the flow direction of the fluid to be filtered between the fluid-supplying canal and the fluid-draining canal. Hereby the fluid-supplying canal (4) is connected with the fluid-draining canal (5) by a single connecting canal (6).

Abstract: An antenna is disclosed with a first Z-shaped strip resonant element disposed in a first plane. The first strip resonant element has first and second identical sized and shaped, parallel, longitudinal strip segments. The first strip resonant element also has a third segment which connects diagonally opposite ends of the first and second strip segments. The antenna also has a second Z-shaped strip resonant element disposed in a second plane that is parallel to the first plane. The second strip resonant element has fourth and fifth identical sized and shaped, parallel longitudinal strip segments. The second strip resonant element also has a sixth segment, having identical dimensions and an identical shape as the third segment, which connects diagonally opposite ends of the fourth and fifth segments. The second Z-shaped strip resonant element is disposed in the second plane so that the sixth segment overlies said third segment and so that said first, second, fourth and fifth segments overlie a rectangle.

Abstract: A compressed gas system comprises a pressure generator and a consuming installation, a gas drier disposed between the pressure generator and the consuming installation, and an in-flow line connecting the pressure generator to the gas drier. Desirably, an out-flow line connects the gas drier to the consuming installation. A by-pass line also connects the pressure generator to the gas drier in parallel to the in-flow line. The by-pass line includes a pressure-controlled blocking device, such as a check valve, which allows the passage of gas from the pressure generator to the gas drier only when a predetermined opening pressure has been reached.

Abstract: A medium-access protocol is disclosed for use in a communication network to provide a two-way broadband communication network.

Abstract: A process for forming a lightly-doped drain (LDD) structure in a MOSFET or other semiconductor device. A first polysilicon layer is deposited over a thin gate oxide layer formed on a substrate. The first polysilicon layer is etched to form a first gate region. The substrate is then doped adjacent the gate region to form a drain region having a relatively low impurity concentration. The first polysilicon gate region is removed and a second polysilicon layer is applied to the substrate. The second layer is etched to form a second gate region which will serve as the actual gate region for the MOSFET device. The drain region is then doped a second time to form an LDD structure in which a portion of the drain region underlying the second gate region remains lightly doped while another portion of the drain region exposed to the second doping becomes more heavily doped. The difference in length between the first and second gate regions is used to set the gate/drain overlapped length.

Abstract: A process for preparing simvastatin from lovastatin or mevinolinic acid in salt form comprises treating either starting material with cyclopropyl or butyl amine, the pyranone ring thereby being opened when lovastatin is the starting material, adding a methyl group to the 2-methylbutyrate side chain, and thereafter closing the open pyranone ring to produce simvastatin. The process is performed without protecting and deprotecting the two hydroxy groups of the open pyranone ring. In a preferred embodiment, the starting material is treated with cyclopropyl amine which produces simvastatin via the novel intermediate lovastatin cyclopropyl amide.

Abstract: A process for preparing simvastatin from lovastatin or mevinolinic acid in salt form comprises treating either starting material with cyclopropyl or butyl amine, the pyranone ring thereby being opened when lovastatin is the starting material, adding a methyl group to the 2-methylbutyrate side chain, and thereafter closing the open pyranone ring to produce simvastatin. The process is performed without protecting and deprotecting the two hydroxy groups of the open pyranone ring. In a preferred embodiment, the starting material is treated with cyclopropyl amine which produces simvastatin via the novel intermediate lovastatin cyclopropyl amide.

Abstract: A process for producing a partially transparent, visually discernible surface pattern with surface elements which diffusely scatter, reflect or diffract light incident on the surface pattern commences with a base foil which may include a carrier foil and a lacquer layer, and also an intermediate layer between these two layers to provide for good adhesion. Before or after application of the microscopically fine relief structures in the lacquer layer, the free surface thereof is covered over its entire area with a reflection layer. A printed image is then printed with an etching agent for the reflective material on the reflection layer in such a way that, at surface portions corresponding to the printed image, the reflection layer is removed and the surface of the lacquer layer is exposed again.

Abstract: A process for depositing a layer of uniform thickness on an uneven surface of a substrate is disclosed. The layer could be deposited by plasma or chemical vapor deposition (CVD). The uneven surface of the substrate has horizontal surfaces and vertical sidewalls and is located on a movable platform. The platform is tilted and rotated as the layer is deposited so that the ions or the flow of chemical vapor reaches the horizontal surface and the sidewall at a similar incident angle. Thereby, the layer is evenly deposited and has a uniform thickness with proper coverage and planarization.

Abstract: A housing for an electrical component which protects the electrical component sealed therein and reduces mechanical stress on the electrical component includes two housing sections which are connected to each other, a support for the electrical component located within the housing, and attachment connections for mounting the housing on a mounting point, e.g., of a motor vehicle chassis. To reduce the mechanical stress imposed upon the electrical component, and to obtain a good seal of the housing interior against dirt, etc., the two housing sections are connected to each other directly or via an intermediate piece. The housing interior is sealed by one or two seals, made from elastically or plastically deformable material, which are located between the faces of the support and the housing sections associated with them. The attachment connections are located on one of the two housing sections.

Abstract: A continuous kneading machine for doughs comprises a tub-shaped container, open at the top, which contains at least one pair of identical synchronously counterrotating kneading shafts. A series of U-shaped bracket components are attached to each kneading shaft longitudinally. The U-shaped bracket components are angularly offset relative to each other around the shaft circumference, with each bracket component being inclined in the direction of motion, such that the bracket components form a helical profile along the kneading shaft. A "manual" type of kneading is achieved due to the shearing off, pulling apart, and pressing together actions of the inventive shaft and bracket configuration.

Abstract: A process for the production of grain oriented magnetic steel sheets having improved remagnetization losses consisting essentially of (in % by weight) more than 0.005% to 0.10% C, 2.5 to 6.5% Si, 0.03 to 0.15% Mn, 0.010 to 0.050% S, 0.010 to 0.035% Al, 0.0045 to 0.0120% N, and 0.020 to 0.300% Cu, and up to 0.15% Sn, the balance being iron and inevitable impurities. The process includes continuous casting or strip casting slabs with the above composition.

Abstract: An austenitic carbide-strengthened nickel/chromium/iron foregeable alloy comprises (in % by weight) 0.2 to 0.4% carbon, 25 to 30% chromium, 8 to 11% iron, more than 2.4 to 3.0% aluminum, 0.01 to 0.15% yttrium, 0.01 to 0.20% titanium, 0.01 to 0.20% niobium, 0.01 to 0.10% zirconium, 0.001 to 0.015% magnesium, 0.001 to 0.010% calcium, max 0.030% nitrogen, max 0.50% silicon, max 0.25% manganese, max 0.020% phosphorus, max 0.010% sulfur, balance nickel and unavoidable melting conditioned impurities. The quantity of precipitable carbon C* is in the range 0.083% to 0.300%, where C*=C.sub.tot. -(C.sub.diss. +C.sub.fix.Ti +C.sub.fix.Nb +C.sub.fix.Zr).

Abstract: A low power consumption oscillator circuit is provided with an oscillator. The oscillator responds to a voltage by producing an oscillating signal at its output having an amplitude that depends on the level of the voltage. Furthermore, the low power consumption oscillator circuit has a level shifter. Illustratively, according to one embodiment, the level shifter includes a pull-up driver and a pull-down driver connected in parallel between the oscillator output and an output of the level shifter. The pull-up driver is configured so as to refrain from conducting current between a biasing input of the pull-up driver and the level shifter output simultaneously with the pull-down driver when the oscillating signal exceeds a certain voltage level. The level shifter illustratively includes an intrinsic PMOS device.

Abstract: An apparatus and method for blending pixels of a source object and a destination plane of view of 3-D space. The source object overlaps the destination plane of view. Furthermore, the 3-D space may contain an atmospheric light diffusion, i.e., fog or smoke, which produces a "fog effect." The apparatus includes multiplexer circuitry which receives first, second, third, fourth and fifth control signals. The multiplexer circuitry also receives a fog blend factor, a source alpha, a destination alpha, a source color, a destination color, a fog color and one. In response to the control signals, the multiplexer circuitry selects three outputs. In particular, in response to the first, second and third control signals, the multiplexer selects as the first output, either: the destination alpha, the source alpha, the fog blend factor, one, the destination color, or one minus one of the aforementioned choices.

Abstract: A method for operating a disk storage system, comprising a disk and forming part of a communications network, simultaneously maintains the continuity of a plurality of data streams. Typically, each stream transfers video data to or from the disk storage system. Illustratively, each of the data streams is produced in the network at a rate of W.sub.base bits/sec and consumed by the disk storage system or produced by said disk storage system and consumed in the network at a rate of W.sub.base bits/sec. One I/O transaction is performed for each stream in each of a plurality of I/O cycles of duration S/W.sub.base, wherein in each I/O transaction a segment of S bits is retrieved from or stored in the disk. The number of streams whose continuity can be maintained in this manner is limited by the number of I/O's which can be performed in a cycle of duration S/W.sub.base. More generally, when a stream has a bit rate (A/B)W.sub.

Abstract: A method and system are provided for drawing one or more surfaces. The system includes a drawing processor, a frame buffer with z buffer and a display device, such as a display monitor. The drawing processor can perform all of the following steps. A first pixel in a first row is selected. The first pixel is near a first point at which a projection onto a plane of view of a first edge of a first surface intersects the first row of pixels in the plane of view. A first distance from the first point to a second point on the first surface is determined. The first point is a projection onto the plane of view of the second point. The first distance is then corrected by a first value representing a difference in distance between the first distance and a distance from the first pixel to a third point on the first surface. The first pixel overlies, e.g., and is centered at, a point that is a projection onto the plane of view of the third point.

Abstract: In a circuit at least one of the signals (u?t! or i?t!) is transmitted to a signal input of a sigma-delta modulator operated at a first clock frequency (1/T.sub.S) the output of which is connected to at least one of two signal inputs of a multiplication/addition element (3). The arrangement is used for example in electricity counters and makes it possible to calculate sums of products by means of simple shift and algebraic adding operations while maintaining closely the precision achievable with a classic multiplication. The arrangement is especially advantageous if the multiplications are done on a semiconductor chip.