Patents Represented by Law Firm Meltzer, Lippe, Goldstein, Wolf & Schlissel, P.C.
  • Patent number: 5741517
    Abstract: An aqueous liposome system which contains at least one phospholipid and selectively a non-toxic organic solvent. In addition to the at least one phospholipid the liposome system contains at least one phospholipidic charge carrier.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: April 21, 1998
    Assignee: A. Nattermann & Cie GmbH
    Inventors: Jorg Hager, Manfred Durr, Ernst Lunebach
  • Patent number: 5740344
    Abstract: A process and apparatus are disclosed for obtaining a texture color value C.sub.r for an object surface point from two texture color values C.sub.ri and C.sub.rj (which themselves may be interpolated texture color values), of texture data points C.sub.i and C.sub.j, respectively. The object surface point is a distance W from the texture data point C.sub.i and a distance 1-W from the object surface point C.sub.j, where W is an n-bit value. The process includes the steps of multiplying each of the texture colors C.sub.ri and C.sub.rj by each integer from 0 to 2.sup.n-1 to produce 2.sup.n -1 products for each color. The product of C.sub.ri with 2.sup.n-1 -W' and the product of C.sub.rj with W' are selected from these produced products, where W' is the rounded product of W and 2.sup.n-1. The two selected products are added together to produce the sum (2.sup.n-1 -W').multidot.C.sub.ri +W'.multidot.C.sub.rj, and the sum thus produced is divided by 2.sup.n-1 to produce the interpolated color.
    Type: Grant
    Filed: February 8, 1996
    Date of Patent: April 14, 1998
    Assignee: ITRI-Industrial Technology Research Institute
    Inventors: Yu-Ming Lin, Chun-Kai Huang, Wei-Kuo Chia
  • Patent number: 5735586
    Abstract: A cabinet structure includes a parallelepiped frame having a top side, a bottom side, a front side, a rear side and two opposite lateral sides. A drawer is provided on the upper portion of the frame, having a front panel comprised of four boards overlapping each other and releasably secured together by means of a bolt. Two L-shaped door panels are respectively hinged to two opposite sides of the frame to openably cover the front side. By opening the two door panels to be opposite to each other and un-folding the boards of the front panel of the drawer to have the boards supported on the L-shaped door panels, a stair-like platform ladder is formed with the top side of the cabinet serving as the platform. A safety rack is provided on the platform and is collapsible into a channel formed inside the cabinet so as to be selectively expanded when the cabinet is converted into the platform ladder.
    Type: Grant
    Filed: April 3, 1997
    Date of Patent: April 7, 1998
    Inventor: Nan-Shan Cheng
  • Patent number: 5736848
    Abstract: A system for measuring the energy output from one or more electrical energy sources first makes an analog power measurement, and converts the resultant output into digital form. The A/D converter includes a sigma-delta modulator in series with a digital filter. Then, the output from the A/D converter is inputted to a digital quantizer via a serial interface. A programmable calibration value is also inputted into the digital quantizer from a computer via a non-volatile memory, such that the operating level/calibration of the digital quantizer is controllable by the computer.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: April 7, 1998
    Assignee: Landis & Gyr Technology Innovation AG
    Inventors: Jacob De Vries, Jan Petr, Raul Cermeno, Peter Hodel
  • Patent number: 5729124
    Abstract: A method of frequency estimation is disclosed which uses a Fast Walsh Transform (FWT) in place of a conventional Fast Fourier Transform (FFT) technique. The inventive method is based on a linear relationship between the unknown signal frequency and the sequency of a Walsh function which corresponds to the sample of the FWT with maximum absolute value. The resulting discrete data is smoothed mathematically by a sequency interpolation process, which improves resolution and accuracy. The disclosed FWT method provides greater speed and simpler implementation than the prior FFT technique, since the FWT method follows one simple repetitive data flow pattern (additions only), while the FFT technique follows more complicated butterfly patterns (multiplications and additions).
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: March 17, 1998
    Assignee: Industrial Technology Research Institute
    Inventor: Chun-Chian Lu
  • Patent number: 5717464
    Abstract: Successive frames in a video sequence are encoded by a video encoder. The bits are apportioned among successive frames to maximize overall perceived video quality when the encoded video sequence is decoded and displayed. The ongoing allocation process is constrained by the need to avoid decoder buffer exception, i.e., buffer underflow and overflow conditions, at the decoder.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: February 10, 1998
    Assignee: Divicom, Inc.
    Inventors: Michael Perkins, David Arnstein
  • Patent number: 5714115
    Abstract: The invention relates to an austenitic steel alloy which is corrosion-resistant, tough, non-magnetic and compatible with the skin. The invention also relates to a process for the production of said steel alloy and to uses thereof. The characterizing feature of the invention is a steel containing up to 0.3% C, 2 to 26% Mn, 11 to 24% Cr, more than 2.5 to 10% Mo, 0 to 8% W, more than 0.55 to 1.2% N, up to max 0.5% Ni and max 2 % Si, balance iron.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: February 3, 1998
    Assignee: VSG Energie-und Schmiedetechnik GmbH
    Inventors: Markus O. Speidel, Peter J. Uggowitzer, Gerald Stein, Joachim Menzel
  • Patent number: 5714213
    Abstract: A security element for the authentication of a substrate has a pattern comprising optical diffraction elements which are embossed in a carrier material of plastic material and unembossed neutral areas. On the embossing side of the carrier material a reflecting layer covers only surfaces with relief structures of the diffraction elements while the neutral areas which lie between are free of the reflecting layer and are therefore non-reflecting. If the security element is stuck in the form of a stamp onto the substrate and the carrier material is transparent, image portions, which are covered by the stamp, of a feature on the substrate can be discerned through the neutral areas.
    Type: Grant
    Filed: April 12, 1994
    Date of Patent: February 3, 1998
    Assignee: Landis & Gyr Betriebs AG
    Inventors: Gregor Antes, Walter Trachslin
  • Patent number: 5713874
    Abstract: A camouflaged injection needle is disclosed including a shaft, a flexible ellipsoid tip at one end of the shaft and a sharp needle tip positioned within the flexible tip and axially aligned with the shaft. The sharp needle tip is capable of piercing through the flexible tip and into an outer human tissue when the flexible tip is positioned on the outer human tissue and the shaft is urged in the direction of the outer human tissue. The injection needle is camouflaged to resemble a cotton swab. This reduces pre-injection anxiety of the patient.
    Type: Grant
    Filed: August 1, 1995
    Date of Patent: February 3, 1998
    Assignee: Kind-R-Ject Company, LLC
    Inventor: Jack Richard Ferber
  • Patent number: 5709694
    Abstract: An endoscopic intracorporeal suture tying aid allows a suture to be looped around itself multiple times and cinched, enabling a throw of a surgeon's knot to be easily made. The tying aid includes a needle holder connected to a proximal end of a shaft for releasably holding a needle; a hook that slides longitudinally with respect to the beaks; and the shaft being axially rotatable with respect to the hook.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: January 20, 1998
    Assignees: Human Factors Industrial Design, Inc., Greenberg Surgical Technologies, LLC
    Inventors: Alex M. Greenberg, Douglas M. Spranger, Paul J. Mulhauser, Mark C. Newby
  • Patent number: 5708756
    Abstract: A digital speech encoder and decoder have particular application to the field of 16 kbps digital communications. In the encoder, a speech signal is processed by a perceptual weighting filter, using a reconstructed speech signal, a reconstructed residual signal, and a set of filter tuning coefficients. A predictive signal, which is generated by a Short Term Predictive (STP) circuit, is subtracted from the signal outputted from the perceptual weighting filter. The difference signal is processed by a coder/decoder circuit to produce a reconstructed error signal, which is added to the predictive signal to form the reconstructed residual signal. A Linear Predictive Coding (LPC) circuit receives the reconstructed residual signal and develops the set of filter tuning coefficients. The set of filter tuning coefficients are outputted to the STP circuit, which also receives the reconstructed residual signal, and thereby generates the predictive signal.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: January 13, 1998
    Assignee: Industrial Technology Research Institute
    Inventors: Jeng-Yih Wang, Chau-Kai Hsieh
  • Patent number: 5708609
    Abstract: An apparatus and method for use in a semiconductor memory device to detect dataline undershoot. The detection of dataline undershoot is used to reduce dataline recovery time and output buffer recovery time, thereby reducing read access time in the memory device. A dataline coupled between a memory array and a sensing amplifier is applied to one input of a voltage comparator and compared to a reference voltage. The presence of undershoot on the dataline causes the dataline voltage to drop below the reference voltage, resulting in a transition in the comparator output. This transition triggers a pulse generator which supplies a pulse to the gate of a field effect transistor coupled between the dataline and an equalization voltage centered in a sensing window of the sensing amplifier.
    Type: Grant
    Filed: September 5, 1996
    Date of Patent: January 13, 1998
    Assignee: Winbond Electronics Corp.
    Inventor: Loc B. Hoang
  • Patent number: 5703387
    Abstract: A vertical split gate memory device has a semiconductor substrate with a trench and a floating gate formed on a sidewall of the trench, thus reducing the surface area of each memory cell. The fabrication process for this device allows precise control over the consistency during fabrication because the length of the floating gate is controlled by the depth of a trench etch and the location of the drains and sources are self-aligned by oxide spacers which act as masks during the doping process.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: December 30, 1997
    Assignee: United Microelectronics Corp.
    Inventor: Gary Hong
  • Patent number: 5698993
    Abstract: A level shifting inverter is provided with first and second drivers which may be level shifting inverters, which each have a low enable input, a high enable input and an output. Each driver outputs a low voltage level or a second high voltage level(that is higher than a first high voltage level of an input signal) depending on enabling and disabling voltage levels received at the high and low enable inputs of each driver. The high enable input of the first and second drivers are connected in a cross-coupled feedback configuration. The input of the first driver receives a complement of the input signal whereas the input of the second driver receives the input signal. The level shifter also has transition driver circuitry. The transition driver circuitry has an input receiving the second high voltage level, a first biasing input receiving the input signal and a second biasing input receiving the complement of the input signal.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: December 16, 1997
    Assignee: Industrial Technology Research Institute
    Inventor: Hwang-Cherng Chow
  • Patent number: 5699361
    Abstract: A communication network and process for communicating thereon is disclosed which can support multimedia communications. Communication channels are formulated using a two step process. In a first step, channel types and fixed attributes thereof are defined. When needed, one or more channels of the predefined types are subsequently allocated in a second step wherein user-definable parameters are specified. The user-definable parameters and fixed attributes of each allocated channel control the scheduling of transmission and receipt of information on each channel.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: December 16, 1997
    Assignee: Industrial Technology Research Institute
    Inventors: Hung-Pei Ding, Shoou-Gwo Jiang, Feng-Min Pan, Jihng-Ming Liou
  • Patent number: 5696763
    Abstract: Multicast video services are provided in a network having a star topology. The network illustratively compromises a switched hub having a shared transmission medium and a plurality of ports. An Ethernet segment is connected to each port. Client stations belonging to the Ethernet segments communicate to the associated ports information identifying the particular multicasts they wish to receive. This is accomplished by sending special packets (mask update packets) from the client stations to the ports. Only multicast video data packets belonging to multicasts identified in the update packets are transmitted by the ports on the associated Ethernet segments.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: December 9, 1997
    Assignee: Starlight Networks
    Inventor: Joseph Mark Gang, Jr.
  • Patent number: 5687201
    Abstract: A phase-locked-loop (PLL) has a current controlled oscillator (ICO) whose gain varies with its input current. The PLL also contains a charge pump that controls the input current of the ICO and therefore the output frequency of the ICO. The charge pump has a gain that is controlled by the ICO input current in a manner which linearizes the combination of charge pump and ICO. This results in a substantially constant loop gain for a PLL.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: November 11, 1997
    Assignee: Standard Microsystems Corporation
    Inventors: Kelly Patrick McClellan, Parameswaran K. Gopalier, Khosrow Haj Sadeghi
  • Patent number: 5684837
    Abstract: An apparatus and method for demodulating a frequency-shift keyed (FSK) signal to provide a data signal. An input FSK signal is processed in a waveform reshaper to generate a first pulse signal which includes a pulse for each cycle of the FSK signal. The first pulse signal is processed in a cycle counter to generate second and third pulse signals. The second pulse signal includes a pulse for each time a low clock pulse count is reached between pulses of the first pulse signal, and the third pulse signal includes a pulse for each time a high clock pulse count is reached between pulses of the first pulse signal. The low and high pulse counts are generally indicative of cycles of first and second FSK carrier frequencies, respectively, in the input FSK signal. The second pulse signal is processed in a data recognizer to generate a logic level indicator signal.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: November 4, 1997
    Assignee: United Microelectronics Corporation
    Inventor: Chang-San Chen
  • Patent number: 5682204
    Abstract: A rate control algorithm for an MPEG-2 compliant encoder is described. The rate control algorithm has embodiments useful for constant bit rate and variable bit rate encoding.In particular, the invention relates to a quantization biased, activity based inter/intra decision.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: October 28, 1997
    Assignee: C Cube Microsystems, Inc.
    Inventors: K. Metin Uz, Aaron Wells
  • Patent number: 5675772
    Abstract: A converter interface device transforms an incompatible first central processing unit (CPU2) chip into a chip compatible with a CPU1 chip. The CPU1 compatible chip, containing the CPU2, is interchangeable with the CPU1 chip. The converter interface device allows CPU2 to appear to a computer system as having the same pins and pin configuration as the CPU 1. The converter interface device has an address converter, a data converter and a control bus converter. These converters convert CPU2 signals into signals which are CPU1 compatible. In addition, the converter interface device has a bus decoder which decodes the converted CPU1 compatible signal of CPU2 and outputs a signal to a CPU switch unit. The CPU switch unit receives an external CPU select signal, and outputs a CPU1 and CPU2 enable/disable signals. Therefore, a computer system can be upgraded from CPU1 to CPU2, without having to discard the motherboard and software associated with the older CPU1.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: October 7, 1997
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Yuan Liu, Huan-Pin Tseng