Abstract: An end-effector includes multiple vortex chucks for supporting a wafer. Vortex chucks are located along the periphery of the end-effector to help prevent a flexible wafer from curling. The end-effector has limiters to restrict the lateral movement of a supported wafer. In one example, the end-effector has a detector for detecting the presence of a wafer. The detector is mounted at a shallow angle to allow the end-effector to be positioned close to a wafer to be picked-up, thereby allowing detection of deformed wafers contained in a wafer cassette. The shallow angle of the detector also minimizes the thickness of the end-effector. Also disclosed is a wafer station with features similar to that of the end-effector.

Abstract: In each row of a nonvolatile memory array, the select gates of all the memory cells are connected together and are used to select a row for memory access. The control gates of each row are also connected together, and the source regions of each row are connected together. Also, the control gates of plural rows are connected together, and the source regions of plural rows are connected together, but if the source regions of two rows are connected together, then their control gates are not connected together. If one of the two rows is being accessed but the other one of the two rows is not being accessed, their control gates are driven to different voltages, reducing the probability of a punch-through in the non-accessed row.

Abstract: The present invention comprises a brim surrounding a wafer or wafer-like object during plasma etching in a non-contact wafer holder, such brim facilitating uniform flow of the plasma discharge around the edge of the wafer during plasma etching. The brim of the present invention avoids plasma instability and non-uniform flow typical of conventional plasma etching near the edges of the wafer being etched. The brim of the present invention, by facilitating uniform and stable plasma flows, decreases non-uniform etching. One embodiment of the present invention permits the brim to move in the axial direction from a position substantially. This permits the etching process to be controlled for more uniform and precise wafer etching as lowering the brim tends to shadow the edge region of the wafer from the plasma, reducing etching in the edge region while not significantly affecting etching in the central regions of the wafer.

Abstract: To fabricate contacts on a wafer backside, openings (124) are formed in the face side of the wafer (104). A dielectric layer (140) and some contact material (150), e.g. metal, are deposited into the openings. Then the backside is etched until the contacts (150C) are exposed and protrude out. The protruding portion of each contact has an outer sidewall (150V). At least a portion of the sidewall is vertical or sloped outwards with respect to the opening when the contact is traced down. The contact is soldered to an another structure (410), e.g. a die or a PCB. The solder (420) reaches and at least partially covers the sidewall portion which is vertical or sloped outwards. The strength of the solder bond is improved as a result. The dielectric layer protrudes around each contact. The protruding portion (140P) of the dielectric becomes gradually thinner around each contact in the downward direction.

Abstract: An article holder has sensors that detect whether an article held in the holder is a workpiece or a piece of packaging material. Examples are end effectors suitable for picking up semiconductor wafers and packaging material from a pod or some other carrier.

Abstract: In a nonvolatile memory, select gates are self-aligned spacers formed on sidewalls of floating/control gate stacks. The same mask (1710) is used to remove the select gate layer from over the source lines (144), to etch trench insulation in the source line regions, and to dope the source lines. The memory can be formed in and over an isolated substrate region. The source lines can be doped at least partially before the trench insulation is etched, to prevent a short before the source lines and a region isolating the isolated substrate region from below. The memory can be erased by sectors, or alternatively a chip erase operation can be performed to erase all the cells in parallel. Peripheral transistor gates can be formed from the same layer as the select gates. The select gate spacers have extensions to which low resistance contacts can be made from overlying metal lines.

Abstract: An article holder has protrusions that contact the article. The friction between the protrusions and the article impedes the article movement relative to the holder yet allows the article to slide when the article is pushed against some object. The article is pushed against the object in order to position the article more precisely.

Abstract: An end-effector includes multiple vortex chucks for supporting a wafer. Vortex chucks are located along the periphery of the end-effector to help prevent a flexible wafer from curling. The end-effector has limiters to restrict the lateral movement of a supported wafer. In one example, the end-effector has a detector for detecting the presence of a wafer. The detector is mounted at a shallow angle to allow the end-effector to be positioned close to a wafer to be picked-up, thereby allowing detection of deformed wafers contained in a wafer cassette. The shallow angle of the detector also minimizes the thickness of the end-effector. Also disclosed is a wafer station with features similar to that of the end-effector.

Abstract: To move an article in and out of plasma during plasma processing, the article is rotated by a first drive around a first axis, and the first drive is itself rotated by a second drive. As a result, the article enters the plasma at different angles for different positions of the first axis. The plasma cross-section at the level at which the plasma contacts the article is asymmetric so that those points on the article that move at a greater linear velocity (due to being farther from the first axis) move longer distances through the plasma. As a result, the plasma processing time becomes more uniform for different points on the article surface. In some embodiments, two shuttles are provided for loading and unloading the plasma processing system. One of the shuttles stands empty waiting to unload the processed articles from the system, while the other shuttle holds unprocessed articles waiting to load them into the system.

Abstract: Data flows are queued in an active queue (160.0) waiting for transmission. In each time slot, one data flow can be dequeued from the head of the active queue, and a data unit can be transmitted on the data flow. Then the data flow is placed in a queue “i” which is one of the queues 1, 2, . . . N. Data flows are transferred from queue “i” to the active queue once in every 2i time slots. When a data flow is dequeued from the active queue and transferred to queue i, the queue number “i” is determined as i=log &Dgr;, rounded to an integer, where A is the number of time slots in which one data unit must be transmitted from the data flow in order to meet a data flow bandwidth parameter. If the data flow has waited for “d” time slots in the active queue before being dequeued, then i=log (&Dgr;−d), rounded to an integer.

Abstract: In a nonvolatile memory, select gates are self-aligned spacers formed on sidewalls of floating/control gate stacks. The same mask (1710) is used to remove the select gate layer from over the source lines (144), to etch trench insulation in the source line regions, and to dope the source lines. The memory can be formed in and over an isolated substrate region. The source lines can be doped at least partially before the trench insulation is etched, to prevent a short before the source lines and a region isolating the isolated substrate region from below. The memory can be erased by sectors, or alternatively a chip erase operation can be performed to erase all the cells in parallel. Peripheral transistor gates can be formed from the same layer as the select gates. The select gate spacers have extensions to which low resistance contacts can be made from overlying metal lines.

Abstract: An article holder has sensors that detect whether an article held in the holder is a workpiece or a piece of packaging material. Examples are end effectors suitable for picking up semiconductor wafers and packaging material from a pod or some other carrier.

Abstract: In each row of a nonvolatile memory array, the select gates of all the memory cells are connected together and are used to select a row for memory access. The control gates of each row are also connected together, and the source regions of each row are connected together. Also, the control gates of plural rows are connected together, and the source regions of plural rows are connected together, but if the source regions of two rows are connected together, then their control gates are not connected together. If one of the two rows is being accessed but the other one of the two rows is not being accessed, their control gates are driven to different voltages, reducing the probability of a punch-through in the non-accessed row.

Abstract: In a nonvolatile memory, a floating gate includes a portion of a conductive layer (150), and also includes conductive spacers (610). The spacers increase the capacitive coupling between the floating gate and the control gate (170).

Abstract: In a nonvolatile memory, a floating gate (124) is covered with ONO (98), and a control gate polysilicon layer (124) is formed on the ONO. After the control gate is patterned, the control gate sidewalls are oxidized to form a protective layer (101) of silicon dioxide. This oxide protects the control gate polysilicon during a subsequent etch of the silicon nitride portion (98.2) of the ONO. Therefore, the silicon nitride can be removed with an isotropic etch. A potential damage to the substrate isolation dielectric (210) is therefore reduced. Other embodiments are also provided.

Abstract: In a nonvolatile memory, a floating gate includes a portion of a conductive layer (150), and also includes conductive spacers (610). The spacers increase the capacitive coupling between the floating gate and the control gate (170).

Abstract: Circuit elements (e.g. transistor gates) formed over a semiconductor substrate are protected by adjacent dummy structures during mechanical or chemical mechanical polishing of an overlying dielectric.

Abstract: A plasma apparatus separately measures multiple plasma jets upstream of where the plasma jets converge into a combined plasma stream. The separate plasma jets can be separately adjusted to place the separate jets in a configuration that provides the combined stream with desired properties for a plasma treatment. The system can include an injector for a neutral jet that becomes part of the combined plasma stream. With an injector, the positions of the plasma jets can be measured relative to the injector so that the plasma jets and the neutral jet are properly aligned to form a combine plasma stream having the properties desired.

Abstract: In fabrication of integrated circuits, trenches (184) are formed in a dielectric (170), then a metal (e.g. tungsten or copper) is deposited. The metal (194) is removed from the top surface of the dielectric by a polishing process (e.g. CMP). The metal remains in the trenches. The inventor has discovered that the erosion of the structure in the polishing process does not strongly depend on the size of the structure. Therefore, the erosion of a large structure (440) can be estimated by measuring the erosion of a smaller test structure (450). The erosion of the test structure is measured by a probe instrument (230), e.g. a stylus profilometer or a scanning probe microscope. Use of the test structure reduces the probability of damaging the larger structure by the probe. Other embodiments are also provided.

Abstract: Conductive material is deposited by ionized physical vapor deposition on an insulator, possibly to contact a conductive layer exposed by an opening in the insulator. At the beginning of the deposition, the wafer bias is low (possibly zero), to prevent the insulator re-sputtering by the ionized conductive material as this material is being deposited. The contact resistance is improved (reduced) as a result.