Abstract: An image sensor includes a data formatter and a transformer. The data formatter divides N-bit data into K-bit units with N and K being natural numbers and with K<N. The transformer is configured to generate an output signal having a respective signal level selected from at least three possible levels depending on each K-bit unit received from the data formatter for high speed operation of the transformer and the data formatter.

Abstract: For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.

Abstract: An image sensor includes a photoelectric converter, a source-follower transistor, and a selection transistor. The photoelectric converter generates electric charge in response to received light, and the electric charge varies a voltage of a detection node. The source-follower transistor is coupled between the detection node and an output node and has a first threshold voltage. The selection transistor is coupled between the source-follower transistor and a voltage node with a power supply voltage or a boosted voltage applied thereon, and has a second threshold voltage with a magnitude that is less than a magnitude of the first threshold voltage such that the source-follower transistor operates in saturation.

Abstract: A semiconductor transistor device includes a drift region, an insulating structure, a gate insulator, a gate electrode, a source, and a drain. The drift region includes a first lateral portion having a first dopant concentration and a second lateral portion having a second dopant concentration that is higher than the first lateral portion. The insulating structure is formed on the drift region and is disposed over a border between the first and second lateral portions such that hole generation is minimized in the drift region during operation.

Abstract: An apparatus for performing shade correction for a lens in an image sensor includes a gain profile extractor, a common profile calculator, a gain controller calculator, and a memory device. The gain profile extractor generates a respective channel gain profile for each of a plurality of color channels from image data. The common profile calculator generates a common profile from the channel gain profiles. The gain controller calculator generates a respective gain controller for each of the plurality of color channels from the common profile and the channel gain profiles. A memory device stores the common profile and the gain controllers.

Abstract: An image sensor includes a photoelectric converter, a reflector, and a charge carrier guiding region. The reflector is disposed under the photoelectric converter, and the charge carrier guiding region is disposed between the photoelectric converter and the reflector. The reflector reflects incident light passed by the photoelectric converter back through the photoelectric converter for increasing photoelectric conversion efficiency and reduced crosstalk. The charge carrier guiding region dissipates undesired charge carriers for further increasing photoelectric conversion efficiency.

Abstract: An image sensor includes a color filter array including a primary color pixel such as a green filter pixel for sensing a predetermined primary color, a first secondary color pixel such as a yellow filter pixel, and a second secondary color pixel such as a cyan filter pixel. The primary color pixel, the first secondary color pixel, and the second secondary color pixel form different area ratios in the color filter array. For example, the area ratio of the yellow filter pixel to the cyan filter pixel and the green filter pixel is 2:1:1 in the color filter array. In addition, the color filters of the pixels are compensated for crosstalk effect. Such an image sensor has enhanced color reproducibility and sensitivity.

Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.

Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.

Abstract: A multiprocessor system includes first and second processors and a multi-path accessible semiconductor memory device including a shared memory area and a pseudo operation execution unit. The shared memory area is accessible by the first and second processors according to a page open policy. The pseudo operation execution unit responds to a virtual active command from one of the first and second processors to close a last-opened page. The virtual active command is generated with a row address not corresponding to any row of the shared memory area. For example, bit-lines of a last accessed row are pre-charged for closing the last-opened page.

Abstract: A three dimensional memory module and system are formed with at least one slave chip stacked over a master chip. Through semiconductor vias (TSVs) are formed through at least one of the master and slave chips. The master chip includes a memory core for increased capacity of the memory module/system. In addition, capacity organizations of the three dimensional memory module/system resulting in efficient wiring is disclosed for forming multiple memory banks, multiple bank groups, and/or multiple ranks of the three dimensional memory module/system.

Abstract: A CMOS image sensor includes a photosensitive device, a floating diffusion region, a transfer transistor, and a pocket photodiode formed in a semiconductor substrate of a first conductivity type. The floating diffusion region is of a second conductivity type. The transfer transistor has a channel region disposed between the photosensitive device and the floating diffusion region. The pocket photodiode is of the second conductivity type and is formed under a first portion of a bottom surface of the channel region such that a second portion of the bottom surface of the channel region abuts the semiconductor substrate.

Abstract: For fabricating an image sensor, an isolation structure is formed to define a first active region of a semiconductor substrate. A first transistor and a second transistor of a unit pixel are formed in the first active region. In addition, a threshold voltage lowering region is formed in a portion of the semiconductor substrate near a portion of the isolation structure abutting the second transistor in the first active region. The threshold voltage lowering region causes the second transistor to have a respective threshold voltage magnitude that is lower than for the first transistor. The threshold voltage lowering region is formed simultaneously with a passivation region in a second active region having a photodiode formed therein.

Abstract: For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.

Abstract: For color correction in an image sensor, an image sensor processing block generates a plurality of color correction parameters corresponding to a plurality of selected pixels of the image sensor for defining a plurality of areas of a sample image. In addition, a color correction value calculation block generates a respective color correction value corresponding to a given pixel from bilinear interpolation of a respective subset of the color correction parameters corresponding to a respective one of the areas including a respective location of the given pixel.

Abstract: An apparatus for aligning input data in a semiconductor device includes at least one alignment block and a decision block. The at least one alignment block is for aligning serial input data into groups of parallel data synchronized to at least one divided data strobe signal for increasing margin between the maximum and minimum tDQSS values. The decision block is for selecting one of the groups of parallel data as valid data in response to synchronization information generated for removing any invalid data in the serial input data resulting from a write gap.

Abstract: For auto-focusing of a focusing lens within an image sensing system, an N-bin luminance histogram is generated by a digital signal processor from an image. A microprocessor determines a type of the image from the N-bin luminance histogram. The microprocessor also determines a focus position using a first set of at least one focus value if the image is determined to be of a first type. The microprocessor also determines the focus position using a second set of at least one focus value different from the first set if the image is determined to be of a second type.

Abstract: An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.

Abstract: A data communication device or system includes a preamble unit and a data interface. The preamble unit generates or detects a first preamble having a first length for a first data line, and generates or detects a second preamble having a second length for a second data line. The first length is different from the second length, and data on the first and second data lines form parallel data. The data interface communicates a first data with the first preamble via the first data line and communicates a second data with the second preamble via the second data line. The respective length and/or respective pattern of each preamble are adjustable and/or programmable.