Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: A method of utilizing at least one block of data, wherein the at least one block of data includes a plurality of cells for storing data and at least one error flag bit, the method including: scanning the block of data for errors; determining the error rate of the block of data; and applying an error correction code to data being read from or written to a cell within the at least one block of data, wherein the error correction code is applied based on the error rate, wherein a weak error correction code is applied when the error rate is below an error threshold, and a strong error correction code is applied when the error rate is at or above the error threshold.

Abstract: A programmable metallization cell (PMC) that includes an active electrode; a nanoporous layer disposed on the active electrode, the nanoporous layer comprising a plurality of nanopores and a dielectric material; and an inert electrode disposed on the nanoporous layer. Other embodiments include forming the active electrode from silver iodide, copper iodide, silver sulfide, copper sulfide, silver selenide, or copper selenide and applying a positive bias to the active electrode that causes silver or copper to migrate into the nanopores. Methods of formation are also disclosed.

Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.

Abstract: Non-volatile magnetic random access memory (MRAM) devices that include magnetic flip-flop structures that include a magnetization controlling structure; a first tunnel barrier structure; and a magnetization controllable structure that includes a first polarizing layer; and a first stabilizing layer, wherein the first tunnel barrier structure is between the magnetization controllable structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the first tunnel barrier structure, wherein the magnetic flip-flop device has two stable overall magnetic; configurations a second tunnel barrier structure and a reference layer, wherein the second tunnel barrier structure is between the magnetic flip-flop device and the reference layer.

Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.

Abstract: Nematic liquid crystal cells with positive dielectric anisotropy that include colloidal suspensions having nanoclusters are provided as well as methods of inducing Freedericksz transitions therein and methods of controlling the alignment of a liquid crystal.

Abstract: A method of fabricating a recording head includes depositing an insulator material onto at least a portion of a first member, wherein the insulator material forms an insulator film having a film thickness. The method further includes depositing a writer pole material onto the insulator film, wherein the writer pole material forms a writer pole member, and wherein the insulator film is between the writer pole member and a contact layer. Further, in some embodiments, the film thickness determines the distance between the writer pole member and the first contact member and also determines the distance between the writer pole member and the second contact member.

Abstract: Magnetic tunnel junctions having a specular insulative spacer are disclosed. The magnetic tunnel junction includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, and an electrically insulating and electronically reflective layer positioned to reflect at least a portion of electrons back into the free magnetic layer.

Abstract: Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.

Abstract: A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions. The memory unit is configured to be precharged to a specified precharge voltage level and the precharge voltage is less than a threshold voltage of the first diode and second diode.

Abstract: A magnetic tunnel junction cell having a free layer, a ferromagnetic pinned layer, and a barrier layer therebetween. The free layer has a central ferromagnetic portion and a stabilizing portion radially proximate the central ferromagnetic portion. The construction can be used for both in-plane magnetic memory cells where the magnetization orientation of the magnetic layer is in the stack film plane and out-of-plane magnetic memory cells where the magnetization orientation of the magnetic layer is out of the stack film plane, e.g., perpendicular to the stack plane.

Abstract: A magnetic recording head includes a magnetic recording write element including a main pole having a leading edge, an opposing trailing edge, a first side surface and a second side surface. A first side magnetic shield is positioned adjacent the first side surface and a second side magnetic shield positioned adjacent to the second side surface. First and second side shields are separated from the main pole by a first and second side shield gap. A front magnetic shield is separated from the main pole trailing edge by a front shield gap. A recess extends into the front shield adjacent to the trailing edge, and parallel to the trailing edge, and extends laterally away from the main pole and into the front shield a distance greater than the first or second side shield gap.

Abstract: A palladate palladium-promoted hydrolytic polypeptide cleavage process which selectively cleaves the polypeptide at a Cys-His cleavage site comprising solubilizing the polypeptide in a reaction mixture comprised of a palladate palladium promoter dissolved in a high-concentration acidic organic acid solvent.

Abstract: A near field transducer (NFT) that includes a disk, the disk having a top surface, a side surface, and a center; a peg, the peg positioned adjacent the side surface of the disk; and a heat sink, the heat sink positioned on the top surface of the disk, and the heat sink having an effective center, wherein the NFT has a peg axis, which is defined by the location of the peg adjacent the side surface of the disk, and a non-peg axis, which is perpendicular to the peg axis, and wherein the effective center of the heat sink is positioned at about the center of the disk.

Abstract: An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: A switching element that includes a first semiconductor layer, the first semiconductor layer having a first portion and a second portion; a second semiconductor layer, the second semiconductor layer having a first portion and a second portion; an insulating layer disposed between the first semiconductor layer and the second semiconductor layer; a first metal contact in contact with the first portion of the first semiconductor layer forming a first junction and in contact with the first portion of the second semiconductor layer forming a second junction; a second metal contact in contact with the second portion of the first semiconductor layer forming a third junction and in contact with the second portion of the second semiconductor layer forming a fourth junction, wherein the first junction and the fourth junction are Schottky contacts, and the second junction and the third junction are ohmic contacts.

Abstract: Apparatus and methods for internal surgical procedures are disclosed. The apparatus and methods may involve supporting internal body locations, creating submucosal separations (blebs), and/or for resecting mucosal tissue separated from underlying tissue by a bleb.