Abstract: Faults are detected and recovered from in a multiprotocol label switching (MPLS) network by communicating packets between a first node and a second node in the MPLS network using a set of prioritized label switch path (LSP) pairs. A failure to receive a relatively constant rate of packets during a predetermined time interval is detected at the first node. Packets are sent from the first node to the second node using a backup LSP pair responsive to detecting the failure. Packets are then sent from the second node to the first node using a backup LSP pair responsive to receiving packets at the second node on the backup LSP pair.

Abstract: A flash memory device and a flash memory system are disclosed. The flash memory device includes a first non-volatile memory including a plurality of page data cells, storing page data, and reading and outputting the stored page data when a read command is applied from an external portion; and a second non-volatile memory including a plurality of spare data cells respectively adjacent to the plurality of page data cells, storing spare data, scanning the spare data and temporarily storing corresponding information when a file system is mounted, reading and outputting the stored spare data when the read command is applied.

Abstract: In a method of complexity reduced noise floor estimation in a wireless communications system, determining, for a respective of at least a subset of a plurality of power grid points /c, a product of complementary cumulative distribution functions, each such function corresponding to a respective of a plurality j of provided wideband power measure estimates Ln a sliding window, and determining, for each of said at least subset of power grid points, a probability distribution function of a minimum of said plurality of wideband power measure estimates based on said determined product.

Abstract: A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Abstract: A flash memory device includes a flash memory and a buffer memory. The flash memory is divided into a main region and a spare region. The buffer memory is a random access memory and has the same structure as the flash memory. In addition, the flash memory device further includes control means for mapping an address of the flash memory applied from a host so as to divide a structure of the buffer memory into a main region and a spare region and for controlling the flash memory and the buffer memory to store data of the buffer memory in the flash memory or to store data of the flash memory in the buffer memory.

Abstract: According to some embodiments, a semiconductor device includes first and second auxiliary gate electrodes and a semiconductor layer crossing the first and second auxiliary gate electrodes. A primary gate electrode is provided on the semiconductor layer so that the semiconductor layer is between the primary gate electrode and the first and second auxiliary gate electrodes. Moreover, the first and second auxiliary gate electrodes are configured to induce respective first and second field effect type source/drain regions in the semiconductor layer. Related methods are also discussed.

Abstract: Provided is a method for fabricating a semiconductor device, including forming an interconnect structure including first and second interconnects and an insulating material between the first and second interconnects, forming a first mask layer and a second mask layer having a plurality of micropores sequentially on the interconnect structure, coalescing the plurality of micropores in the second mask layer with each other and forming a plurality of first microholes in the second mask layer, forming a plurality of second microholes in the first mask layer using the plurality of first microholes, and removing the insulating material using the first mask layer with the plurality of second microholes as an etch mask so as to form an air-gap between the first and second interconnects.

Abstract: A controller may include a RAID controller and an access controller. The RAID controller exchanges data with a host and select ones of a plurality of RAID levels responsive to RAID level information. The access controller is connected to the RAID controller and to a plurality of channels that are each connected to a plurality of non-volatile memory chips. The access controller accesses data in at least one of the non-volatile memory chips connected to each of the channels according to the selected RAID level. The controller may alternatively or additionally include a storage device and a main processor. The main processor is configured to logically partition a plurality of non-volatile memory chips that are connected to each of a plurality of channels into a normal partition region and a RAID level partition region, where data access is performed according to a selected RAID level, in response partition information that is stored in the storage device.

Abstract: Disclosed are optimized keratin preparations for use in medical applications. Methods to produce optimized keratin preparations are provided for use in biomedical applications, particularly for the treatment of bleeding, and for the treatment of wounds. Also disclosed are surgical or paramedic aids comprising a substrate with keratin preparations provided thereon, and kits comprising keratin derivatives packaged in sterile form.

Abstract: Various computer-implemented methods and associated mobile communication terminals are provided that regulate the generation of user alerts responsive to received messages so that the alerts may be generated/regenerated when the terminal is moved by a user. A mobile communication terminal may include a movement sensing circuit, a RF transceiver circuit, and a computer circuit. The movement sensing circuit may be configured to generate a movement signal indicating movement of the mobile communication terminal. The RF transceiver circuit may be configured to communicate through a wireless air interface.

Abstract: A high-output and highly efficient axial gap type rotating machine capable of reducing an eddy current generated in a winding wire and supplying a larger current is provided.

Abstract: The present invention provides methods of controlling properties of a thin film applied to a substrate whereby the properties of the thin film may be controlled by the surface morphology of the substrate. Methods of increasing a deposition rate of an electroless plating process applied to a substrate, controlling the grain size distribution and/or grain size of a thin film applied to a substrate and maintaining a uniform overpotential of an electroless plating process on a substrate are also provided.

Abstract: A method of fabricating a semiconductor device using a recess channel array is disclosed. A substrate is provided having a first region and a second region, including a first transistor in the first region including a first gate electrode partially filling a trench, and source and drain regions that are formed at both sides of the trench, and covered by a first insulating layer. A first conductive layer is formed on the substrate. A contact hole through which the drain region is exposed is formed by patterning the first conductive layer and the first insulating layer. A contact plug is formed that fills the contact hole. A bit line is formed that is electrically connected to the drain region through the contact plug, and simultaneously a second gate electrode is formed in the second region by patterning the first conductive layer.

Abstract: An active shield can be configured to receive a test signal, and configured to output a plurality of shield signals, derived from the test signal, via a plurality of signal paths. A compare logic can be configured to compare the test signal with each of the plurality of shield signals to provide at least two comparison signals indicating comparison results and can be configured to output the at least two comparison signals. A detection and decision logic can be configured to determine whether the active shield is subject to attack based on patterns of the at least two comparison signals.

Abstract: Provided are apparatus, methods and/or computer program products for monitoring internet activity. A network is searched to detect network data indicative of actual and/or potential contact with a child. A report is generated that identifies a source of detected data and the report is sent to a responsible party.

Abstract: A semiconductor device that has a dual gate having different work functions is simply formed by using a selective nitridation. A gate insulating layer is formed on a semiconductor substrate including a first region and a second region, on which devices having different threshold voltages are to be formed. A diffusion inhibiting material is selectively injected into the gate insulating layer in one of the first region and the second region. A diffusion layer is formed on the gate insulating layer. A work function controlling material is directly diffused from the diffusion layer to the gate insulating layer using a heat treatment, wherein the gate insulting layer is self-aligned capped with the selectively injected diffusion inhibiting material so that the work function controlling material is diffused into the other of the first region and the second region. The gate insulating layer is entirely exposed by removing the diffusion layer. A gate electrode layer is formed on the exposed gate insulating layer.

Abstract: A system and method for optimizing enterprise applications driven by business processes is provided. The method for optimizing business processes comprises the steps of obtaining process data, optimizing the process data using algorithms, simulating execution of one of the process data and the optimized process data, publishing the optimized process data, and deploying the published data for execution using a run time engine. In one embodiment, the simulator simulates using both process data and optimized process data. Modifications to process data can be input, and this modified data can be simulated, and also can be optimized.

Abstract: A communication network is operated by identifying at least one potential hijack autonomous system (AS) that can be used to generate a corrupt routing path from a source AS to a destination AS. For each of the at least one potential hijack AS the following operations are performed: identifying at least one regional AS that is configured to adopt the corrupt routing path from the source AS to the destination AS and determining a reflector AS set such that, for each reflector AS in the set, a source AS to reflector AS routing path and a reflector AS to destination AS routing path do not comprise any of the at least one regional AS. A reflector AS is then identified that is common among the at least one reflector AS set responsive to performing the identifying and determining operations for each of the at least one potential hijack AS.

Abstract: Memory devices include a row decoder, a first variable resistance memory cell connected to a first bit line and connected to the row decoder by a word line and a second variable resistance memory cell connected to a second bit line and connected to the row decoder by the word line. The memory devices further include a bit line select circuit coupled to the first and second bit lines and configured to compensate for a difference in word line resistance between the row decoder and the respective first and second memory cells. In some embodiments, the bit line select circuit includes first and second transistors configured to selective respective ones of the first and second bit lines and the first and second transistors have different resistances that compensate for the difference in word line resistance.

Abstract: An electronic device includes a wide bandgap thyristor having an anode, a cathode, and a gate terminal, and a wide bandgap bipolar transistor having a base, a collector, and an emitter terminal. The emitter terminal of the bipolar transistor is directly coupled to the anode terminal of the thyristor such that the bipolar transistor and the thyristor are connected in series. The bipolar transistor and the thyristor define a wide bandgap bipolar power switching device that is configured to switch between a nonconducting state and a conducting state that allows current flow between a first main terminal corresponding to the collector terminal of the bipolar transistor and a second main terminal corresponding to the cathode terminal of the thyristor responsive to application of a first control signal to the base terminal of the bipolar transistor and responsive to application of a second control signal to the gate terminal of the thyristor. Related control circuits are also discussed.