Abstract: A mobile communications network may include a primary and secondary radio-nodes, and the secondary radio-node may include a radio-node transmitter and a radio-node receiver. A method of operating the secondary radio-node may include monitoring through the radio-node receiver of the secondary radio-node to detect user terminal signals transmitted to the primary radio-node while maintaining the secondary radio-node in a sleep mode. Responsive to detecting user terminal signals during monitoring in the sleep-mode, operation of the secondary radio-node may be changed from the sleep mode to an active mode.
Abstract: Methods of manufacturing NOR-type flash memory device include forming a tunnel oxide layer on a substrate, forming a first conductive layer on the tunnel oxide layer, forming first mask patterns parallel to one another on the first conductive layer in a y direction of the substrate, and selectively removing the first conductive layer and the tunnel oxide layer using the first mask patterns as an etch mask. Thus, first conductive patterns and tunnel oxide patterns are formed, and first trenches are formed to expose the surface of the substrate between the first conductive patterns and the tunnel oxide patterns. A photoresist pattern is formed to open at least one of the first trenches, and impurity ions are implanted using the photoresist pattern as a first ion implantation mask to form an impurity region extending in a y direction of the substrate. The photoresist pattern is removed.
Abstract: Provided are a semiconductor structure and a method of fabricating a semiconductor device. The method includes: preparing a substrate or an etch-target layer which is to be patterned; forming a first anti-reflective coating, which contains silsesquioxane resin and a cross-linking catalyst, on the substrate or the etch-target layer; forming an anti-penetration film and a second anti-reflective coating by causing a cross-linking reaction in a region of the first anti-reflective coating; and forming a photoresist pattern on the anti-penetration film.
Abstract: The invention relates to a method and an arrangement for reducing transmission delay on a radio interface in a communication network, comprising a communication network node (15) transmitting packet data to one or more user equipments (18) over said radio interface. A number of transmission attempts needed for transmitting said packet data estimating, based on which a number of re-transmissions of said first packet data to perform is determined. The determined number of re-transmission is proactively transmitted before an ACK or NACK message is received from the user equipments.
Abstract: Fluid analyte sensors include a photoelectrocatalytic element that is configured to be exposed to the fluid, if present, and to respond to photoelectrocatalysis of at least one analyte in the fluid that occurs in response to impingement of optical radiation upon the photoelectrocatalytic element. A semiconductor light emitting source is also provided that is configured to impinge the optical radiation upon the photoelectrocatalytic element. Related solid state devices and sensing methods are also described.
Type:
Grant
Filed:
May 7, 2007
Date of Patent:
December 4, 2012
Assignee:
Valencell, Inc.
Inventors:
Steven Francis LeBoeuf, Jesse Berkley Tucker, Michael Edward Aumer
Abstract: A processing unit includes an instruction fetch unit that is configured to process a compiled instruction that includes a plurality of fields. The plurality of fields includes a flag field that identifies memory blocks to be activated for fetching a next instruction. Each of the memory blocks has stored therein one or more fields used to form the next instruction and assigned to the memory blocks in a predetermined way. A block enable signal generator is configured to generate at least one block enable signal to selectively activate the memory blocks in the predetermined way. The flag field is included in fields of an instruction having the shortest length among instructions of the processing unit.
Abstract: A nonvolatile memory device includes a string selection gate and a ground selection gate on a semiconductor substrate, and a plurality of memory cell gates on the substrate between the string selection gate and the ground selection gate. First impurity regions extend into the substrate to a first depth between ones of the plurality of memory cell gates. Second impurity regions extend into the substrate to a second depth that is greater than the first depth between the string selection gate and a first one of the plurality of memory cell gates immediately adjacent thereto, and between the ground selection gate and a last one of the plurality of memory cell gates immediately adjacent thereto. Related fabrication methods are also discussed.
Abstract: This application describes an antibody that specifically binds to a synthetic oligomer (e.g., an oligonucleotide or oligopeptide) having a organic protecting group covalently bound thereto, which antibody does not bind to that synthetic oligomer when the organic protecting group is not covalently bound thereto. Methods of making and using such antibodies are also disclosed, along with cells for making such antibodies and articles carrying immobilized oligomers that can be used in assay procedures with such antibodies.
Type:
Grant
Filed:
April 5, 2012
Date of Patent:
December 4, 2012
Assignee:
North Carolina State University
Inventors:
Paul F. Agris, Christopher D. J. Pearce, Lloyd G. Mitchell
Abstract: A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
Type:
Grant
Filed:
June 8, 2009
Date of Patent:
December 4, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Beom-jun Jin, Byung-seo Kim, Sung-Dong Kim
Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.
Type:
Grant
Filed:
March 9, 2010
Date of Patent:
December 4, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Joseph C. Fjelstad, Kevin P. Grundy, Para K. Segaram, William F. Wiedemann, Thomas J. Obenhuber, Inessa Obenhuber, legal representative
Abstract: Provided herein are compounds used to inhibit the deamination enzyme responsible for the inactivation of therapeutic compounds, and methods of using them.
Type:
Grant
Filed:
April 6, 2010
Date of Patent:
December 4, 2012
Assignee:
Eisai Inc.
Inventors:
Sergei Belyakov, Bridget Duvall, Dana Ferraris, Gregory Hamilton, Mark Vaal
Abstract: The invention relates to a solid oral dosage form comprising a pharmaceutically active ingredient in combination with an enhancer which enhances the bioavailability and/or the absorption of the active ingredient. Accordingly, a solid oral dosage form comprises a drug and an enhancer wherein the enhancer is a medium chain fatty acid ester, ether or salt or a derivative of a medium chain fatty acid, which is, preferably, solid at room temperature and which has a carbon chain length of from 6 to 20 carbon atoms. Preferably, the solid oral dosage form is controlled release dosage form such as a delayed release dosage form.
Type:
Grant
Filed:
April 27, 2010
Date of Patent:
December 4, 2012
Assignee:
Merrion Research III Limited
Inventors:
Kenneth I. Cumming, Zebunnissa Ramtoola
Abstract: Elongate intrabody MRI-antenna probes include opposing distal and proximal portions. The distal portion includes at least one multi-turn conductor arranged as a stack of substantially flat loops, each with a substantially rectangular elongate shape. A flat loop can reside on each of a plurality of adjacent vertically stacked substantially planar layers, the flat loops cooperate to define a MRI receive antenna.
Abstract: A method and a device relating to a scheduling mechanism in a base station in a WCDMA system are disclosed. The mechanism enables the base station to rapidly adapt to users momentary traffic demands and to interference variations, a dynamical adjustable margin is proposed in this invention. The adjustment is based on the RoT measurement in a cell. To fully use the resource in a cell, the RoT can be targeted to be as closer to the RoTmax as possible however without exceed the limit. The scheduler is preferably set to schedule as high a rate or as many users as possible to fill up the available RoT. The margin which is reserved for the neighboring cell load and external interference is decreased step by step as long as the RoT measurement is below a threshold under RoTmax. Whenever the RoT measurement exceeds the threshold, the margin is increased by one step.
Type:
Grant
Filed:
November 6, 2006
Date of Patent:
November 27, 2012
Assignee:
Telefonaktiebolaget L M Ericsson (publ)
Inventors:
Ke Wang Helmersson, Eva Englund, Patrik Karlsson
Abstract: An electronic communication device includes a high-rate RF wireless transmitter circuit (e.g., a TransferJet transmitter circuit) and a low-rate magnetically coupled receiver circuit (e.g., a Near Field Communication receiver circuit). The high-rate RF wireless transmitter circuit transmits a block of data to another proximately located communication device via RF signals using a first RF communication protocol. The low-rate magnetically coupled receiver circuit receives a communication control signal from the other proximately located communication device via magnetic coupling thereto using a second protocol that is different from the first RF communication protocol, and responds to the communication control signal by selectively triggering the high-rate RF wireless transmitter circuit to transmit another block of data when available for transmission.
Abstract: Provided are a metal interconnect of a semiconductor device and a method of fabricating the metal interconnect. The metal interconnect includes a metal line having a first end and a second end disposed on an opposite side to the first end, a via electrically connected to the metal line, and a non-active segment extending from the first end and including a void. Tensile stress is decreased to prevent a void from occurring under the via. Accordingly, line breakage due to electromigration is substantially prevented, thus improving electrical characteristics of the device.
Type:
Grant
Filed:
March 12, 2010
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Jongmyeong Lee, Zungsun Choi, Gilheyun Choi, Byung-Lyul Park, Jinho Park, Hye Kyung Jung
Abstract: Methods of forming a capacitor of an integrated circuit device include forming a lower electrode of the capacitor on an integrated circuit substrate without exposing a contact plug to be coupled to the lower electrode. A supporting conductor is formed coupling the lower electrode to the contact plug after forming the lower electrode. A capacitor dielectric layer is formed on the lower electrode and an upper electrode of the capacitor is formed on the capacitor dielectric layer.
Type:
Grant
Filed:
February 28, 2007
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Wan-Don Kim, Cha-Young Yoo, Suk-Jin Chung, Jin-Yong Kim
Abstract: Multi-wavelength optical apparatus includes an optical emitter, and an energy transition layer positioned adjacent to the optical emitter. The energy transition layer generates multi-wavelength electromagnetic radiation when monochromatic light from the optical emitter passes therethrough. The energy transition layer includes a plurality of luminescent films, and each film is configured to luminesce at a respective different wavelength range when monochromatic light from the optical emitter passes therethrough. The plurality of luminescent films may be arranged in contacting face-to-face relationship or may be arranged in an array. The luminescent films may include rare-earth doped oxides, phosphors, metal-doped oxides, rare-earth doped nitrides, nanostructures, and/or nanostructured films, etc. The optical emitter may be a light emitting diode (LED), a laser diode (LD), an organic light-emitting diode (OLED), a resonant cavity light emitting diode (RCLED), and/or an edge-emitting diode (EELED).
Type:
Grant
Filed:
December 21, 2007
Date of Patent:
November 27, 2012
Assignee:
Valencell, Inc.
Inventors:
Steven Francis LeBoeuf, Jesse Berkley Tucker
Abstract: The present invention relates to methods and arrangements in a wireless communication system that enable the allocation of resources to UEs based on measurements of their antenna polarization, in order to suppress the interference between different UEs at a very low overhead cost. This is achieved by a solution where the scheduling unit retrieves information about the polarization of the UE antenna configurations, and based on this information allocates radio resources to the different UEs, with the aim to minimize the interference. The scheduling unit may retrieve the information from the RBSs or from the UEs. The RBS and the UE will determine the polarization and transmit information regarding this polarization to the scheduling unit. The scheduling unit coordinates the allocation of resources with other scheduling units if necessary.
Type:
Grant
Filed:
May 20, 2009
Date of Patent:
November 27, 2012
Assignee:
Telefonaktiebolaget L M Ericsson (publ)
Inventors:
Bo Hagerman, Henrik Asplund, Arne Simonsson
Abstract: Provided are methods of forming a semiconductor device, the method including: forming an insulation region on a substrate region, and an active region on the insulation region; patterning the active region to form an active line pattern; forming a gate pattern to surround an upper portion and lateral portions of the active line pattern; separating the gate pattern into a plurality of sub-gate regions, and separating the active line pattern into a plurality of sub-active regions, in order to form a plurality of memory cells that are each formed of the sub-active region and the sub-gate region and that are separated from one another; and forming first and second impurity doping regions along both edges of the sub-active regions included in each of the plurality of the memory cells, wherein the forming of the first and second impurity doping regions comprises doping lateral portions of the sub-active regions via a space between the memory cells.