Abstract: Provided herein are compounds used to inhibit the deamination enzyme responsible for the inactivation of therapeutic compounds, and methods of using them.
Type:
Grant
Filed:
April 6, 2010
Date of Patent:
December 4, 2012
Assignee:
Eisai Inc.
Inventors:
Sergei Belyakov, Bridget Duvall, Dana Ferraris, Gregory Hamilton, Mark Vaal
Abstract: A prismatic tank has outer and inner walls and internal horizontal stays. The walls include a plurality of horizontal beam sections. Each beam section has two parallel flanges interconnected by a web and a pair of opposing end faces. The beam sections are stacked one on top of the other and joined together along adjoining longitudinal edges of respective flanges and at end faces of respective beam sections such that a joint is formed between a first end face of a first beam section and a second, abutting end face of a second, abutting beam section. The web of the first beam section is recessed at the first end face and the web of the second beam section is recessed at the second end face so as to leave a first opening in the joint.
Abstract: A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
Type:
Grant
Filed:
June 8, 2009
Date of Patent:
December 4, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Beom-jun Jin, Byung-seo Kim, Sung-Dong Kim
Abstract: This application describes an antibody that specifically binds to a synthetic oligomer (e.g., an oligonucleotide or oligopeptide) having a organic protecting group covalently bound thereto, which antibody does not bind to that synthetic oligomer when the organic protecting group is not covalently bound thereto. Methods of making and using such antibodies are also disclosed, along with cells for making such antibodies and articles carrying immobilized oligomers that can be used in assay procedures with such antibodies.
Type:
Grant
Filed:
April 5, 2012
Date of Patent:
December 4, 2012
Assignee:
North Carolina State University
Inventors:
Paul F. Agris, Christopher D. J. Pearce, Lloyd G. Mitchell
Abstract: The invention relates to a solid oral dosage form comprising a pharmaceutically active ingredient in combination with an enhancer which enhances the bioavailability and/or the absorption of the active ingredient. Accordingly, a solid oral dosage form comprises a drug and an enhancer wherein the enhancer is a medium chain fatty acid ester, ether or salt or a derivative of a medium chain fatty acid, which is, preferably, solid at room temperature and which has a carbon chain length of from 6 to 20 carbon atoms. Preferably, the solid oral dosage form is controlled release dosage form such as a delayed release dosage form.
Type:
Grant
Filed:
April 27, 2010
Date of Patent:
December 4, 2012
Assignee:
Merrion Research III Limited
Inventors:
Kenneth I. Cumming, Zebunnissa Ramtoola
Abstract: A covered cable assembly includes a cable and a sealing assembly. The cable includes a metal sheath and a cable core. The metal sheath has a sheath terminal edge defining a sheath opening. The cable core extends through the metal sheath. The cable core includes an electrical conductor and an oil-impregnated paper insulation layer surrounding the electrical conductor. An extended cable core section of the cable core extends through the sheath opening and beyond the sheath terminal edge. The sealing assembly includes an oil barrier tube, a sealing mastic and a pressure retention tape. The oil barrier tube surrounds the extended cable core section. The sealing mastic surrounds the cable about the sheath terminal edge and overlaps portions of the metal sheath and the oil barrier tube adjacent the sheath terminal edge to effect an oil barrier seal between the metal sheath and the cable core at the sheath opening. The pressure retention tape surrounds the sealing mastic to limit displacement of the sealing mastic.
Type:
Grant
Filed:
January 19, 2009
Date of Patent:
December 4, 2012
Assignee:
Tyco Electronics Corporation
Inventors:
Floyd Kameda, Kathryn Marie Maher, David Francis Pearce
Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.
Type:
Grant
Filed:
March 9, 2010
Date of Patent:
December 4, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Joseph C. Fjelstad, Kevin P. Grundy, Para K. Segaram, William F. Wiedemann, Thomas J. Obenhuber, Inessa Obenhuber, legal representative
Abstract: A semiconductor structure includes a first layer of a nitride semiconductor material, a substantially unstrained nitride interlayer on the first layer of nitride semiconductor material, and a second layer of a nitride semiconductor material on the nitride interlayer. The nitride interlayer has a first lattice constant and may include aluminum and gallium and may be conductively doped with an n-type dopant. The first layer and the second layer together have a thickness of at least about 0.5 ?m. The nitride semiconductor material may have a second lattice constant, such that the first layer may be more tensile strained on one side of the nitride interlayer than the second layer may be on the other side of the nitride interlayer.
Type:
Grant
Filed:
October 19, 2010
Date of Patent:
December 4, 2012
Assignee:
Cree, Inc.
Inventors:
Adam William Saxler, Albert Augustus Burk, Jr.
Abstract: Provided are a metal interconnect of a semiconductor device and a method of fabricating the metal interconnect. The metal interconnect includes a metal line having a first end and a second end disposed on an opposite side to the first end, a via electrically connected to the metal line, and a non-active segment extending from the first end and including a void. Tensile stress is decreased to prevent a void from occurring under the via. Accordingly, line breakage due to electromigration is substantially prevented, thus improving electrical characteristics of the device.
Type:
Grant
Filed:
March 12, 2010
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Jongmyeong Lee, Zungsun Choi, Gilheyun Choi, Byung-Lyul Park, Jinho Park, Hye Kyung Jung
Abstract: An electronic communication device includes a high-rate RF wireless transmitter circuit (e.g., a TransferJet transmitter circuit) and a low-rate magnetically coupled receiver circuit (e.g., a Near Field Communication receiver circuit). The high-rate RF wireless transmitter circuit transmits a block of data to another proximately located communication device via RF signals using a first RF communication protocol. The low-rate magnetically coupled receiver circuit receives a communication control signal from the other proximately located communication device via magnetic coupling thereto using a second protocol that is different from the first RF communication protocol, and responds to the communication control signal by selectively triggering the high-rate RF wireless transmitter circuit to transmit another block of data when available for transmission.
Abstract: Elongate intrabody MRI-antenna probes include opposing distal and proximal portions. The distal portion includes at least one multi-turn conductor arranged as a stack of substantially flat loops, each with a substantially rectangular elongate shape. A flat loop can reside on each of a plurality of adjacent vertically stacked substantially planar layers, the flat loops cooperate to define a MRI receive antenna.
Abstract: A method and a device relating to a scheduling mechanism in a base station in a WCDMA system are disclosed. The mechanism enables the base station to rapidly adapt to users momentary traffic demands and to interference variations, a dynamical adjustable margin is proposed in this invention. The adjustment is based on the RoT measurement in a cell. To fully use the resource in a cell, the RoT can be targeted to be as closer to the RoTmax as possible however without exceed the limit. The scheduler is preferably set to schedule as high a rate or as many users as possible to fill up the available RoT. The margin which is reserved for the neighboring cell load and external interference is decreased step by step as long as the RoT measurement is below a threshold under RoTmax. Whenever the RoT measurement exceeds the threshold, the margin is increased by one step.
Type:
Grant
Filed:
November 6, 2006
Date of Patent:
November 27, 2012
Assignee:
Telefonaktiebolaget L M Ericsson (publ)
Inventors:
Ke Wang Helmersson, Eva Englund, Patrik Karlsson
Abstract: Provided are methods of forming a semiconductor device, the method including: forming an insulation region on a substrate region, and an active region on the insulation region; patterning the active region to form an active line pattern; forming a gate pattern to surround an upper portion and lateral portions of the active line pattern; separating the gate pattern into a plurality of sub-gate regions, and separating the active line pattern into a plurality of sub-active regions, in order to form a plurality of memory cells that are each formed of the sub-active region and the sub-gate region and that are separated from one another; and forming first and second impurity doping regions along both edges of the sub-active regions included in each of the plurality of the memory cells, wherein the forming of the first and second impurity doping regions comprises doping lateral portions of the sub-active regions via a space between the memory cells.
Abstract: A non-volatile memory device includes: word line disposed on a substrate; an active region crossing over the word line; and a charge trap layer that is between the word line and the active region.
Type:
Grant
Filed:
February 25, 2010
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Toshiro Nakanishi, Chanjin Park, Siyoung Choi, Bonyoung Koo
Abstract: Methods of forming a capacitor of an integrated circuit device include forming a lower electrode of the capacitor on an integrated circuit substrate without exposing a contact plug to be coupled to the lower electrode. A supporting conductor is formed coupling the lower electrode to the contact plug after forming the lower electrode. A capacitor dielectric layer is formed on the lower electrode and an upper electrode of the capacitor is formed on the capacitor dielectric layer.
Type:
Grant
Filed:
February 28, 2007
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Wan-Don Kim, Cha-Young Yoo, Suk-Jin Chung, Jin-Yong Kim
Abstract: Multi-wavelength optical apparatus includes an optical emitter, and an energy transition layer positioned adjacent to the optical emitter. The energy transition layer generates multi-wavelength electromagnetic radiation when monochromatic light from the optical emitter passes therethrough. The energy transition layer includes a plurality of luminescent films, and each film is configured to luminesce at a respective different wavelength range when monochromatic light from the optical emitter passes therethrough. The plurality of luminescent films may be arranged in contacting face-to-face relationship or may be arranged in an array. The luminescent films may include rare-earth doped oxides, phosphors, metal-doped oxides, rare-earth doped nitrides, nanostructures, and/or nanostructured films, etc. The optical emitter may be a light emitting diode (LED), a laser diode (LD), an organic light-emitting diode (OLED), a resonant cavity light emitting diode (RCLED), and/or an edge-emitting diode (EELED).
Type:
Grant
Filed:
December 21, 2007
Date of Patent:
November 27, 2012
Assignee:
Valencell, Inc.
Inventors:
Steven Francis LeBoeuf, Jesse Berkley Tucker
Abstract: Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.
Abstract: Provided is a semiconductor memory device. In the semiconductor memory device, a lower selection gate controls a first channel region that is defined at a semiconductor substrate and a second channel region that is defined at the lower portion of an active pattern disposed on the semiconductor substrate. The first threshold voltage of the first channel region is different from the second threshold voltage of the second channel region.
Type:
Grant
Filed:
February 2, 2010
Date of Patent:
November 27, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sunil Shim, Jaehun Jeong, Hansoo Kim, Sunghoi Hur, Jaehoon Jang, Su-Youn Yi
Abstract: An assembly for selectively presenting objects includes: a frame; a carousel rotatably mounted to the frame for rotation about a generally vertical axis of rotation, the carousel including a plurality of object compartments arranged about the axis of rotation; a servomotor operably connected with the carousel, the servomotor being configured to rotate the carousel about the axis of rotation; and a controller. The controller is configured to actuate the servomotor to rotate the carousel when torque applied to the servomotor exceeds a predetermined magnitude. Such an assembly can serve as a presentation device that enables an operator to remove objects therefrom at his/her convenience.
Type:
Grant
Filed:
June 28, 2012
Date of Patent:
November 27, 2012
Inventors:
James Robert Rivenbark, Jr., William Bradford Carpenter
Abstract: The present invention relates to methods and arrangements in a wireless communication system that enable the allocation of resources to UEs based on measurements of their antenna polarization, in order to suppress the interference between different UEs at a very low overhead cost. This is achieved by a solution where the scheduling unit retrieves information about the polarization of the UE antenna configurations, and based on this information allocates radio resources to the different UEs, with the aim to minimize the interference. The scheduling unit may retrieve the information from the RBSs or from the UEs. The RBS and the UE will determine the polarization and transmit information regarding this polarization to the scheduling unit. The scheduling unit coordinates the allocation of resources with other scheduling units if necessary.
Type:
Grant
Filed:
May 20, 2009
Date of Patent:
November 27, 2012
Assignee:
Telefonaktiebolaget L M Ericsson (publ)
Inventors:
Bo Hagerman, Henrik Asplund, Arne Simonsson