Patents Represented by Attorney North Weber & Baugh
  • Patent number: 8068734
    Abstract: Embodiments of the present invention provide a systems, devices, and methods in which a client signal is divided into a plurality of channels, mapped within transport frames, and combined into a WDM transport signal. These embodiments include intra-nodal redundancy that protects against failure events within the transport transmitter. In particular, redundancy is provided within a network transport transmitter such that redundant paths are available so that electrical channels may be routed around a malfunctioning component within the transmitter.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: November 29, 2011
    Assignee: Infinera Corporation
    Inventor: Ting-Kunag Chiang
  • Patent number: 8064486
    Abstract: The present invention provides a system, apparatus, and method for determining latency differences in channels within a link at a single test site. In particular, the method allows for a single transmitting device to determine distinct latency differences on both transmitter and receiver-side paths without requiring a terminating node on the other side of the connection. In other words, a switch is used, in lieu of such a terminating node, at the other side of the paths that switches at least one channel's content onto another channel and sends it back for a round trip on various transmitter-and-receiver-side-paths combinations. The present invention is based on round trip measurements and switching capability of the receiving node.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: November 22, 2011
    Assignee: Infinera Corporation
    Inventor: Zhong Pan
  • Patent number: 8064771
    Abstract: A system, apparatus and method are described for deployment of a control loop between optical or electro-optical modules and a multiplexing module to provide a desired power profile of banded optical channel groups. The power output characteristics of the optical or electro-optical modules, the properties of the transmission paths of the banded optical channel groups, and other factors may be analyzed to allow the control loop to achieve the desired power profile on the banded optical channel groups. The control loop may adjust the output power on the optical or electro-optical modules so that the banded optical channel groups are delivered to an optical component, such as an optical multiplexer or photo-detector, having a particular optical power profile.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: November 22, 2011
    Assignee: Infinera Corporation
    Inventors: Matthew L. Mitchell, Robert B. Taylor, Vincent G. Dominic, Alan C. Nilsson
  • Patent number: 8055715
    Abstract: System, methods and apparatus for analyzing electronic messages and grouping them into threads are described. In addition, the present invention may classify threads based on their relationship to other threads.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: November 8, 2011
    Assignee: i365 MetaLINCS
    Inventors: Andrew Bensky, Anesh Madapoosi, Frederick Mueller, Joel Sarch, Magnus Stensmo, James Charles Williams
  • Patent number: 8049324
    Abstract: An integrated circuit (IC) package includes a printed circuit board (PCB) substrate and a plurality of package attachment terminals. The package attachment terminals are used to conduct electrical signals from a die that is attached and bonded onto the PCB substrate. The PCB substrate has a side edge and includes a plurality of electrically-conductive paths. Each one of the plurality of paths includes an electroplated bond pad, a trace, and a stub trace. The die is connected to the bond pad and the trace couples the bond pad to a respective one of the package attachment terminals. The stub trace is used to facilitate the electroplating process. The stub trace extends from the trace and terminates at a distance away from the side edge. The stub trace is not visible from the side of the IC package and therefore prevents access to IC buses on the package.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: November 1, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Ruben C. Zeta
  • Patent number: 8045005
    Abstract: A video circuit including a video amplifier adapted to generate an amplified output video signal from an input video signal; a short detection circuit adapted to generate a first signal indicative of whether there is a short present at an output of the video amplifier; and a load detection circuit adapted to generate a second signal indicative of whether there is a load coupled to the output of the video amplifier. The video circuit may further include an input signal detection circuit adapted to generate a third signal indicative of whether an input video signal is present. The third signal generated by the input signal detection circuit may be used to enable the outputting of the first and second signals in order to prevent the false indication of faults at the output of the video amplifier in the absence of an input video signal.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 25, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Ronald Bonshaw Koo, Michael David Petersen
  • Patent number: 8031448
    Abstract: A system, apparatus and a method are described that provide a voltage clamp for a single-supply system. In particular, a negative voltage clamp prevents a negative over-voltage in a system having only a positive independent voltage source. For example, certain analog-to-digital converters and other circuits allow input signals below the negative supply, or ground in single-supply systems, either by direct sampling or using input attenuation resistors. The negative clamp allows the circuit to provide accurate negative over-voltage protection and the absence of this claim would result in over-voltage protection in positive voltage directions only.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: October 4, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Lawrence Skrenes, David Maes
  • Patent number: 8031704
    Abstract: Embodiments of the present invention provide systems, devices and methods for improving the efficient deployment and configuration of networking equipment within a network build-out. In certain embodiments of the invention, an iterative analysis of inter-node equipment placement and connectivity, and inter- and intra-node traffic flow is performed to identify a preferred deployment solution. This analysis of deployment optimization takes into account both configurations from a network node perspective as well as from a network system perspective. Deployment solutions are iteratively progressed and analyzed to determine a preferred solution based on both the cost of deployment and satisfaction of the network demands. In various embodiments of the invention, a baseline marker is generated from which the accuracy of the solution may be approximated that suggests to an engineer whether the deployment is approaching an optimal solution.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: October 4, 2011
    Assignee: Infinera Corporation
    Inventors: Steven Joseph Hand, Jayaram Hanumanthappa, Mohit Misra, Maneesh Jain, Rajasekar Venkatesan, Atul Saxena
  • Patent number: 8030985
    Abstract: An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and discharging of the capacitor. The use of the distinct current sources (e.g., PTAT and ?VGS) enables the pulse generator to be configured substantially process independent of resistive value. The use of a MOSFET capacitor for the capacitor enables the pulse generator to be made substantially process independent of capacitive value. An additional bandgap current source in parallel with the ?VGS current source reduces the pulse width dependency on temperature.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: October 4, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Karthik Nagarajan, Mustafa Ertugrul Oner
  • Patent number: 8031768
    Abstract: A method, system, and program product for quantizing discrete cosine transform coefficients, e.g., for MPEG compression, with minimal bit rate overhead and without using a quantization matrix. This is done by scaling a uniform quantization parameter for the entire discrete cosine transform block, defining a variety of thresholds for the quantization of discrete cosine transform coefficients below which the corresponding coefficient will be quantized to zero, and setting different normative reconstructed values for coefficients that have not been quantized to zero as the decoder will still use the original, unmodified reconstructed values as long as the corresponding coefficient is not zero.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: October 4, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Jiangtao Wen
  • Patent number: 8018051
    Abstract: Disclosed are systems and methods for improving the thermal performance of integrated circuit packages. Aspects of the present invention include improved thermal package structures and methods for producing the same through the application of one or more thermal spreaders in the package. In embodiments, a thermal spreader is incorporated in a semiconductor chip package between a semiconductor die and its die pad. By including a thermal spreader in an IC package, the package can handle higher levels of power while maintaining approximately the same temperature of the package or can reduce the temperature of the package when operating at the same power level, as compared to a package without a thermal spreader.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: September 13, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Tarak A. Railkar, Steven D. Cate
  • Patent number: 8004419
    Abstract: Tampering with an assembly that includes an integrated circuit is detected by measuring a change in at least one property of a conductive molding formed over at least a portion of the integrated circuit. For example, the conductive molding can be a mixture of resin with conductive powder and/or fibers. The molding can be formed as a continuous region or as strips of conductive material. Conductive contacts are positioned to provide and receive current through portions of the conductive material. For example, the property of the molding can be an impedance of a portion of the conductive molding. A significant change in the impedance measured through one or more conductive contacts indicates tampering with the assembly.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: August 23, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Randal Quincy Thornley, David Alan Roberts, William James Tiffany
  • Patent number: 7994840
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: August 9, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Robert G. Meyer
  • Patent number: 7983559
    Abstract: Embodiments of the present invention provide an optical port that can be configured to support either high speed or low speed optical signals. In particular, these embodiments comprise a switch that defines a data-rate dependent path between the front-end optics of a network node and internal processing electronic modules. As a result, either high speed or low speed pluggable adapters may be inserted within a port and supported by the processing electronic modules.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: July 19, 2011
    Assignee: Infinera Corporation
    Inventor: Ting-Kuang Chiang
  • Patent number: 7962644
    Abstract: A distributed communication center configured to handle a plurality of communications includes a user zone, a web zone, and a network zone. The user zone includes a plurality of remote terminals that enable communication center personnel and end users to remotely interface with the distributed communication center through the web zone. The web zone includes one or more web servers configured and one or more mail servers to interface the remote terminals in the user zone with the network zone. The network zone includes one or more telephony servers and one or more application servers.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: June 14, 2011
    Assignee: Oracle International Corporation
    Inventors: Ran Ezerzer, Ali Aljane, Pierre St-Cyr, Imed Yahmadi, Eli B. Borodow, Edwin Kenneth Margulies, Pablo M. Rodriguez
  • Patent number: 7953147
    Abstract: A method for encoding video, comprising the steps of (A) encoding a number of frames of a video signal using a first sub-set of encoding parameters, (B) analyzing the encoded frames to find and mark reference frames that are used more than a predetermined number of times, and (C) re-encoding the video signal using a second sub-set of encoding parameters different than the first sub-set of encoding parameters when re-encoding the marked reference frames.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: May 31, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Jiangtao Wen
  • Patent number: 7953989
    Abstract: A high security microcontroller (such as in a point of sale terminal) includes tamper control circuitry for detecting vulnerability conditions: a write to program memory before the sensitive financial information has been erased, a tamper detect condition, the enabling of a debugger, a power-up condition, an illegal temperature condition, an illegal supply voltage condition, an oscillator fail condition, and a battery removal condition. If the tamper control circuitry detects a vulnerability condition, then the memory where the sensitive financial information could be stored is erased before boot loader operation or debugger operation can be enabled. Upon power-up if a valid image is detected in program memory, then the boot loader is not executed and secure memory is not erased but rather the image is executed. The tamper control circuitry is a hardware state machine that is outside control of user-loaded software and is outside control of the debugger.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: May 31, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Peter C. Hsiang, Raymond O. Chock, Mark Hess
  • Patent number: 7923830
    Abstract: A package-on-package (POP) secure module includes a first ball grid array (BGA) package and a second BGA package. The first BGA includes an array of bond balls that is disposed on a side of a substrate member, and an array of lands that is disposed on the opposite side of the substrate member. Bond balls of the second BGA are fixed to the lands of the first BGA such that the second BGA is piggy-back mounted to the first BGA. Embedded in the substrate member of the second BGA is an anti-tamper security mesh. An integrated circuit in the first BGA is coupled to, drives and monitors the security mesh. When the module is disposed on a printed circuit board within a point of sale (POS) terminal, the integrated circuit is coupled to, also drives and monitors a second security mesh embedded in the printed circuit board underneath the module.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: April 12, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Steven M. Pope, Ruben C. Zeta
  • Patent number: 7898830
    Abstract: An apparatus, such as a Buck converter system, for generating an output voltage while at the same time monitoring whether an overload or over current condition occurs at the output, and protecting the system if the overload or over current condition occurs. The apparatus includes a first circuit adapted to monotonically change a control voltage from a first voltage (e.g., approximately ground potential) towards a second voltage (e.g., a reference voltage VREF); a second circuit adapted to generate the output voltage based on the control voltage; a third circuit adapted to detect whether a magnitude of an output current exceeds a current threshold; and a fourth circuit adapted to change the control voltage from the second voltage towards the first voltage in response to the third circuit detecting that the magnitude of the output current exceeds the current threshold.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 1, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Charles A. Casey, Federico Piccitto, Paolo Nora, Marcello Criscione
  • Patent number: 7889642
    Abstract: Embodiments of the present invention provide a GMPLS fast re-route of packets within a network using a multicast address and a table comprising a list of alias IP addresses. According to various embodiments of the invention an alternate data path from a source node to a destination node allows a packet to traverse to the destination node without IP forwarding techniques being applied. In other words, a tunneling effect from a source node to a destination node allows other nodes in the network to ignore the packet and only read the multicast address within the header and immediately forward the packet to the destination node. A predetermined set of IP addresses are determined from network topology including all potential paths, for a packet to traverse, to a destination address.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: February 15, 2011
    Assignee: Infinera Corporation
    Inventor: Biao Lu