Abstract: Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.

Abstract: A system, apparatus and method for storing and maintaining drive configuration data related to disk drives within a RAID. In one embodiment of the invention, configuration data is stored external to the disk drives within the RAID. A scan(s) is performed of the RAID disk drive configuration and/or configuration data on the disk drives. Mismatches or errors within the RAID disk drive configuration may be corrected using the configuration data stored external to the RAID disk drives.

Abstract: A system, apparatus and method for delaying a signal, such as a high-speed signal are disclosed. A multi-stage delay cell is described in which the amount of delay applied to a signal depends on which stages are activated within the cell. In various embodiments of the invention, noise caused by transitions between various delay times within the cell is reduced by efficiently managing voltage states on each of the stages.

Abstract: A memory cell includes a master cell storing first true/complement data and a slave cell storing second true/complement data. A first circuit associated with the slave cell is operable responsive to a first clock signal to copy first true/complement data from the master cell into the slave cell with same state to be the second true/complement data. A second circuit associated with the master cell is operable response to a second clock signal, which is a non-overlapping complement of the first clock signal, to copy second true/complement data from the slave cell into the master cell with complementary state to be the first true/complement data. A read/write circuit includes circuitry for supporting true/complement data read and write operations with respect to the master cell in either same polarity or opposite polarity state.

Abstract: Embodiments of the present invention provide a multi-fan cooling system in which redundancy in airflow across a plurality of electrical boards is maintained. This redundancy is provided by having an ability to at least partially divert airflow from a functioning fan to an electrical board for which its corresponding fan has failed. According to various embodiments of the present invention, the multi-fan cooling system comprises two fans located proximate to each other. An airflow plenum couples and distributes air from the two fans across a plurality of electrical boards. In certain embodiments, the plenum comprises stacked outlets that distribute airflow from the two fans across the plurality of electrical boards. During normal operation, this airflow is approximately evenly distributed across the electrical boards. However, if one of the fans fails, the plenum causes air from the single operating fan to still be distributed across the plurality of electrical boards.

Abstract: An apparatus and a method for analyzing signals within an integrated circuit are described. In one embodiment of the present invention, internal IC signals are tapped, sampled and stored according to one or more sampling criteria. The signals may be taken from multiple locations within the IC and the information stored may include data, timing information, control data and other such information related to the tapped signals. The stored information may be provided to an external device for analysis.

Abstract: A system, apparatus and method for testing and measuring high frequency signals on a trace is described. In one embodiment of the invention, a footprint is manufactured on a trace to allow the testing of a signal while reducing the amount of distortion caused by prior art structures and methods. The footprint is designed to reduce stub effects and capacitance on a signal being communicated on the trace.

Abstract: An apparatus and method are described for identifying uncommitted memory in a system RAM during an initialization process of a computer system, such as a boot procedure or power-on self test, during which memory management is uncontrolled. In various embodiments of the invention, repeating patterns that are indicative of uncommitted memory blocks are identified within a conventional memory area of the system RAM. At least some of the uncommitted memory blocks are allocated for use by an option ROM or other BIOS data and a table is created identifying these uncommitted memory blocks. After the BIOS code exits the system RAM, the table is used to restore the uncommitted memory blocks into their previous data states.

Abstract: The present invention discloses systems and methods for defining a coupling region or regions for use with optical systems. An embodiment of the coupling region represents a region in which an optical parameter meets or exceeds a selected threshold value. Embodiments of the coupling region may be used for the alignment, characterization, qualification, or design of optical elements or optical assemblies.

Abstract: A system, apparatus and method for providing a digital variable resistor with high resolution and efficient use of substrate area is described. In one embodiment of the invention, a digital variable resistor string comprises a serial array of resistors that is connected to a parallel array of resistors through a switching network. A compensation network is coupled in parallel to the parallel array of resistors in order to compensate for resistance drift caused by non-linear responses of components within the variable resistor. For example, the compensation network may interpolate the digital variable resistor to a preferred resistance value that is within an error margin tolerance.

Abstract: The present invention provides a system and method for designing and modularly expanding multiport bitcells. A modular design approach is described that reduces the complexity of designing multiport bitcells while complying with DFM rules across various semiconductor fabrication providers. The modular design may be parsed into modules such as read port modules, write port modules, and pull-up modules that may be easily interconnected to build a multiport bitcell. These modules may also be independently sized and assembled to achieve desired read margins, write margins, static noise margins as well as read access times and write times.

Abstract: A system, apparatus and methods are described that wirelessly communicate with its environment in response to stimuli generated locally within a communication device or within a remote activation device.

Abstract: A laser diode driver output stage for driving an associated laser diode device. The laser diode driver output stage includes a driver circuit adapted to receive an input data signal at an input node and provide an output signal to a positive output node and a negative output node in response to the data signal. The laser diode driver output stage further includes a transformer having a positive terminal of a first side coupled to the positive output node of the driver circuit, a negative terminal of the first side coupled to the negative output node, a positive terminal of a second side coupled to the positive output node, and negative terminal of the second side coupled to a bias current generator. The transformer functions to isolate the bias current from fluctuations in the output signal, whereby the output signal and bias current are provided to the associated laser diode device.

Abstract: The present invention provides disk coercion by generating coercion percentages or values that can be used to coerce various disks according to each disk's particular labeled size or capacity. In one embodiment, a disk size is received and a base coercion scaling factor is provided such that the received disk size is coerced according to the base coercion scaling factor if the labeled disk capacity is below a disk size threshold. The coercion scaling factor increases for labeled disk capacity above the disk threshold. If the labeled disk capacity is above the disk size threshold, then a coercion scaling factor is provided according to the rate of increase of coercion scaling factors and the labeled disk capacity.

Abstract: System, devices and methods are described that provide an integrated optical decombiner or optical combiner having both unamplified paths and amplified paths on which power monitoring and control may be located. A preferred multiplexing/demultiplexing optical path through the combiner/decombiner and a corresponding waveguide output/input is identified and optically coupled to a piece of fiber. Temperature control may be provided to tune an arrayed waveguide grating within the combiner/decombiner and minimize wavelength drift therein. Integrated power monitoring may be employed on one or more of the amplified waveguide paths to ensure that a preferred power level or range is maintained on an optical signal.

Abstract: A memory cell includes a master cell storing first true/complement data and a slave cell storing second true/complement data. A first circuit associated with the slave cell is operable responsive to a first clock signal to copy first true/complement data from the master cell into the slave cell with same state to be the second true/complement data. A second circuit associated with the master cell is operable response to a second clock signal, which is a non-overlapping complement of the first clock signal, to copy second true/complement data from the slave cell into the master cell with complementary state to be the first true/complement data. A read/write circuit includes circuitry for supporting true/complement data read and write operations with respect to the master cell in either same polarity or opposite polarity state.

Abstract: Spatially-efficient optical multiplexers and optical demultiplexers include elements interrelating along orthogonal axes. A transmission block of extreme thinness has highly reflective coatings on opposed parallel surfaces. Lasers of multiplexer are on one side of transmission block with transmission axes perpendicular to transmission block surface. An associated multiplexed signal transmitting port on opposite side of transmission block has receiving axis parallel to transmission block surface on that side. Detectors of demultiplexer are on one side of transmission block with reception axes perpendicular to transmission block surface. An associated multiplexed signal receiving port on opposite side of transmission block has receiving axis parallel to transmission block surface on that side. A unitary structure performs both optical multiplexer functions and optical demultiplexer function with a single thin transmission block. Related optical signal processing methods are included.

Abstract: System and methods are disclosed for load balancing Input/Output (IO) commands to be executed by one or more disk drives from an array of disk drives. Systems and methods disclosed herein use one or more properties, such as disk drive RPM, disk drive cache, command queue lengths, real-time drive data, and head position to provide load balancing of Input/Output commands.

Abstract: The present invention comprises using an electrode (107) arranged with a small gap or opening (108) placed in parallel with an electrically sensitive component (105) and housed with a gas inside an enclosure (100) to form a discharge gap. Such configurations may protect against low level voltage spikes, but in so doing, do not significantly add input capacitance.

Abstract: A latching system for a small from pluggable receptacle that uses a securement recess in a resilient catch to secure a casing in the receptacle includes on a lateral surface of the casing a securement tang that is captured in the securement recess and a release trigger on a surface of the casing located outside the receptacle. The release trigger includes a mounting bridge defining a guide passage oriented toward the securement tang and an actuator slidably disposed in the guide passage for movement in alignment with the securement tang. A catch deflector extending centrally from the actuator toward the securement tang has a free end configured to displace the catch away from the casing when cause by an operator to move toward the securement tang.