Abstract: A phase detector including a voltage controlled oscillator generating a voltage controlled oscillator output, and a first logic state device for receiving said voltage controlled oscillator output as an input. The phase detector also includes a reset device, for generating a reset signal to reset the first logic state device such that the output control signal of the first logic state device reaches a low level in response to a first edge of the reset signal.

Abstract: A variable impedance circuit for use with a load, such as an IC-based active filter circuit, formed on a semiconductor substrate. The variable impedance circuit includes at least one non-linear element, such as a MOSFET. The variable impedance circuit also includes a means for suppressing at least a second order harmonic distortion term from the non-linear element.

Abstract: A sampling device for sampling an input signal in response to a pulse train of a sample signal. The sampling device includes a sampling transistor for creating samples in response to the sample signal. The sampling transistor has an impedance corresponding with the difference between the gate to source voltage and the threshold voltage of the sampling transistor. The sampling device also includes a control device for generating a control signal. The control device includes a bootstrap reference voltage source for providing a reference voltage in response to the sample signal, and a control circuit for generating the control circuit voltage in response to the sample signal. By this design, the control signal comprises the sum of the input signal and the sampling threshold voltage, the control signal comprises the sum of control circuit voltage and the reference voltage, and the gate to source voltage comprises the difference between the control signal and the input signal.

Abstract: A sampling device for sampling an input signal having intrinsic filter properties. The sampling device samples a continuous analog input signal according to a sampling signal. The sampling device includes a first sampling switch for sampling the input signal, in response to a sampling signal, to create a first set of samples. Furthermore, the sampling device incorporates a time delay device for time delaying the first set of samples. The sampling device also includes a phase shift device for phase shifting the input signal. The phase delayed input signal is then fed into a second sampling switch for sampling in response to the sampling signal to create a second set of samples. Further, a summer is incorporated to sum the first set of samples with the second set of samples to create the output samples.

Abstract: The present invention is directed to a device that has wires on at least two levels. The wires are either copper or a metal containing copper. At lease one via plug formed of copper or a metal containing copper is formed which electrically connects at least one wire on the first level with at least one wire on the second level. The device is fabricated under conditions that remove oxides and other metal that form on the exposed surface of the first level of metal during processing prior to the via plug being formed. The resulting interconnect between the first level of metal and the via plus is substantially non-oxidized copper or copper-containing metal.

Abstract: A field emission display ("FED") is disclosed having a gray scale range. Input into the FED, initially, is an analog signal input. The FED, by employing an analog to pulse width converter, subsequently converts the analog input to a pulse width output, the width of which directly correlates to the amplitude of the analog input signal. To achieve this design, the analog to pulse width converter comprises a sampler for sampling the analog signal at a predetermined frequency, thereby creating a plurality of samples corresponding to the input voltage. Further, the converter comprises means for holding each of the samples. The output of the holding means is subsequently coupled with a load responsive to the output of the holding means. In one embodiment of the present invention, this load comprises a voltage controlled resistance. The voltage controlled resistance can comprise a convertor for converting each of the samples to a current source and a load for creating a voltage ramp.

Abstract: A method and apparatus are disclosed for enhancing, within a signal bandwidth, a corrupted audio-frequency signal. The signal which is to be enhanced is analyzed into plural sub-band signals, each occupying a frequency sub-band smaller than the signal bandwidth. A respective signal gain function is applied to each sub-band signal, and the respective sub-band signals are then synthesized into an enhanced signal of the signal bandwidth. The signal gain function is derived, in part, by measuring speech energy and noise energy, and from these determining a relative amount of speech energy, within the corresponding sub-band. In certain embodiments of the invention, the signal gain function is also derived, in part, by determining a relative amount of speech energy within a frequency range greater than, but centered on, the corresponding sub-band.

Abstract: A system having reduced quiescent current drawn from a power supply. The system includes a device having a status. Moreover, the system includes a microcontroller, having an active and a sleep mode of operation, for polling the status of the device during the active mode, initiating a function in response to a change in the status during the active mode, and for conserving quiescent current drawn from the power supply during the sleep mode. The microcontroller generates an output signal at a first voltage level during the active mode and generates the output signal at a second voltage level during the sleep mode. The microcontroller, additionally, includes a sensor for switching the microcontroller from the sleep mode to the active mode. Furthermore system includes a storage device for charging to the first voltage level during the active mode, and for discharging to a third voltage level during the sleep mode for triggering the sensor to switch from the sleep mode to the active mode.

Abstract: A transmitter circuit includes an output impedance and a buffered oscillator. The buffered oscillator includes a resonator for generating a reference signal and an amplifier coupled with the resonator for amplifying the reference signal. A first resonant tank generates an oscillating output signal in response to the amplified reference signal. A buffer circuit buffers the oscillating output signal and lowers the output impedance.

Abstract: The present invention teaches a flat panel display system for illuminating an icon having a shape. The system comprises a first set of illuminators for illuminating the icon with a first color light beam in response to a first signal. The first set comprises a first and second pair of electrodes. Each pair of the first set comprising a top electrode and a bottom electrode, wherein the top and bottom electrodes of the first pair overlapping to form a first overlap region. Moreover, the top and bottom electrodes of the second pair overlapping to form a second overlap region, wherein the first and second overlap regions outline the shape of the icon. Further, a second set of illuminators is incorporated for illuminating the icon with a second color light beam in response to a second signal, such that the second set comprises a third and fourth pair of electrodes.

Abstract: The present invention teaches a method and system of encrypting a set of data having a test bit. The method comprises the step of generating a first and a second data string from the set of data. Once generated, the test bit is tested, and should it comprises a first value, the first data string is shifted in a first direction to transfer a carry over bit from a carry over register into the first data string while transferring a first bit of the first data string to said carry over register. This shifting step is followed by the step of shifting the second data string in a second direction to transfer a first bit of the second data string to the carry over register while transferring the carry over bit from the carry over register into the second data string. However, if the test bit comprises a second value, a first logic operation is executed on the first data string with a first number, and a second logic operation is executed on the second data string with a second number.

Abstract: The present invention teaches a method and system for resynchronizing a remote keyless entry receiver having received a new encrypted message transmitted by the transmitter which does not match a previous encrypted message, also transmitted by the transmitter, and stored in memory. The method comprises a first step of transmitting and receiving a first new follow up encrypted message. Subsequently, the received new encrypted message is re-encrypted, and that result is tested against the received first new follow up encrypted message to determine whether there is a match. In the event both match, a second new follow up encrypted message transmitted and received. At this point, the received re-encrypted new encrypted message is re-encrypted a second time, and that result is tested against the received second new follow up encrypted message to determine whether there is a further match.

Abstract: A transmitter system for transmitting an output signal having an output level and a signal to noise ratio. The transmitter system comprises a balanced oscillator comprised of a resonator for generating a reference signal, and for creating a parasitic impedance. Moreover, the balanced oscillator comprises a first oscillator comprising a first amplifier for amplifying the reference signal, and a first feedback circuit for generating a first oscillating output signal in response to the reference signal amplified by the first amplifier. Similarly, the balanced oscillator comprises a second oscillator comprising a second amplifier for amplifying said reference signal, and a second feedback circuit for generating a second oscillating output signal in response to the reference signal amplified by the second amplifier.

Abstract: A communication system includes a first communication device for receiving data and a wake up signal. Operation of the first communication device includes an active mode of operation and a sleep mode of operation for reducing power consumption. Further, the system includes a switch for switching the first communication device to and from sleep mode in response to receiving the wake up signal. The system also includes a second communication device for transmitting data to the first device during its active mode, and for transmitting the wake up signal to the first device during its sleep mode.

Abstract: The present invention teaches a method of generating a secret identification number from a random digital data stream. The method comprises the step of initially selecting a first and a second group of bytes from the random digital data stream, wherein the first and second groups of bytes have a first and second numerical value. Subsequently, a first maximal length LFSR feedback term is looked up from a list in response to said first numerical value, while a second maximal length LFSR feedback term is looked up from the list in response to said second numerical value. The method additionally comprises the step of generating a cyclic redundancy code feedback term in response to executing a cyclic redundancy code check on a third group of bytes selected from the random digital data stream.

Abstract: An optical anti-theft system incorporates a member having a plurality of reflective surfaces. The plurality forms a pattern corresponding with the security code. The system additionally incorporates a base for receiving the member. The base incorporates a light source for generating a light beam to illuminate the plurality of reflective surfaces, and a light detector for sensing the illuminated plurality of reflective surfaces and for initiating a security function in response to the sensed illuminated plurality of reflective surfaces having the pattern.

Abstract: A balanced and buffered oscillator and transmitter arrangement includes a first and second oscillator, each of which include a resonator for generating a reference signal, an amplifier for amplifying the reference signal, a resonant tank for generating an oscillating output signal in response to the amplified reference signal, and a buffer circuit for buffering the respective oscillating output signal such that the effects of a parasitic impedance are minimized.

Abstract: The present invention teaches a method of generating a plurality of random numbers is disclosed. The method comprises the initial step of generating chaotic noise. Subsequently, the chaotic noise is sampled such that a plurality of samples are created. Each sample of the plurality of samples is then converted into digital data such that each converted sample corresponds with a random number of the plurality of random numbers.

Abstract: The present invention teaches an improved brush holder assembly. The holder has a first terminal wire and comprises a support plate and a tower attached thereto for securing the first terminal wire. The tower comprises a body and an end. The body comprises an interior passageway with a number of ribs for securably positioning the first terminal wire within the body and a groove for securing the first terminal wire within the tower. The tower's end functionally crimps the first terminal wire and has a plurality of support members for securably positioning the crimped first terminal wire within a mouth of the end. A coil spring forming an inductor is also incorporated for mechanically biasing a brush and for filtering out electromagnetic interference (EMI).

Abstract: The present invention teaches an oscillator and transmitter. The balanced oscillator comprises a resonator for generating a reference signal having a resonating frequency, a first oscillator for providing a first oscillating output in response to the resonating frequency, and a second oscillator for providing a second oscillating output in response to the resonating frequency. The second oscillating output has a magnitude equal to the first oscillating output while oscillating 180 degrees out of phase with the first oscillating output. The transmitter comprises an antenna for radiating the first and second oscillating output signals.