Abstract: A degaussing circuit for a video display apparatus eliminates residual degaussing current flow during operation of the video display apparatus. A capacitor is connected between coil of the degaussing relay and the source of energizing voltage. Application of the energizing voltage to the relay coil energizes the relay and initiates degaussing of the cathode ray tube of the video display apparatus, and also causes the capacitor to begin charging. As the capacitor becomes charged, the degaussing relay becomes deenergized, thereby terminating degaussing current flow. The capacitor charging time constant is selected to allow sufficient time for degaussing to occur before deenergization of the degaussing relay.

Abstract: A power supply for a video display apparatus includes circuitry that produces a pulse width modulated signal in response to the selected horizontal deflection rate. The pulse width modulated signal controls the switching of an FET through a transformer to provide a load circuit operating voltage representative of the deflection frequency. A turn-off signal for the FET is provided to a turn-off transistor from the primary winding of the transformer to insure rapid turn off of the FET.

Abstract: An amplifier applies turn-on bias to the gate electrode of an output field-effect transistor in response to a first level of an input signal applied to the amplifier. A switched power source supplies operating current to the amplifier for developing the turn-on bias when the amplifier input signal is at the first level. A feedback-controlled bypass circuit diverts a portion of the operating current from the amplifier during an initial turn-on period and gradually reduces the magnitude of the diverted operating current as the output transistor turns on thereby producing a "soft" turn-on of the output transistor so as to minimize a potential for creating radio frequency interference in nearby RFI sensitive devices such as the tuner in a television or radio receiver. Complementary circuits include dual current supply and diversion circuits providing controlled rise and fall times for complementary field-effect output transistors.

Abstract: A defect corrector for a solid-state imager having a number of defective pixels less than the total number of pixels in the imager in which only defect correction signals associated with the defective pixels are generated. The defect correction signals are then combined with photoresponse signals from the corresponding defective pixels, so as to provide a defect compensated photoresponse signal for each of the defective pixels.

Abstract: In a video display apparatus, the high voltage generating circuitry responds to trigger pulses derived from horizontal deflection retrace-related pulses. During normal horizontal deflection operation, the trigger pulses produced are of sufficient amplitude to cause normal triggering of the high voltage generating circuits resulting in normal high voltage levels being produced. Under abnormal horizontal deflection operation in which the horizontal deflection current is not produced, the trigger pulses will be of insufficient amplitude to trigger the high voltage generating circuit, and hence no high voltage level is produced.

Abstract: A switched mode power supply for a video apparatus having an electrically isolated chassis incorporates a switching FET that has its conduction interval controlled by pulses of varying frequency. An inductor is connected between the FET and hot ground to provide a low impedance path for line conducted interference signals generated by the switching of the FET and to provide a sufficient impedance path to prevent damage to the FET due to current flow caused by a high voltage discharge, such as a lighting strike to the cold ground referenced antenna.

Abstract: A control circuit having a slow-start section is enabled to carry out its expected, principal function(s) only after the voltage at the slow-start section input has reached a certain level. The system assures that a delay interval in control circuit operation is measured from the time devices within the circuit's internal voltage supply become effective to deliver voltage levels sufficient to allow the circuit to perform the principal function. A delay network is connected across a device of the internal voltage supply, which otherwise supplies an operating voltage level to the control circuit.

Abstract: A technique for generating predefined dual tone, multiple frequency signals composed of two non-harmonically related frequency components according to industry standards is disclosed. The frequencies of each tone pair are adjusted within a predetermined tolerance so that their peaks are time coincident within a minimum number of cycles. A sampling frequency for the adjusted frequency tone pair is selected to be synchronized with the occurance of the time coincident peaks of the tone pair. The adjusted frequency tone pair are summed and then sampled at the selected sampling frequency and stored in a table in a digital memory. The digital memory contains a plurality of tables, one for each sampled summed tone pair, and the tables are variable in length being optimized for the summed tone pair stored in the table.

Abstract: An apparatus is disclosed for generating a burst-locked, color subcarrier representative signal .phi..sub.sc from a skew-corrected clock signal MCS (which is reset once every horizontal line) and a skew error signal SES (indicative of the once-a-line phase adjustment of the skew-corrected clock signal). In accordance with another feature of the invention, a chroma demodulation apparatus is provided for generating a pair of color difference signals R-Y and B-Y in response to the internally-generated .phi..sub.sc signal.

Abstract: A subranging analog-to-digital converter is disclosed. A coarse analog-to-digital converter has an analog input terminal coupled to a source of analog signal, a digital output terminal, and a range indication output terminal. First and second fine analog-to-digital converters each have an analog input terminal coupled to the analog signal source, a range selection input terminal coupled to the range indication output terminal, and a digital output terminal. A combining circuit has input terminals coupled to the digital output terminals of the coarse and first and second fine analog-to-digital converters. The coarse analog-to-digital converter operates on every clock cycle, and the fine analog-to-digital converters operate alternately on every other clock cycle to produce a sequence of digital samples representing the analog signal, one for each clock cycle.

Abstract: A system for generating an interstitial signal for a double scanning non-interlaced (progressive scan) television display is disclosed. When no motion is detected in the neighborhood of the interstitial pixel, a pixel generated from pixels in the adjacent fields to that of said interstitial pixel is supplied at the interstitial pixel for further processing. When motion in a relatively downward direction is detected, then a pixel generated from pixels in lower adjacent lines to, and in the same field as, that of the interstitial pixel is supplied as the interstitial pixel. When motion in a relatively upward direction is detected, then a pixel generated from pixels in upper adjacent lines to, and in the same field as, that of the interstitial pixel is supplied as the interstitial pixel.

Abstract: A video display apparatus includes a protection circuit for preventing damage due to the application of excessively high line voltage. The video display apparatus includes a start-up circuit that provides power to initiate operation of a switching voltage regulator. In response to an improperly high line voltage, the start-up circuit is disabled and the video display apparatus does not become operative.

Abstract: A camera field-of-view is mapped with full depth-of-focus into electronic memory. Data concerning image intensities at selected points in image space are stored, along with data concerning the distances between the camera and these points in image space. Images with any focus and depth-of-focus can be generated by scanning the electronic memory during a reading thereof and convolving the data concerning image intensity with an adjustable-bandwidth low-pass spatial filter. The bandwidth of that filter is adjusted dependent on the data concerning distances between camera and points in image space. This image storage and image retrieval procedure conserves the size of electronic memory required to store and retrieve images with any focus and depth-of-focus.

Abstract: A vertical deflection circuit for a video display apparatus includes a service switch that collapses vertical or field rate scan in order to facilitate adjustment of cathodes ray tube electron beam drive levels. The service switch operates by referencing the vertical sawtooth signal generator, the AC feedback, and the DC feedback to ground potential so that no input is applied to the vertical drive circuitry.

Abstract: Pilot signal cancelling circuitry for removing the pilot signal from a composite signal, includes a subtraction circuit. The composite signal and a synthesized pilot signal are coupled to the minuend and subtrahend input connections of the subtraction circuit respectively. The output of the subtraction circuit is coupled to first and second multipliers. A cosine signal of like frequency to the pilot signal is applied to the first multiplier which develops a phase error signal. The phase error signal is coupled to an oscillator which develops the cosine signal. A sinusoidal signal, also developed by the oscillator and in phase with the pilot signal is applied to a second multiplier. The second multiplier generates a signal proportional to the amplitude of the residual pilot signal in the output signal provided by the subtraction circuit. The amplitude signal is multiplied by a sinusoid in phase with the pilot signal in a third multiplier to generate the synthesized pilot signal.

Abstract: A compressor compresses the edges of a wide screen image to provide a compressed wide screen video signal which may be displayed on a conventional 4:3 aspect ratio receiver with the compressed edge portions largely hidden from view because of receiver overscan. Complementary edge expansion restores the compressed signal to its original form for display by a wide screen receiver. The relative proportions of compression applied to the left and right edges of the wide screen images are varied to reduce the appearance of edge distortion in the compressed signal when displayed on a standard aspect ratio receiver and to reduce the appearance of loss of edge resolution in the expanded signal when displayed on a wide screen receiver.

Abstract: In a resonant regulator power supply, a resonant circuit is coupled to a source of alternating input voltage that is controllable in operating frequency. A power transformer primary winding is coupled across the capacitive element of the resonant circuit for generating an output voltage across a secondary winding. A control circuit varies the operating frequency in a negative feedback loop to regulate the output voltage on the positive slope of the frequency characteristic curve. A frequency limiting circuit prevents the operating frequency from passing through the resonance frequency of the resonant circuit.

Abstract: A wide aspect ratio television system includes memories for storing and recovering a video input signal in response to read and write clock pulses, respectively. Write clock pulses are deleted to compress edge regions of a wide aspect ratio input signal and read clock pulses are deleted to restore the signal to its original aspect ratio. The pattern of deleted pulses is altered on a line-by-line basis to reduce visible artifacts of signal decimation. Dual mode receivers include provisions for controlling edge blanking, interpolation and the pattern of clock pulses deleted as a function of received signals. Wide and standard aspect ratio images are displayed without altering the width of the display raster.

Abstract: A cabinet and antenna assembly for a television set includes an antenna which is selectively mountable at different locations on a cabinet to accommodate different signal receiving environments. When the cabinet is sitting on a lower support, the antenna is mounted at one location on the cabinet to accommodate the antenna in a position extending upward above a cabinet top surface. When the cabinet is suspended under an upper support, the antenna is mounted at a different location on the cabinet to accommodate the antenna in a position extending downward below a cabinet bottom surface.

Abstract: An amplifier having a resonator coupled between input and output terminals thereof supplies a dot clock signal to a character generator in a television receiver. A feedback control circuit supplies DC bias to the resonator during blanking intervals that preceed lines of characters to be displayed to ensure a consistent starting phase for oscillations, removes the DC bias and supplies operating power to the amplifier during a portion of the active video period of each displayed line for sustaining the oscillations and automatically inhibits the supply of amplifier power at the end of each active line of characters to thereby provide three oscillator operating modes of PRIMED, RUNNING and OFF so as to minimize overall power consumption for the oscillator for each field of displayed characters.